Abstract: The disclosure provides a manufacturing method of a LTPS-TFT, including: providing a substrate and sequentially forming a buffer layer, a low temperature poly-silicon layer, a source contact region, a drain contact region, a gate insulator layer, a gate layer, and a dielectric layer on the substrate, respectively forming a first and a second contact holes through the dielectric layer and the gate insulator layer by dry etching to expose the source and the drain contact regions; and on the dielectric layer, forming a source electrode to contact the source contact region through the first contact hole and a drain electrode to contact the drain contact region through the second contact hole. When the contact holes are manufactured by dry etching, H2 is added into the etching gas to increase the selectivity ratio to the poly-silicon, thereby reducing the loss of poly-silicon. A LTPS-TFT and an array substrate are also provided.

Abstract: A LTPS TFT comprises a substrate, and a buffer layer, a low temperature polysilicon layer, a source contact area, a drain contact area, a gate insulating layer, a gate layer, a dielectric layer, a source and a drain disposed on the substrate successively. The source contact area and the drain contact area are doped with metal ions individually. The source and the drain are connecting with the source and drain contact areas separately through the dielectric layer. The metal ions include at least one of Cu2+, Al3+, Mg2+, Zn2+ and Ni2+. A method of fabricating the LTPS TFT is also provided. An annealing is performed for driving individually metal ions of the insulation metal oxide layer into the source contact area and the drain contact area. Thus, the step of implanting p-type ions can be omitted, the procedure can be significantly simplified, and the manufacturing cost can be reduced.

Abstract: The present disclosure provides a method for manufacturing a TFT substrate and a method for manufacturing a TFT display apparatus, including the steps of: providing a base substrate; forming a source/drain metal layer on the base substrate; depositing a photoresist layer on the source/drain metal layer and patterning the photoresist layer to form a desired pattern of the photoresist layer; using a BCl3 gas to remove metal oxides generated on surface of the source/drain metal layer with air; and using a mixing gas including a Cl2 gas and the BCl3 gas to etch the source/drain metal layer.

Abstract: The present application discloses a thin film transistor, a method for manufacturing a thin film transistor and a liquid crystal display panel, and relates to a display technology field. The thin film transistor includes a substrate, a gate electrode layer and an insulating layer, the gate electrode layer is formed on the substrate, the insulating layer is covered on the gate layer; a semiconductor layer is formed on the insulating layer; a conductor layer is formed on the semiconductor layer; an insulating spacer layer is formed on the insulating layer; a source-drain electrode layer is formed on the conductor layer and the insulating spacer layer; a passivation layer formed on the source-drain electrode layer and the semiconductor layer; wherein the insulating spacer layer is located between the source-drain electrode layer and the semiconductor layer to solve the leakage current too large problem of the thin film transistor.

Abstract: The present invention discloses a thin film transistor, a method for manufacturing a thin film transistor, and a liquid crystal display panel. The thin film transistor includes a substrate, a gate layer disposed on the substrate, an insulating layer covering the gate layer, a semiconductor layer disposed on the insulating layer; a conductor layer disposed on the semiconductor layer and a source and drain layer provided on the conductor layer and the insulating layer, and a conductor layer or a conductive spacer is provided between the source and drain layer and the semiconductor layer, and the passivation layer is provided on the insulating layer, the source and drain layer, and the semiconductor layer. The leakage current of the thin film transistor of the invention is small, and the quality of the thin film transistor is high.

Abstract: A material property testing device and a manufacturing method are disclosed. The device includes: a substrate; a metal gate electrode; an auxiliary layer disposed on the metal gate electrode, and the metal gate electrode is located between the substrate and the auxiliary layer; a function layer disposed on the substrate. In the formation process of the function layer, an organic photoresist is attached on the auxiliary layer for a period of time, and the function layer is used for cooperating with a light-emitting device to test the property of the material. A film of the organic photoresist being disposed is even such that after exposing and developing, the function layer having an ideal pattern is obtained so as to ensure the testing effect of the material property testing device.

Abstract: The invention provides a manufacturing method of flexible TFT substrate, forming first contact hole above two sides of the active layer and buffer hole on flexible base substrate after depositing a silicon oxide layer of interlayer dielectric layer (ILD), coating organic photo-resist material on the silicon oxide layer and filling the organic photo-resist material into the buffer hole during coating to form organic photo-resist layer to obtain ILD including silicon oxide layer and organic photo-resist layer, and patternizing organic photo-resist layer to form a connection hole corresponding to above of first contact hole so that the subsequent source/drain connected to active layer through the first contact holes and connection holes. By replacing the silicon nitride layer in conventional ILD with flexible organic photo-resist layer and providing buffer hole filled with organic photo-resist material on flexible base substrate, the flexibility of TFT substrate is enhanced and product performance improved.

Abstract: A method for manufacturing an OLED backplate and a method for manufacturing an OLED panel are provided. In the method for manufacturing the OLED backplate of the present disclosure, a protective photoresist layer is manufactured on a pixel defined layer in which the top surface thereof has a hydrophobic property and the side surfaces thereof have a hydrophilic property before an electrode layer is treated by an oxygen plasma to remove photoresist residues, thereby the top surface of the pixel defined layer covered by the protective photoresist layer is not affected by the oxygen plasma in the proceeding of an oxygen plasma treatment, and still has the hydrophobic property. Therefore, the properties of the top surface of the pixel defined layer having the hydrophobic property and the side surfaces of the pixel defined layer having the hydrophilic property are kept while the photoresist residues on the electrode layer is removed, and thus an OLED device can be easily manufactured by an ink-jet printing process.

Abstract: The invention provides an OLED display panel and manufacturing method thereof, by disposing a red shielding color-resist block on the IGZO TFT to completely cover the active layer, able to reduce the influence of the high energy blue light incident from the top of the IGZO TFT on the active layer so as to prevent the leakage current and to ensure the TFT characteristics to maintain normal operation of the IGZO TFT. Moreover, the red shielding color-resist block covering the active layer only blocks the high-energy blue light influencing the active layer of the IGZO TFT while allows light of other bands to pass through; thus, the aperture ratio of the OLED display panel is not affected.

Abstract: This disclosure discloses an array substrate and a manufacturing method, and a display device, the array substrate including: a channel layer; a gate insulating layer including a first portion and a second portion connected side by side, arranged on the channel layer, and exposing a source and drain contact zone on the channel layer, the second portion of the gate insulating layer being located on both sides of the first portion of the gate insulating layer; a gate layer, disposed on the first portion of the gate insulating layer; and a source and a drain, correspondingly connected to the contact region of the source and drain of the channel layer respectively. The array substrate of this disclosure solves the array substrate leakage problem caused by conductorizing the channel layer due to performing ion implantation to the channel layer.

Abstract: The invention provides a manufacturing method of a thin film transistor and a manufacturing method of an array substrate. A photoresist is used to define a to-be-doped region of an amorphous silicon layer to thereby make a crystallization be occurred in a source contact region and a drain contact region. A crystallization direction is from the source contact region and the drain contact region towards a channel region, so that it can realize directional crystallization as far as possible, and therefore can improve crystallization efficiency and crystallization uniformity, reduce an influence of grain boundary applied to electron mobility and leakage current of the TFT and improve electrical characteristics of the TFT.

Abstract: Related to is the field of light-emitting panel manufacture, and a light-emitting panel and a method for manufacturing the same are provided, which aim to improve uniformity of light emission of an Organic Light-Emitting Diode (OLED) manufactured by Inkjet Printing (IJP). The light-emitting panel sequentially comprises an ITO substrate, a light-emitting layer, a light-shielding layer, and a cover glass. The method comprises forming a multilayer structure sequentially including an ITO substrate, a light-emitting layer, a light-shielding layer, and a cover glass. According to a size of an edge warp of a light-emitting area of the OLED, a light-shielding layer is designed at a corresponding position of the light-emitting area on the cover glass, and a position of a non-uniform edge is subjected to light-shielding processing, so that the problem of non-uniform light emission caused by the edge warp of the organic light-emitting layer is solved.

Abstract: The invention provides a manufacturing method for LTPS TFT substrate. After forming N+ areas on both sides of polysilicon layer, the first gate insulating layer, first gate, second gate insulating layer, and second gate are sequentially formed on polysilicon layer, and the second gate is wider than first gate to produce a low electric field region in the polysilicon layer to reduce leakage current; alternatively, forming first gate and first gate insulating layer, forming polysilicon layer and N+ areas on both sides of polysilicon layer, forming second gate insulating layer and second gate on polysilicon layer, the second gate insulating layer is thicker than first gate insulating layer and the second gate is wider than first gate, so that the second gate insulating layer sandwiched by the second gate beyond first gate and polysilicon layer is thicker and produces a smaller electric field, which simplifies process and reduce cost.

Abstract: The invention provides a manufacturing method for LTPS TFT substrate. After forming N+ areas on both sides of polysilicon layer, the first gate insulating layer, first gate, second gate insulating layer, and second gate are sequentially formed on polysilicon layer, and the second gate is wider than first gate to produce a low electric field region in the polysilicon layer to reduce leakage current; alternatively, forming first gate and first gate insulating layer, forming polysilicon layer and N+ areas on both sides of polysilicon layer, forming second gate insulating layer and second gate on polysilicon layer, the second gate insulating layer is thicker than first gate insulating layer and the second gate is wider than first gate, so that the second gate insulating layer sandwiched by the second gate beyond first gate and polysilicon layer is thicker and produces a smaller electric field, which simplifies process and reduce cost.

Abstract: The present invention provides a low temperature polysilicon thin film transistor and a fabricating method thereof. According to the method, a laser annealing process is performed to a remained portion of a a-Si layer on a substrate to form a first lightly doped drain (LDD) terminal, a second LDD terminal, a first phosphor material structure and a second phosphor material structure. A gate metal layer is then formed on the remained portion of the a-Si layer. A source metal layer and a drain metal layer are formed on the first doped layer and the second doped layer located at opposite sides of the gate metal layer, respectively. The present invention use the high temperature of the laser annealing process to perform a heat diffusion of phosphor material to form the LDD terminal and the phosphor material structure, the times of photomasks are used is reduced, and the process is simplified.

Abstract: The present invention provides a method for manufacturing a LTPS TFT substrate and a LTPS TFT substrate. The method for manufacturing the LTPS TFT substrate of the present invention forms a thermally conductive electrical insulation layer having excellent properties of electrical insulation and thermal conductivity on a buffer layer to quickly absorb a great amount of heat during a RTA process to be transferred to an amorphous silicon layer in contact therewith so that the portion of the amorphous silicon at this site shows an increased efficiency of crystallization, whereby polycrystalline silicon has an increased grain size and reduced gain boundaries and thus the mobility of charge carriers of a corresponding TFT device is increased and the influence of the leakage current caused by grain boundary is reduced.

Abstract: The present invention provides a method for manufacturing a LTPS TFT substrate and a LTPS TFT substrate. The method for manufacturing the LTPS TFT substrate of the present invention forms a thermally conductive electrical insulation layer having excellent properties of electrical insulation and thermal conductivity on a buffer layer to quickly absorb a great amount of heat during a RTA process to be transferred to an amorphous silicon layer in contact therewith so that the portion of the amorphous silicon at this site shows an increased efficiency of crystallization, whereby polycrystalline silicon has an increased grain size and reduced gain boundaries and thus the mobility of charge carriers of a corresponding TFT device is increased and the influence of the leakage current caused by grain boundary is reduced.

Abstract: The present invention provides a low temperature polysilicon thin film transistor and a fabricating method thereof. According to the method, a laser annealing process is performed to a remained portion of a a-Si layer on a substrate to form a first lightly doped drain (LDD) terminal, a second LDD terminal, a first phosphor material structure and a second phosphor material structure. A gate metal layer is then formed on the remained portion of the a-Si layer. A source metal layer and a drain metal layer are formed on the first doped layer and the second doped layer located at opposite sides of the gate metal layer, respectively. The present invention use the high temperature of the laser annealing process to perform a heat diffusion of phosphor material to form the LDD terminal and the phosphor material structure, the times of photomasks are used is reduced, and the process is simplified.