Abstract: A multilayer electronic component includes: a body including a dielectric layer, first and second internal electrodes, alternately disposed with the dielectric layer disposed therebetween, first and second surfaces opposing each other in a first direction, third and fourth surfaces connected to the first and second surfaces and opposing each other in a second direction, and fifth and sixth surfaces connected to the first to fourth surfaces and opposing each other in a third direction; a first base electrode layer disposed on the third surface and including a first connection portion connected to the first internal electrode; a second base electrode layer disposed on the fourth surface and including a second connection portion connected to the second internal electrode; a first electrode layer disposed on a region including the third surface, the first surface, and the second surface, and formed to expose at least a portion of the first base electrode layer; and a second electrode layer disposed on a region in

Abstract: The present invention relates to nitrogen-containing heterocyclic compounds having a phenyl group and uses thereof. The compounds, according to the present invention, effectively enhance synaptic plasticity without side-effects and thus may exhibit treatment effects for various neurological disorders such as neurodegenerative disease, neurodegenerative pathology, neuropsychiatric disorder, amnesia, cognitive impairment/damage, and extinction learning disorder.

Abstract: The present invention relates to nitrogen-containing heterocyclic compound derivatives and uses thereof. The compounds according to the present invention can exert therapeutic effects on various neurological disorders, such as neurodegenerative diseases, neurodegenerative pathologies, neuropsychiatric disorders, memory loss, cognitive dysfunction/impairment, and impairment of extinction learning, by effectively enhancing synaptic plasticity without side effects.

Abstract: A vehicle including a relay welding diagnosis function and a relay welding diagnosis method performed in the vehicle, is configured to be connectable to a charger providing a charging voltage, and includes a fuel cell configured to provide a stack voltage, a multi-converter configured to increase the level of the charging voltage or the stack voltage and to output the charging voltage or the stack voltage having the increased level as a boosted voltage, a charging relay disposed between the charger and the multi-converter, and a battery configured to store electrical energy of the boosted voltage. The multi-converter includes a voltage booster connected between the charging relay and the battery and configured to generate the boosted voltage and a converter controller configured to diagnose whether the charging relay is welded using a result of sensing an input-terminal voltage and an output-terminal voltage of the charging relay.

Abstract: Disclosed a display device and a method of driving the same. Each of sub-pixels in the display device includes: a light-emitting element; a driving element; a first switch element; a second switch element; a third switch element; and a fourth switch element. A gate signal includes: a first-first scan signal applied to a gate electrode of the fourth switch element, a first-second scan signal applied to a gate electrode of the third switch element, a second scan signal applied to a gate electrode of the second switch element, and an emission control signal applied to a gate electrode of the first switch element. A pulse of the first-first scan signal has the same pulse width as a pulse of the first-second scan signal and precedes the pulse of the first-second scan signal.

Abstract: A display device including a display panel including data lines, gate lines, power lines, and sub-pixels; a gate driver to supply a gate signal to the gate lines; a data driver configured to supply a data voltage to the data lines during a refresh frame period prior to a hold frame period; and a compensation voltage generator configured to during the hold frame period, output a first compensation voltage to the data lines instead of the data voltage supplied by the data driver, and output a second compensation voltage and a third compensation voltage to the power lines connected to the sub-pixels, and during the refresh frame period, output the second compensation voltage and the third compensation voltage to the power lines without outputting the first compensation voltage.

Abstract: A semiconductor package includes an interposer structure extending in a first direction and including an inner area and an outer area defined by an inner area, a first semiconductor chip mounted on the inner area and electrically connected to the interposer structure, a plurality of bumps disposed between the first semiconductor chip and the interposer structure, and contacting each of the first semiconductor chip and the interposer structure, an underfill filling a space between the interposer structure and the first semiconductor chip and covering the plurality of bumps; and a mold layer disposed on the outer area and surrounding the first semiconductor chip, wherein the interposer structure includes a decoupling capacitor, wherein a ratio of a length in the first direction of the first semiconductor chip to a length in the first direction of the interposer structure is in a range of 0.9 inclusive to 1 exclusive.

Abstract: A semiconductor package including a first semiconductor chip, a second semiconductor chip disposed on the first semiconductor chip, and a third semiconductor chip disposed on the second semiconductor chip. A first pad is disposed on a top surface of the second semiconductor chip, and includes a first portion and a second portion protruding in a vertical direction from the first portion. A width of the first portion in a first horizontal direction is greater than a width of the second portion in the first horizontal direction. A second pad is disposed on a bottom surface of the third semiconductor chip facing the top surface of the second semiconductor chip, and a solder ball is disposed as surrounding a sidewall of the second portion of the first pad between the first pad and the second pad.

Abstract: An active pen sensing device, a display device comprising same and a sensing driving method are provided; and the active pen sensing device can include a plurality of division blocks divided into a matrix along a first direction and a second direction intersecting the first direction, each of which comprises a plurality of sensing cells, a plurality of first sensing lines connected to the plurality of sensing cells of each of the plurality of division blocks along the first direction, a plurality of second sensing lines connected to the plurality of sensing cells of each of the plurality of division blocks along the second direction, and a sensing driving device connected to the plurality of first sensing lines and the plurality of second sensing lines to drive the plurality of division blocks.

Abstract: An embodiment power control apparatus for a fuel cell vehicle includes a first relay connected to a fuel cell stack, a second relay selectively connected to an external charger, a converter connected to the first relay and the second relay, wherein the converter is configured to convert first electric power input thereto via the first relay into first demand electric power, convert second electric power input thereto via the second relay into second demand electric power, and supply the first demand electric power or the second demand electric power to a power consumption device, and a controller configured to control the first relay, the second relay, and the converter.

Abstract: A system is configured to evaluate a semiconductor device. The system is for irradiating a test target semiconductor device arranged on a test board with a radiation test beam to measure an error value of the test target semiconductor device, wherein the test target semiconductor device includes a reference test target semiconductor device and a general test target semiconductor device, the system for evaluating the semiconductor device derives a reference error value of the reference test target semiconductor device and a reference error value of the general test target semiconductor device, and the reference error value of the general test target semiconductor device is able to be defined as a relative ratio to the reference error value of the reference test target semiconductor device.

Abstract: Provided are a gate driving circuit and a display device including the same. The gate driving circuit includes a first outputter for outputting a first scan pulse that swings between a gate-on voltage and a first gate-off voltage, a second outputter for outputting a second scan pulse that swings between the gate-on voltage and a second gate-off voltage, and a controller for controlling the first and second outputters. The first gate-off voltage is set to be higher or lower than the second gate-off voltage.

Abstract: A spectroscopy system that includes a light source that generates light having a plurality of wavelengths, a light transmitter that transmits the light to a target analyte, a light receiver that receives Raman-scattered light scattered from the target analyte, and a multi-wavelength spectroscopy assembly that acquires a spectrum by splitting the Raman-scattered light transmitted from the light receiver. The multi-wavelength spectroscopy assembly includes a single diffraction grating configured to diffract the Raman-scattered light and a single concave mirror configured to focus the Raman-scattered light.

Abstract: The present disclosure is a high-speed molding device. According to the present invention, a product 14 may be manufactured by filling resin in a cavity 12 formed by a first mold 10 and a second mold. A gas generated during the filling of the cavity 12 with the resin may be discharged through a vent unit 20. The vent unit 20 has a first flow path 23 and a second flow path 33 to discharge the gas, while the resin is allowed to flow up to only the first flow path 23.

Abstract: A light-emitting display device includes a display panel including a plurality of subpixels each including a light-emitting element, a data driver configured to supply a data voltage and a reset voltage to each of the subpixels, and a scan driver configured to output an emission signal for controlling a non-emission period and an emission period of the light-emitting element and a reset signal for controlling a reset period of each of the subpixels, wherein the scan driver outputs the emission signal a plurality of times in one frame period and outputs the reset signal a plurality of times in a non-emission period according to the emission signal, and at least one of a plurality of emission signals or a plurality of reset signals has at least one of a different delay period or a different pulse width.

Abstract: A semiconductor package may include a circuit board, an interposer structure on the circuit board, a mold layer, and a first semiconductor chip and a second semiconductor chip spaced apart from each other in a first direction on a center region of the interposer structure and electrically connected to the interposer structure. The interposer structure may include a plurality of trenches in an edge region of the interposer structure and extending through the interposer structure. The mold layer may be in the plurality of trenches and may wrap the first and second semiconductor chips. The mold layer may include a penetrating portion in the plurality of trenches and a stack portion on the interposer structure. A bottom surface of the penetrating portion of the mold layer may be on a same plane as a bottom surface of the interposer structure.

Abstract: A semiconductor package is provided. The semiconductor package comprises a first semiconductor chip including the first signal wiring structure disposed in an upper surface thereof, and a first power wiring structure disposed in a lower surface thereof, a second semiconductor chip disposed on the first signal wiring structure and including a second signal wiring structure, a second power wiring structure disposed on the second semiconductor chip and a first power connection pillar connecting the first power wiring structure and the second power wiring structure to each other.

Abstract: A semiconductor package including a first semiconductor chip, a second semiconductor chip disposed on the first semiconductor chip, and a third semiconductor chip disposed on the second semiconductor chip. A first pad is disposed on a top surface of the second semiconductor chip, and includes a first portion and a second portion protruding in a vertical direction from the first portion. A width of the first portion in a first horizontal direction is greater than a width of the second portion in the first horizontal direction. A second pad is disposed on a bottom surface of the third semiconductor chip facing the top surface of the second semiconductor chip, and a solder ball is disposed as surrounding a sidewall of the second portion of the first pad between the first pad and the second pad.

Abstract: The present disclosure relates to a multi-chip clock synchronization device and a method capable of reducing an operating frequency and power consumption when a plurality of chips share clocks for multi-chip clock synchronization, which may include a reference clock supply unit connected to a plurality of chips and supplying a reference clock of a first frequency to each chip and a target clock generation unit generating a target clock of a second frequency based on the reference clock of the first frequency, wherein the reference clock supply unit may generate the reference clock of the first frequency which is N times lower than the second frequency of the target clock to supply the generated reference clock to each chip, and the target clock generation unit may multiply the first frequency of the reference clock by N times when the reference clock of the first frequency is input to generate the target clock of the second frequency.

Abstract: A light-emitting display device includes a display panel including a plurality of subpixels each including a light-emitting element, a data driver configured to supply a data voltage and a reset voltage to each of the subpixels, and a scan driver configured to output an emission signal for controlling a non-emission period and an emission period of the light-emitting element and a reset signal for controlling a reset period of each of the subpixels, wherein the scan driver outputs the emission signal a plurality of times in one frame period and outputs the reset signal a plurality of times in a non-emission period according to the emission signal, and at least one of a plurality of emission signals or a plurality of reset signals has at least one of a different delay period or a different pulse width.