Patents by Inventor Soo Jeon

Soo Jeon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180104914
    Abstract: A porous structure according to one embodiment of the present invention is constituted by a frame having a plurality of pores interconnected 3-dimensionally through a plurality of connecting passages. The plurality of pores defined by the frame are distributed in a closest packed state and are interconnected 3-dimensionally through a plurality of connecting passages in a symmetric structure, thus being effective in achieving a maximum porosity of the porous structure. A porous hierarchical structure according to one embodiment of the present invention includes a first porous structure having a plurality of 3-dimensionally interconnected first pores and a second porous structure having a plurality of 3-dimensionally interconnected second pores whose diameter is different from that of the first pores and surrounding and bonded to the first porous structure.
    Type: Application
    Filed: May 4, 2016
    Publication date: April 19, 2018
    Applicants: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY), INTELLIGENT SYNTHETIC BIOLOGY CENTER
    Inventors: Dong Rip KIM, Min Soo JEON, Jeong Hun HWANG, Sun Chang KIM, Byung Kwan CHO, Chang Sung HEU
  • Patent number: 9929252
    Abstract: A method of forming a thin film includes forming an interface layer stack on a semiconductor substrate. Forming the interface layer stack may include performing a first surface treatment on the semiconductor substrate under a reducing atmosphere. Forming the interface layer stack may include performing a second surface treatment on the semiconductor substrate. The first surface treatment may be performed under a reducing atmosphere and the second surface treatment may be performed under a nitridation atmosphere. The first surface treatment may include forming a lower interface layer on a surface of the semiconductor substrate and the second surface treatment may include forming an upper interface layer. The first surface treatment may include selectively removing at least one oxide material from a native oxide film on the semiconductor substrate.
    Type: Grant
    Filed: April 20, 2016
    Date of Patent: March 27, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sun-gyu Choi, Sang-jin Hyun, Taek-soo Jeon, Hoon-joo Na, Young-suk Chai
  • Publication number: 20180080361
    Abstract: Provided is a urea solution pump module including: a flange portion coupled to cover an opened mounting hole of a urea solution tank; a pump disposed near an upper surface of the flange portion; a filter formed to surround the pump, disposed to be spaced apart from the pump, and coupled to the flange portion; an internal heater disposed between the pump and the filter and coupled to the flange portion; and a first fin having one side connected to the internal heater and the other side disposed near the pump. If the urea solution received in the urea solution tank is frozen, the pump and the urea solution frozen around the pump may be quickly and efficiently thawed.
    Type: Application
    Filed: September 20, 2017
    Publication date: March 22, 2018
    Inventors: Tae Hoon Lee, Ji Ho Jung, Jong Hyuk Yoon, Yong Soo Jeon
  • Publication number: 20170367805
    Abstract: The present invention relates to an inhalation toxicity testing chamber device for nanoparticles having a plurality of concentrations. The present invention provides an inhalation toxicity testing chamber device for nanoparticles having a plurality of concentrations, which: can supply nanoparticles having different concentrations to particle exposure modules by stacking a plurality of particle exposure modules inside a single chamber housing and by allowing each particle exposure module so as to form an independent space from each other; can perform inhalation toxicity testing of nanoparticles having a plurality of concentrations through a single chamber housing by being capable of exposing the test animals put into each particle exposure module to nanoparticles having different concentrations; can easily perform inhalation toxicity tests of nanoparticles in a small scale laboratory etc.
    Type: Application
    Filed: January 7, 2015
    Publication date: December 28, 2017
    Applicants: HYUNDAI CALIBRATION & CERTIFICATION TECHNOLOGIES C O., LTD., KOREA RESEARCH INSTITUTE OF CHEMICAL TECHNOLOGY
    Inventors: Kyu Hong LEE, Yong Taek KWON, Ki Soo JEON, Jae Seong LEE, Ki Won SEO, Ji Hyun HAN
  • Patent number: 9786761
    Abstract: An integrated circuit device includes a substrate including an active region, an interfacial layer including a lower insulating layer on the active region, the lower insulating layer doped with a chalcogen element having an atomic weight equal to or greater than 16, a gate insulation layer on the interfacial layer, and a gate electrode on the gate insulation layer.
    Type: Grant
    Filed: December 1, 2015
    Date of Patent: October 10, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-soo Lee, Hu-yong Lee, Won-keun Chung, Hoon-joo Na, Taek-soo Jeon, Sang-jin Hyun
  • Publication number: 20170256544
    Abstract: A semiconductor device including a MOS transistor is provided. The semiconductor device may include a first MOS transistor including first source/drain regions, a first semiconductor layer between the first source/drain regions, a first gate electrode structure, and a first gate dielectric structure; and a second MOS transistor including second source/drain regions, a second semiconductor layer between the second source/drain regions, a second gate electrode structure, and a second gate dielectric structure. The first gate dielectric structure and the second gate dielectric structure include a first common dielectric structure; the first gate dielectric structure includes a first upper dielectric on the first common dielectric structure; the second gate dielectric structure includes the first upper dielectric and a second upper dielectric; and one of the first upper dielectric and the second upper dielectric is a material forming a dipole layer.
    Type: Application
    Filed: November 15, 2016
    Publication date: September 7, 2017
    Inventors: Young Suk CHAI, Hu Yong LEE, Sang Yong KIM, Taek Soo JEON, Won Keun CHUNG, Sang Jin HYUN
  • Publication number: 20170162748
    Abstract: Provided are a polyhedron of which the upper width is narrower than the lower width, a manufacturing method therefor, and a photoelectric conversion device comprising the same. The photoelectric conversion device comprises: a substrate; a polyhedron disposed on the substrate and of which the upper width is narrower than the lower width; and a semiconductor layer disposed on the polyhedron. The photoelectric conversion device to which the polyhedron, of which the upper width is narrower than the lower width, is applied can have improved photoelectric conversion efficiency due to structural characteristics of the polyhedron.
    Type: Application
    Filed: July 14, 2015
    Publication date: June 8, 2017
    Applicant: Industry-University Cooperation Foundation Hanyang University
    Inventors: Dong Rip KIM, Hanmin JANG, Min Soo JEON
  • Publication number: 20170117190
    Abstract: A semiconductor device includes a first trench and a second trench, a liner pattern along a portion of side surfaces and along bottom surfaces of the first and the second trenches, respectively, a work function metal in the first and the second trenches and on the liner pattern, respectively, a first barrier metal in the first trench and on the work function metal, and having a first thickness, a second barrier metal in the second trench and on the work function metal, and having a second thickness thicker than the first thickness, and a first fill metal on the first barrier metal.
    Type: Application
    Filed: June 27, 2016
    Publication date: April 27, 2017
    Inventors: Won-Keun CHUNG, Hu-Yong LEE, Taek-Soo JEON, Sang-Jin HYUN
  • Publication number: 20170044368
    Abstract: Disclosed is a flame-retardant polyphenylene ether resin composition having high rigidity and high impact strength. More particularly, disclosed is a flame-retardant polyphenylene ether resin composition having high rigidity and high impact strength which enhances environmental stress cracking resistance and impact resistance, compared to general materials, while exhibiting superior mechanical strength such as flame retardancy, tensile strength, flexural strength, flexural modulus, etc. through addition of particularly glass fiber, maleic anhydride-grafted polyphenylene ether, a thermoplastic styrenic elastomer, an ethylene terpolymer and an epoxy resin to a polyphenylene ether resin, and thus, may be used as a material of automobile battery cell modules or electric/electronic components.
    Type: Application
    Filed: December 4, 2015
    Publication date: February 16, 2017
    Applicants: HYUNDAI MOTOR COMPANY, Hyundai EP Co., Ltd.
    Inventors: Sang Soo JEON, Seung Woo CHOI, Tae Seung LEE, Hee Gu YEO, Yong Ki HWANG, Dong Bum SEO
  • Publication number: 20160315165
    Abstract: An integrated circuit device includes a substrate including an active region, an interfacial layer including a lower insulating layer on the active region, the lower insulating layer doped with a chalcogen element having an atomic weight equal to or greater than 16, a gate insulation layer on the interfacial layer, and a gate electrode on the gate insulation layer.
    Type: Application
    Filed: December 1, 2015
    Publication date: October 27, 2016
    Inventors: Dong-soo LEE, Hu-yong LEE, Won-keun CHUNG, Hoon-joo NA, Taek-soo JEON, Sang-jin HYUN
  • Publication number: 20160314963
    Abstract: A method of forming a thin film includes forming an interface layer stack on a semiconductor substrate. Forming the interface layer stack may include performing a first surface treatment on the semiconductor substrate under a reducing atmosphere. Forming the interface layer stack may include performing a second surface treatment on the semiconductor substrate. The first surface treatment may be performed under a reducing atmosphere and the second surface treatment may be performed under a nitridation atmosphere. The first surface treatment may include forming a lower interface layer on a surface of the semiconductor substrate and the second surface treatment may include forming an upper interface layer. The first surface treatment may include selectively removing at least one oxide material from a native oxide film on the semiconductor substrate.
    Type: Application
    Filed: April 20, 2016
    Publication date: October 27, 2016
    Inventors: SUN-GYU CHOI, Sang-jin HYUN, Taek-soo JEON, Hoon-joo NA, Young-suk CHAI
  • Patent number: 9430218
    Abstract: Provided is an apparatus for executing an update, which executes an update of a specific application installed in a device, the apparatus including: a predetermined value receiving unit configured to receive information on a randomly selected value among values within a predetermined range from an update providing server; an open date receiving unit configured to receive information on an update open time from the update providing server; an update time calculating unit configured to calculate an update time of the specific application by using the received information on the randomly selected value and on the update open time; an update information receiving unit configured to receive update information about the specific application after the calculated update time; and an update executing unit configured to execute an update of the specific application by using the received update information.
    Type: Grant
    Filed: October 30, 2014
    Date of Patent: August 30, 2016
    Assignee: SAMSUNG SDS CO., LTD.
    Inventors: Ji Joong Gil, Nam Soo Jeon, Hyun Woo Jung, Jae Seok Choi
  • Patent number: 9412842
    Abstract: A gate pattern is formed on a first region of a substrate. An epitaxial layer is formed on a second region of the substrate. A recess is formed in the second region of the substrate by etching the epitaxial layer and the substrate underneath. The first region is adjacent to the second region.
    Type: Grant
    Filed: July 3, 2013
    Date of Patent: August 9, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jin-Bum Kim, Kyung-Bum Koo, Taek-Soo Jeon, Tae-Ho Cha, Judson R Holt, Henry K Utomo
  • Publication number: 20160170514
    Abstract: The present disclosure relates to a touch screen structure and a manufacturing method thereof. The touch screen structure includes: a touch panel part preventing light from being reflected to an upper surface and a lower surface; and an LCD part positioned at a lower portion, including the touch panel part and an air layer, whereby the high-durability anti reflection coating layer is formed on the anti glare film to improve the scratch resistance, the salt water resistance, the light resistance, and the like so as to reduce the light reflectance of the touch screen and improve the visibility, thereby improving the marketability and convenience and realizing the anti-glaring to safely drive the vehicle.
    Type: Application
    Filed: May 4, 2015
    Publication date: June 16, 2016
    Inventors: Sang Soo JEON, Tae Seung LEE
  • Publication number: 20160066210
    Abstract: A receiving device includes: a communication unit to receive a plurality of partial data divided from data to be transmitted through two or more connection networks; an information confirming unit to confirm (i) transmission order information and (ii) network transmission order information indicating related to a transmission order assigned to of the specific partial data among the plurality of partial data to be transmitted through a the specific connection network designated among the two or more connection networks; and the control unit to determine whether non-received partial data are lost based on at least one of the transmission order information and the network transmission order information.
    Type: Application
    Filed: March 18, 2014
    Publication date: March 3, 2016
    Inventors: Jae Seong JANG, Kyung Hoon Kim, Kyung Heum Han, Ji Hoon Kim, Jin Soo Jeon, In Jang Jeong
  • Publication number: 20160047144
    Abstract: An electromagnetic lock assembly includes a magnet block having a coil assembly and a connection for receiving an electrical current; and a control system having a detection circuit and an activation circuit, wherein the detection circuit senses a voltage across the coil and automatically sends an activation signal to the activation circuit when the voltage decreases from a supply voltage to a reference threshold voltage, the activation circuit increasing the electrical current through or the voltage across the coil assembly upon receipt of the activation signal. The electromagnetic lock assembly may further include an armature for coupling with the magnet block, wherein the supply voltage is configured by the control system to magnetically couple the armature and the magnet block absent an external separating force applied against the armature or magnet block.
    Type: Application
    Filed: April 4, 2014
    Publication date: February 18, 2016
    Inventors: Ryan McMillan, Soo Jeon, Vahid Babakeshizadeh
  • Patent number: 9258737
    Abstract: A receiving device includes: a communication unit to receive a plurality of partial data divided from data to be transmitted through two or more connection networks; an information confirming unit to confirm (i) transmission order information and (ii) network transmission order information indicating related to a transmission order assigned to of the specific partial data among the plurality of partial data to be transmitted through a the specific connection network designated among the two or more connection networks; and the control unit to determine whether non-received partial data are lost based on at least one of the transmission order information and the network transmission order information.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: February 9, 2016
    Assignee: SK TELECOM CO., LTD.
    Inventors: Jae Seong Jang, Kyung Hoon Kim, Kyung Heum Han, Ji Hoon Kim, Jin Soo Jeon, In Jang Jeong
  • Publication number: 20150271702
    Abstract: A receiving device includes: a communication unit to receive a plurality of partial data divided from data to be transmitted through two or more connection networks; an information confirming unit to confirm (i) transmission order information and (ii) network transmission order information indicating related to a transmission order assigned to of the specific partial data among the plurality of partial data to be transmitted through a the specific connection network designated among the two or more connection networks; and the control unit to determine whether non-received partial data are lost based on at least one of the transmission order information and the network transmission order information.
    Type: Application
    Filed: March 18, 2014
    Publication date: September 24, 2015
    Inventors: Jae Seong JANG, Kyung Hoon Kim, Kyung Heum Han, Ji Hoon Kim, Jin Soo Jeon, In Jang Jeong
  • Patent number: 9070561
    Abstract: Provided are a semiconductor device and a bonding structure thereof, in which an inter-metal compound is not formed with a semiconductor die or a lead frame, thereby improving electrical and mechanical properties and wettability and suppressing conglomeration of a die bonding material. The semiconductor device includes a semiconductor die, a barrier layer formed on a surface of the semiconductor die, a first metal layer formed on the barrier layer, a central metal layer formed on the first metal layer, and a second metal layer formed on the central metal layer. Here, the first and second metal layers have a first melting temperature, and the central metal layer has a second melting temperature lower than the first melting temperature.
    Type: Grant
    Filed: October 16, 2014
    Date of Patent: June 30, 2015
    Assignee: KEC Corporation
    Inventors: Kyu Hyo Hwang, Jong Hong Lee, Gab Soo Choi, Cha Soo Jeon, Jin Sang Park, Sang Bo Bae, Yong Min Park, Sung Jin An
  • Publication number: 20150163856
    Abstract: A carbon fiber plate heating element and a method for producing the same are provided. The carbon fiber plate heating element includes a core wire positioned at a substantial center and an electrode body that includes a plurality of electrode fine lines twisted around the core wire. A stitching portion fixes the electrode body to a main panel at regular intervals. The method includes arranging a core wire at the substantial center; twisting a plurality of electrode fine lines around the core wire to form an electrode body; and fixing the electrode body to a main panel by stitching the electrode body at regular intervals.
    Type: Application
    Filed: July 14, 2014
    Publication date: June 11, 2015
    Inventors: Sang Soo Jeon, Tae Seung Lee, Gyu Jin Shin