Abstract: An electronic device includes a target address generation circuit configured to generate a counting signal by counting the number of times each logic level combination of an address is input by performing an internal read operation and an internal write operation during an active operation, configured to store the counting signal as the storage counting signal when the counting signal is counted more than a storage counting signal that is stored therein, and configured to store the address, corresponding to the counting signal, as a target address; and a refresh control circuit configured to control a smart refresh operation on the target address.

Abstract: An image sensor including a semiconductor substrate having a first surface and a second surface; and a pixel isolation film extending from the first surface of the semiconductor substrate into the semiconductor substrate and defining active pixels in the semiconductor substrate, wherein the pixel isolation film includes a buried conductive layer including polysilicon containing a fining element at a first concentration; and an insulating liner between the buried conductive layer and the semiconductor substrate, and wherein the fining element includes oxygen, carbon, or fluorine.

Abstract: An image sensor including a semiconductor substrate having a first surface and a second surface; and a pixel isolation film extending from the first surface of the semiconductor substrate into the semiconductor substrate and defining active pixels in the semiconductor substrate, wherein the pixel isolation film includes a buried conductive layer including polysilicon containing a fining element at a first concentration; and an insulating liner between the buried conductive layer and the semiconductor substrate, and wherein the fining element includes oxygen, carbon, or fluorine.

Abstract: An image device includes a first active region and a second active region disposed on a substrate. Each of the first active region and the second active region includes a gate insulating layer disposed on the substrate and a gate electrode disposed on the gate insulating layer. At least one of the first active region and the second active region further includes a first passivation layer containing fluorine (F) disposed between the gate insulating layer and the gate electrode. A concentration of fluorine in the gate insulating layer is higher than a concentration of fluorine in the gate electrode.

Abstract: An image sensor including a semiconductor substrate having a first surface and a second surface; and a pixel isolation film extending from the first surface of the semiconductor substrate into the semiconductor substrate and defining active pixels in the semiconductor substrate, wherein the pixel isolation film includes a buried conductive layer including polysilicon containing a fining element at a first concentration; and an insulating liner between the buried conductive layer and the semiconductor substrate, and wherein the fining element includes oxygen, carbon, or fluorine.

Abstract: An image sensor may include a substrate including first and second surfaces opposite each other, a plurality of photoelectric conversion devices isolated from direct contact with each other within the substrate, a first trench configured to extend into an interior of the substrate from the first surface of the substrate and between adjacent photoelectric conversion devices of the plurality of photoelectric conversion devices, a first supporter within the first trench, and a first isolation layer at least partially covering both sidewalls of the first supporter within the first trench, wherein a lower surface of the first supporter is coplanar with the first surface of the substrate.

Abstract: An image sensor including a semiconductor substrate having a first surface and a second surface; and a pixel isolation film extending from the first surface of the semiconductor substrate into the semiconductor substrate and defining active pixels in the semiconductor substrate, wherein the pixel isolation film includes a buried conductive layer including polysilicon containing a fining element at a first concentration; and an insulating liner between the buried conductive layer and the semiconductor substrate, and wherein the fining element includes oxygen, carbon, or fluorine.

Abstract: An image device includes a first active region and a second active region disposed on a substrate. Each of the first active region and the second active region includes a gate insulating layer disposed on the substrate and a gate electrode disposed on the gate insulating layer. At least one of the first active region and the second active region further includes a first passivation layer containing fluorine (F) disposed between the gate insulating layer and the gate electrode. A concentration of fluorine in the gate insulating layer is higher than a concentration of fluorine in the gate electrode.

Abstract: An image sensor may include a substrate including first and second surfaces opposite each other, a plurality of photoelectric conversion devices isolated from direct contact with each other within the substrate, a first trench configured to extend into an interior of the substrate from the first surface of the substrate and between adjacent photoelectric conversion devices of the plurality of photoelectric conversion devices, a first supporter within the first trench, and a first isolation layer at least partially covering both sidewalls of the first supporter within the first trench, wherein a lower surface of the first supporter is coplanar with the first surface of the substrate.

Abstract: An image sensor including a semiconductor substrate having a first surface and a second surface; and a pixel isolation film extending from the first surface of the semiconductor substrate into the semiconductor substrate and defining active pixels in the semiconductor substrate, wherein the pixel isolation film includes a buried conductive layer including polysilicon containing a fining element at a first concentration; and an insulating liner between the buried conductive layer and the semiconductor substrate, and wherein the fining element includes oxygen, carbon, or fluorine.

Abstract: A semiconductor device may include a semiconductor substrate, a trench isolation layer on the semiconductor substrate and configured to define an active region, and a multi-liner layer on an inside wall of a trench including the trench isolation layer. The multi-liner layer may include a first liner layer on the inside wall of the trench, a second liner layer on the first liner layer, and a third liner layer on the second liner layer.

Abstract: In a method of manufacturing a semiconductor device, a gate structure is formed on a substrate. An ion implantation process is performed at an upper portion of the substrate exposed by the gate structure, so that an ion implantation region is formed to have an expanded volume. The ion implantation process uses ions that are identical to a material of the substrate.

Abstract: A semiconductor device includes a substrate; a first inverter disposed on the substrate and receiving a voltage from any one of a bit line and a complementary bit line; a semiconductor layer disposed on the first inverter; and first and third switch devices disposed on the semiconductor layer and adjusting a threshold voltage of the first inverter to a voltage level of any one of the bit line and the complementary bit line.

Abstract: A precursor composition for forming a silicon dioxide film on a substrate, the precursor composition including at least one precursor compound represented by the following chemical formulas (1), (2), and (3): HxSiAy(NR1R2)4-x-y??(1) HxSi(NAR3)4-x??(2) HxSi(R4)z(R5)4-x-z??(3) wherein, independently in the chemical formulas (1), (2), and (3), H is hydrogen, x is 0 to 3, Si is silicon, A is a halogen, y is 1 to 4, N is nitrogen, and R1, R2, R3, and R5 are each independently selected from the group of H, aryl, perhaloaryl, C1-8 alkyl, and C1-8 perhaloalkyl, and R4 is aryl in which at least one hydrogen is replaced with a halogen or C1-8 alkyl in which at least one hydrogen is replaced with a halogen.

Abstract: In a method of manufacturing a semiconductor device, a gate structure is formed on a substrate. An ion implantation process is performed at an upper portion of the substrate exposed by the gate structure, so that an ion implantation region is formed to have an expanded volume. The ion implantation process uses ions that are identical to a material of the substrate.

Abstract: A semiconductor device includes a substrate; a first inverter disposed on the substrate and receiving a voltage from any one of a bit line and a complementary bit line; a semiconductor layer disposed on the first inverter; and first and third switch devices disposed on the semiconductor layer and adjusting a threshold voltage of the first inverter to a voltage level of any one of the bit line and the complementary bit line.

Abstract: The inventive concept provides methods of manufacturing semiconductor devices having a fine pattern. In some embodiments, the methods comprise forming an etch-target film on a substrate, forming a first mask pattern on the etch-target film, forming a second mask pattern by performing an ion implantation process in the first mask pattern, and etching the etch-target film using the second mask pattern.

Abstract: A precursor composition for forming a silicon dioxide film on a substrate, the precursor composition including at least one precursor compound represented by the following chemical formulas (1), (2), and (3): HxSiAy(NR1R2)4-x-y??(1) HxSi(NAR3)4-x??(2) HxSi(R4)z(R5)4-x-z??(3) wherein, independently in the chemical formulas (1), (2), and (3), H is hydrogen, x is 0 to 3, Si is silicon, A is a halogen, y is 1 to 4, N is nitrogen, and R1, R2, R3, and R5 are each independently selected from the group of H, aryl, perhaloaryl, C1-8 alkyl, and C1-8 perhaloalkyl, and R4 is aryl in which at least one hydrogen is replaced with a halogen or C1-8 alkyl in which at least one hydrogen is replaced with a halogen

Abstract: Provided are semiconductor devices including a semiconductor substrate, an insulating layer including a contact hole through which the semiconductor substrate is exposed, and a polysilicon layer filling the contact hole. The polysilicon layer is doped with impurities and includes an impurity-diffusion prevention layer. In the semiconductor devices, the impurities included in the polysilicon layer do not diffuse into the insulating layer and the semiconductor substrate due to the impurity-diffusion prevention layers.

Abstract: The inventive concept provides methods of manufacturing semiconductor devices having a fine pattern. In some embodiments, the methods comprise forming an etch-target film on a substrate, forming a first mask pattern on the etch-target film, forming a second mask pattern by performing an ion implantation process in the first mask pattern, and etching the etch-target film using the second mask pattern.