Abstract: A display panel includes pixels, each including a light emitting element and a pixel circuit connected to the light emitting element, data lines arranged in a plurality of columns, where the data lines supply data signals to the pixel circuit, data pads connected to the data lines, a first protection circuit connected between a first data line among the data lines and a first gate power line to which a first gate power voltage is applied, and a second protection circuit connected between a second data line among the data lines and a second gate power line to which a second gate power voltage is applied.

Abstract: A display device includes first and second pixels disposed adjacent to each other. Each of the first and second pixels includes a light-emitting element, a first transistor controlling a driving current flowing in the light-emitting element, a second transistor supplying a data voltage to a first electrode of the first transistor, a third transistor electrically connecting a second electrode of the first transistor and a gate electrode of the first transistor, and a fourth transistor discharging the gate electrode of the first transistor with a first initialization voltage. The first and second pixels share a fourth-first transistor including a first electrode connected to the fourth transistor of the first pixel and the fourth transistor of the second pixel, and a second electrode connected to a first initialization voltage line supplying the first initialization voltage.

Abstract: A display apparatus includes: a display panel including a plurality of pixels respectively connected to a plurality of gate lines; a gate driving circuit including a plurality of driving stages configured to apply gate signals to the gate lines; a voltage generator configured to output a gate-on voltage through a voltage output terminal thereof; and a signal controller configured to sense a variation in current of the voltage output terminal to output a back bias control voltage corresponding to the sensed current variation, wherein each of the driving stages comprises a plurality of oxide thin film transistors and at least one of the oxide thin film transistors is a four-terminal transistor in which a threshold voltage thereof is controlled by the back bias control voltage.

Abstract: A display apparatus includes: a display panel including a gate line, a storage line adjacent to the gate line, and a pixel, the pixel including a pixel transistor coupled to the gate line, a liquid crystal (“LC”) capacitor coupled to the pixel transistor, and a storage capacitor coupled to the LC capacitor; a first gate driver configured to provide a gate signal to the gate line; and a first level switch configured to provide a storage signal to the storage line, the storage signal being synchronized with the gate signal and having a phase opposite to a phase of the gate signal.

Abstract: A display device includes: a display unit including a plurality of pixels connected with data lines and scan lines with different lengths; a data driver configured to supply a data signal to the data lines; a scan driver configured to supply a scan signal to the scan lines; and a timing controller controlling the data driver to supply the data signal to the data lines at different output timings according to a position of a scan line to which the scan signal is supplied.

Abstract: A display apparatus includes: a display panel including a plurality of pixels respectively connected to a plurality of gate lines; a gate driving circuit including a plurality of driving stages configured to apply gate signals to the gate lines; a voltage generator configured to output a gate-on voltage through a voltage output terminal thereof; and a signal controller configured to sense a variation in current of the voltage output terminal to output a back bias control voltage corresponding to the sensed current variation, wherein each of the driving stages comprises a plurality of oxide thin film transistors and at least one of the oxide thin film transistors is a four-terminal transistor in which a threshold voltage thereof is controlled by the back bias control voltage.

Abstract: A display apparatus includes: a display panel including a plurality of pixels respectively connected to a plurality of gate lines; a gate driving circuit including a plurality of driving stages configured to apply gate signals to the gate lines; a voltage generator configured to output a gate-on voltage through a voltage output terminal thereof; and a signal controller configured to sense a variation in current of the voltage output terminal to output a back bias control voltage corresponding to the sensed current variation, wherein each of the driving stages comprises a plurality of oxide thin film transistors and at least one of the oxide thin film transistors is a four-terminal transistor in which a threshold voltage thereof is controlled by the back bias control voltage.

Abstract: A display device includes a display area including a gate line and a data line and a gate driver connected to an end of the gate line, the gate driver including at least one stages integrated on a substrate configured to output a gate voltage, in which the stage includes an inverter unit and an output unit, in which the output unit includes a first transistor and a first capacitor. The first transistor includes an input terminal applied with a clock signal, a control terminal connected to the node Q, and an output terminal connected to a gate voltage output terminal through which the gate voltage is output. An inverter voltage output from the inverter is lower than the low voltage of the gate voltage output by the output unit.

Abstract: A display apparatus includes a display panel and a driving circuit. The display panel includes pixels. Each of the pixels is connected to one of gate lines and one of data lines. The driving circuit drives the gate lines and the data lines to display an image on the display panel. The driving circuit alternately provides a first polarity data driving signal and a second polarity data driving signal to each of the plurality of data lines. During an asymmetrical mode, the first polarity data driving signal is provided to first data lines of the data lines during a first frame period before a blank period begins, and the second polarity data driving signal is provided to the first data lines during a second frame period after the blank period ends. The second frame period excludes the blank period.

Abstract: A display device includes a display area including a gate line and a data line and a gate driver connected to an end of the gate line, the gate driver including at least one stages integrated on a substrate configured to output a gate voltage, in which the stage includes an inverter unit and an output unit, in which the output unit includes a first transistor and a first capacitor. The first transistor includes an input terminal applied with a clock signal, a control terminal connected to the node Q, and an output terminal connected to a gate voltage output terminal through which the gate voltage is output. An inverter voltage output from the inverter is lower than the low voltage of the gate voltage output by the output unit.

Abstract: A smart watch includes: a housing; a window member connected to the housing; a display panel located in the housing, the display panel to display an image toward the window member; an analog movement located in the housing; a first time hand module to rotate by an operation of the analog movement; and an electronic module to control the display panel and the analog movement. The first time hand module includes: a first rotational shaft connected to the analog movement; a first horizontal portion connected to the first rotational shaft and located below the display panel; a first vertical portion connected to the first horizontal portion and facing a side edge of the display panel; and a first time hand connected to the first vertical portion and located above the display panel.

Abstract: A display device includes: a display unit including a plurality of pixels connected with data lines and scan lines with different lengths; a data driver configured to supply a data signal to the data lines; a scan driver configured to supply a scan signal to the scan lines; and a timing controller controlling the data driver to supply the data signal to the data lines at different output timings according to a position of a scan line to which the scan signal is supplied.

Abstract: An electroluminescent display and a method of driving the same are disclosed. In one aspect, the display includes a display panel including a plurality of pixels configured to operate based on a first power supply voltage having a negative voltage level. The display panel is configured to generate at least one feedback voltage corresponding to an ohmic drop of the first power supply voltage. An analog-to-digital converter is configured to generate at least one digital feedback signal based on the at least one feedback voltage. An adaptive voltage controller is configured to generate a voltage control signal based on input image data, the at least one digital feedback signal, a distribution of the input image data and the ohmic drop of the first power supply voltage. A voltage converter is configured to generate the first power supply voltage based on an input voltage and the voltage control signal.

Abstract: A display device includes: a substrate; a plurality of first signal lines formed to extend in a first direction on the substrate; and a plurality of second signal lines formed to extend in a second direction crossing the first direction and connected to the plurality of first signal lines, wherein wire widths of the first signal lines are formed to be different according to a length of the connected second signal lines.

Abstract: A display device includes a display area including a gate line and a data line and a gate driver connected to an end of the gate line, the gate driver including at least one stages integrated on a substrate configured to output a gate voltage, in which the stage includes an inverter unit and an output unit, in which the output unit includes a first transistor and a first capacitor. The first transistor includes an input terminal applied with a clock signal, a control terminal connected to the node Q, and an output terminal connected to a gate voltage output terminal through which the gate voltage is output. An inverter voltage output from the inverter is lower than the low voltage of the gate voltage output by the output unit.

Abstract: A display apparatus includes: a display panel including a plurality of pixels respectively connected to a plurality of gate lines; a gate driving circuit including a plurality of driving stages configured to apply gate signals to the gate lines; a voltage generator configured to output a gate-on voltage through a voltage output terminal thereof; and a signal controller configured to sense a variation in current of the voltage output terminal to output a back bias control voltage corresponding to the sensed current variation, wherein each of the driving stages comprises a plurality of oxide thin film transistors and at least one of the oxide thin film transistors is a four-terminal transistor in which a threshold voltage thereof is controlled by the back bias control voltage.

Abstract: An electroluminescent display and a method of driving the same are disclosed. In one aspect, the display includes a display panel including a plurality of pixels configured to operate based on a first power supply voltage having a negative voltage level. The display panel is configured to generate at least one feedback voltage corresponding to an ohmic drop of the first power supply voltage. An analog-to-digital converter is configured to generate at least one digital feedback signal based on the at least one feedback voltage. An adaptive voltage controller is configured to generate a voltage control signal based on input image data, the at least one digital feedback signal, a distribution of the input image data and the ohmic drop of the first power supply voltage. A voltage converter is configured to generate the first power supply voltage based on an input voltage and the voltage control signal.

Abstract: A display apparatus includes gate lines, data lines insulated from the gate lines while crossing the gate lines, and pixels each including sub-pixels in two successive rows by three successive columns. Among the sub-pixels in the two rows by the three columns, the sub-pixels in one of the three columns are respectively connected to a pair of different gate lines among three gate lines, and the sub-pixels in a different one of the three columns are connected to a remaining gate line among the three gate lines. The sub-pixels in the one and the different one of the three columns includes the same color filter and are applied with a gate signal transmitted in the same direction along pixel rows.

Abstract: A display apparatus includes: a display panel including a gate line, a storage line adjacent to the gate line, and a pixel, the pixel including a pixel transistor coupled to the gate line, a liquid crystal (“LC”) capacitor coupled to the pixel transistor, and a storage capacitor coupled to the LC capacitor; a first gate driver configured to provide a gate signal to the gate line; and a first level switch configured to provide a storage signal to the storage line, the storage signal being synchronized with the gate signal and having a phase opposite to a phase of the gate signal.

Abstract: A display device includes a display area including a gate line and a data line and a gate driver connected to an end of the gate line, the gate driver including at least one stages integrated on a substrate configured to output a gate voltage, in which the stage includes an inverter unit and an output unit, in which the output unit includes a first transistor and a first capacitor. The first transistor includes an input terminal applied with a clock signal, a control terminal connected to the node Q, and an output terminal connected to a gate voltage output terminal through which the gate voltage is output. An inverter voltage output from the inverter is lower than the low voltage of the gate voltage output by the output unit.