Abstract: The present invention pertains to a non-magnesium process to produce Compacted Graphite Iron (CGI) by placing a treatment alloy into a treatment ladle, and then placing an inoculant over the treatment alloy in the treatment ladle and pouring a molten base metal there over. The treatment alloy comprises iron, silicon and lanthanum, wherein lanthanum is 3-30% by weight of the treatment alloy, silicon is 40-50% by weight of the treatment alloy, and the remaining is Iron. Lanthanum in the treatment alloy makes the graphite precipitate as vermiculite (compacted form) instead of flake or spheroids. With extended process window offered by this new process (0.03-0.1% residual lanthanum in the metal) required to make CGI, this new process removes the stringent process control (0.01-0.02% residual magnesium in the metal) dictated by the magnesium process of making CGI.

Abstract: A device includes a first set of circuit components implementing a qubit and a second set of circuit components implementing a readout resonator for reading out a state of the qubit. A first footprint of the first set of circuit components overlaps a second footprint of the second set of circuit components. The first footprint is oriented relative to the second footprint based on a first electric dipole of the first set of circuit components and a second electric dipole of the second set of circuit components.

Abstract: A method of blocking access to files encrypted with a compromised key by mapping keys and ranges of containers encrypted by the keys. Upon notification that a key is compromised, fencing a container range corresponding to data segments encrypted by the compromised key to prevent deduplication operations on the segments. The method makes a point-in-time copy of the filesystem managing the segments, wherein each file of the file system is represented as tree structure having a root level and other levels. The method iteratively inspects in a level-wise manner, each container in each level of the file trees of the files to identify containers having segments encrypted by the compromised key, and marks files corresponding to the identified containers as not readable to block the access to the files encrypted with the compromised key.

Abstract: Systems and techniques that facilitate multi-resonant couplers for preserving ZX interaction while reducing ZZ interaction are provided. In various embodiments, a first qubit can have a first operational frequency and a second qubit can have a second operational frequency, and a multi-resonant architecture can couple the first qubit to the second qubit. In various embodiments, the multi-resonant architecture can comprise a first resonator and a second resonator. In various cases, the first resonator can capacitively couple the first qubit to the second qubit, and a second resonator can capacitively couple the first qubit to the second qubit. In various aspects, the first resonator and the second resonator can be in parallel.

Abstract: Systems and techniques that facilitate space-saving coupler arm arrangement for superconducting qubits are provided. In various embodiments, a device can comprise a superconducting qubit. In various aspects, the superconducting qubit can be capacitively coupled to two or more coupler arms. In various instances, a parasitic capacitance between the two or more coupler arms can be within an order of magnitude of a capacitance between the superconducting qubit and at least one of the two or more coupler arms. In various cases, the parasitic capacitance can arise due to a physical proximity between the two or more coupler arms.

Abstract: One or more systems, devices and/or methods of use provided herein relate to a device that can facilitate reduction of inter-qubit cross talk and/or allow for increased interaction strengths between qubits as compared to existing technologies. A device can comprise a qubit lattice comprising a plurality of repeated and connected unit cells, and the unit cells comprising individual sets of qubits, wherein the unit cells comprise different cross talk groups of qubits having qubit islands connected together by couplers in different orders, and wherein the different cross talk groups are repeated among the unit cells of the qubit lattice. A device can comprise a qubit lattice comprising a plurality of different, interconnected cross talk groups of qubits, wherein the different cross talk groups are repeated within the qubit lattice.

Abstract: Systems and techniques that facilitate Stark shift cancellation are provided. In various embodiments, a system can comprise a control qubit that is coupled to a target qubit. In various cases, the control qubit can be driven by a first tone that entangles the control qubit with the target qubit. In various aspects, the control qubit can be further driven by a second tone simultaneously with the first tone. In various cases, the second tone can have an opposite detuning sign than the first tone. In various instances, the first tone can cause a Stark shift in an operational frequency of the control qubit, and the second tone can cancel the Stark shift.

Abstract: Technologies for performing in-memory macro operations include a memory having a media access circuitry connected to a memory media. The media access circuitry is to receive a request to perform an in-memory macro operation indicative of a set of multiple in-memory operations. The media access circuitry is also to perform, in response to the request, the in-memory macro operation on data present in the memory media.

Abstract: An Inter-IC interface with a glitch filter including at least two cascaded RC filters configured to compensate a signal skew of the data or clock signal received from a data communication or clock signal line, feedback switches configured to pull up or pull down a voltage at an output node of each of the at least two cascaded RC filters, and feedforward transistors configured to condition a respective switch to the feedback switches to accelerate the pull up or the pull down.

Abstract: Techniques regarding an embedded microstrip transmission line implemented in one more superconducting microwave electronic devices are provided. For example, one or more embodiments described herein can comprise an apparatus, which can include a superconducting material layer positioned on a raised portion of a dielectric substrate. The raised portion can extend from a surface of the dielectric substrate. The apparatus can also comprise a dielectric film that covers at least a portion of the superconducting material layer and the raised portion of the dielectric substrate.

Abstract: An index associates fingerprints of file segments to container numbers of containers within which the file segments are stored. At a start of migration, a boundary is created identifying a current container number. At least a subset of file segments at a source storage tier are packed into a new container to be written to a destination storage tier. A new container number is generated for the new container. The index is updated to associate fingerprints of the at least subset of file segments to the new container number. A request is received to read a file segment. The index is queried with a fingerprint of the file segment to determine whether the request should be directed to the source or destination storage tier based on a container number of a container within which the file segment is stored.

Abstract: Techniques regarding an embedded microstrip transmission line implemented in one more superconducting microwave electronic devices are provided. For example, one or more embodiments described herein can comprise an apparatus, which can include a superconducting material layer positioned on a raised portion of a dielectric substrate. The raised portion can extend from a surface of the dielectric substrate. The apparatus can also comprise a dielectric film that covers at least a portion of the superconducting material layer and the raised portion of the dielectric substrate.

Abstract: Systems and techniques that facilitate multi-resonant couplers for preserving ZX interaction while reducing ZZ interaction are provided. In various embodiments, a first qubit can have a first operational frequency and a second qubit can have a second operational frequency, and a multi-resonant architecture can couple the first qubit to the second qubit. In various embodiments, the multi-resonant architecture can comprise a first resonator and a second resonator. In various cases, the first resonator can capacitively couple the first qubit to the second qubit, and a second resonator can capacitively couple the first qubit to the second qubit. In various aspects, the first resonator and the second resonator can be in parallel.

Abstract: An apparatus and method for performing efficient, adaptable tensor operations. For example, one embodiment of a processor comprises: front end circuitry to schedule matrix operations responsive to a matrix multiplication instruction; a plurality of lanes to perform parallel execution of the matrix operations, wherein a lane comprises an arithmetic logic unit to multiply a block of a first matrix with a block of a second matrix to generate a product and to accumulate the product with a block of a third matrix, and wherein the matrix blocks are to be stored in registers within the lane; and broadcast circuitry to broadcast one or more invariant matrix blocks to at least one of different registers within the lane and different registers across different lanes.

Abstract: Systems and techniques that facilitate multi-resonant couplers for preserving ZX interaction while reducing ZZ interaction are provided. In various embodiments, a first qubit can have a first operational frequency and a second qubit can have a second operational frequency, and a multi-resonant architecture can couple the first qubit to the second qubit. In various embodiments, the multi-resonant architecture can comprise a first resonator and a second resonator. In various cases, the first resonator can capacitively couple the first qubit to the second qubit, and a second resonator can capacitively couple the first qubit to the second qubit. In various aspects, the first resonator and the second resonator can be in parallel.

Abstract: Techniques regarding an embedded microstrip transmission line implemented in one more superconducting microwave electronic devices are provided. For example, one or more embodiments described herein can comprise an apparatus, which can include a superconducting material layer positioned on a raised portion of a dielectric substrate. The raised portion can extend from a surface of the dielectric substrate. The apparatus can also comprise a dielectric film that covers at least a portion of the superconducting material layer and the raised portion of the dielectric substrate.

Abstract: Technologies for providing multiple tier memory media management include a memory having a media access circuitry connected to a memory media. The media access circuitry is to receive a request to perform an in-memory compute operation. Additionally, the media access circuitry is to read, in response to the request, data from a memory media region of the memory media, write the read data into a compute media region of the memory, perform, on the data in the compute media region, the in-memory compute operation, write, to the memory media region, resultant data indicative of a result of performance of the in-memory compute operation.

Abstract: Devices and/or computer-implemented methods to facilitate a multipole filter on a quantum device with multiplexing capability and signal separation to mitigate crosstalk are provided. According to an embodiment, a device can comprise an interposer substrate comprising a readout resonator. The device can further comprise a qubit chip substrate comprising a qubit coupled to the readout resonator and to a multipole filter.

Abstract: Technologies for provisioning error-corrected data for use in in-memory compute operations include a memory that includes a memory media having multiple memory partitions and media access circuitry coupled to the memory media. The media access circuitry is to receive a request to perform an in-memory compute operation on data from the memory media. The request specifies a memory partition of the memory media in which the data is located. The media access circuitry reads the data from the memory partition. The media access circuitry performs error correction on the read data to produce error-corrected read data and stores the error-corrected read data in a temporary buffer for access by one or more in-memory compute operations, in addition to the requested in-memory compute operation.

Abstract: Systems and techniques that facilitate multi-resonant couplers for preserving ZX interaction while reducing ZZ interaction are provided. In various embodiments, a first qubit can have a first operational frequency and a second qubit can have a second operational frequency, and a multi-resonant architecture can couple the first qubit to the second qubit. In various embodiments, the multi-resonant architecture can comprise a first resonator and a second resonator. In various cases, the first resonator can capacitively couple the first qubit to the second qubit, and a second resonator can capacitively couple the first qubit to the second qubit. In various aspects, the first resonator and the second resonator can be in parallel.