Patents by Inventor Srikanth Srinivasan

Srikanth Srinivasan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120084332
    Abstract: A method, computer program product, and apparatus for managing a file system is presented. An object in the file system is identified in which one of a first pointer from the object to a first folder in the file system and a second pointer from the first folder to the object is incorrect. A number of folders is generated within a second folder in the file system that represents a path from a root of the file system to the first folder. The first pointer for the object is set to a last folder in the number of folders in which the last folder represents the first folder.
    Type: Application
    Filed: September 30, 2010
    Publication date: April 5, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tejas N. Bhise, Srikanth Srinivasan
  • Publication number: 20060277398
    Abstract: A method and apparatus for setting aside a long-latency micro-operation from a reorder buffer is disclosed. In one embodiment, a long-latency micro-operation would conventionally stall a reorder buffer. Therefore a secondary buffer may be used to temporarily store that long-latency micro-operation, and other micro-operations depending from it, until that long-latency micro-operation is ready to execute. These micro-operations may then be reintroduced into the reorder buffer for execution. The use of poisoned bits may be used to ensure correct retirement of register values merged from both pre- and post-execution of the micro-operations which were set aside in the secondary buffer.
    Type: Application
    Filed: June 3, 2005
    Publication date: December 7, 2006
    Inventors: Haitham Akkary, Ravi Rajwar, Srikanth Srinivasan, Christopher Wilkerson
  • Publication number: 20060149931
    Abstract: According to one embodiment, a method is disclosed. The method includes detecting a load miss at a central processing unit (CPU), stalling a read only buffer (ROB), speculatively retiring an instruction causing the ROB stall and subsequent instructions, keeping registers that have not been renamed in the ROB upon retirement, and flushing the CPU pipeline upon receiving data from the load miss.
    Type: Application
    Filed: December 28, 2004
    Publication date: July 6, 2006
    Inventors: Akkary Haitham, Doron Orenstein, Ravi Rajwar, Srikanth Srinivasan
  • Publication number: 20050138480
    Abstract: A method and apparatus for executing a selective recovery after a branch misprediction is disclosed. In one embodiment, the instructions following the mispredicted branch point may be saved for selective re-execution in a buffer. Those instructions that wrote to physical registers between the mispredicted branch point and an exact convergence point, thereby causing false data dependencies, may be followed by corresponding move instructions to eliminate the false data dependencies. The instructions subsequent to the exact convergence point may then be selectively re-executed if subject to the previous false data dependencies.
    Type: Application
    Filed: December 3, 2003
    Publication date: June 23, 2005
    Inventors: Srikanth Srinivasan, Amit Gandhi, Haitham Akkary
  • Publication number: 20050120192
    Abstract: Checkpoints may be used to recover from branch mispredictions using scalable rename map table recovery.
    Type: Application
    Filed: December 2, 2003
    Publication date: June 2, 2005
    Applicant: Intel Corporation ( a Delaware corporation)
    Inventors: Haitham Akkary, Ravi Rajwar, Srikanth Srinivasan
  • Publication number: 20050120179
    Abstract: A single-version data cache processes speculative stores using one or more checkpoints.
    Type: Application
    Filed: December 2, 2003
    Publication date: June 2, 2005
    Applicant: Intel Corporation (a Delaware corporation)
    Inventors: Haitham Akkary, Ravi Rajwar, Srikanth Srinivasan
  • Publication number: 20050120191
    Abstract: A processor enabled with checkpoints may be used to recover registers using counter entry and release.
    Type: Application
    Filed: December 2, 2003
    Publication date: June 2, 2005
    Applicant: Intel Corporation (a Delaware corporation)
    Inventors: Haitham Akkary, Ravi Rajwar, Srikanth Srinivasan