Patents by Inventor Srinivas Gandikota

Srinivas Gandikota has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods for gapfill in substrates
    Patent number: 11101128
    Abstract: The present disclosure provides methods for treating film layers in a substrate including positioning the substrate in a processing volume of a processing chamber. The substrate can have high aspect ratio features extending a depth from a substrate surface to a bottom surface. The feature can have a width defined by a first sidewall and a second sidewall. A film with a composition that includes metal is formed on the substrate surface and the first sidewall, the second sidewall, and the bottom surface of each feature. The film in the feature can have a seam extending substantially parallel to the first and second sidewalls. The film is annealed and exposed to an oxygen radical while converting the metal of the film to a metal oxide. The metal oxide is exposed to a hydrogen radical while converting the metal oxide to a metal fill layer.
    Type: Grant
    Filed: March 12, 2020
    Date of Patent: August 24, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Yixiong Yang, Wei Liu, Yuan-hui Lo, Srinivas Gandikota, Jacqueline Samantha Wrench, Yongjing Lin, Wen Ting Chen, ShihChung Chen
  • Methods of forming self-aligned vias
    Patent number: 11094544
    Abstract: Processing methods comprising selectively orthogonally growing a first material through a mask to provide an expanded first material are described. The mask can be removed leaving the expanded first material extending orthogonally from the surface of the first material. Further processing can create a self-aligned via.
    Type: Grant
    Filed: July 25, 2019
    Date of Patent: August 17, 2021
    Assignee: Applied Materials, Inc.
    Inventors: David Thompson, Benjamin Schmiege, Jeffrey W. Anthis, Abhijit Basu Mallick, Susmit Singha Roy, Ziqing Duan, Yihong Chen, Kelvin Chan, Srinivas Gandikota
  • Doped and undoped vanadium oxides for low-k spacer applications
    Patent number: 11094533
    Abstract: A microelectronic device on a semiconductor substrate comprises: a gate electrode; and a spacer adjacent to the gate electrode, the spacer comprising: a the low-k dielectric film comprising one or more species of vanadium oxide, which is optionally doped, and an optional silicon nitride or oxide film. Methods comprise depositing a low-k dielectric film optionally sandwiched by a silicon nitride or oxide film to form a spacer adjacent to a gate electrode of a microelectronic device on a semiconductor substrate, wherein the low-k dielectric film comprises a vanadium-containing film.
    Type: Grant
    Filed: October 2, 2019
    Date of Patent: August 17, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Eswaranand Venkatasubramanian, Srinivas Gandikota, Kelvin Chan, Atashi Basu, Abhijit Basu Mallick
  • LIDS AND LID ASSEMBLY KITS FOR ATOMIC LAYER DEPOSITION CHAMBERS
    Publication number: 20210246552
    Abstract: Apparatus for processing a substrate are provided herein. In some embodiments, a lid for a substrate processing chamber includes: a lid plate comprising an upper surface and a contoured bottom surface, the upper surface having a central opening and the contoured bottom surface having a first portion that extends downwardly and outwardly from the central opening to a peripheral portion of the lid plate and a second portion that extends radially outward along the peripheral portion of the lid plate; an upper flange extending radially outward from the lid plate; and one or more channels formed through the lid plate from the upper surface of the lid plate to the second portion of the contoured bottom surface.
    Type: Application
    Filed: April 28, 2021
    Publication date: August 12, 2021
    Inventors: Muhammad M. RASHEED, Srinivas GANDIKOTA, Mario Dan SANCHEZ, Guoqiang JIAN, Yixiong YANG, Deepak JADHAV, Ashutosh AGARWAL
  • Methods For Depositing Fluorine/Carbon-Free Conformal Tungsten
    Publication number: 20210225655
    Abstract: Provided are atomic layer deposition methods to deposit a tungsten film or tungsten-containing film using a tungsten-containing reactive gas comprising one or more of tungsten pentachloride, a compound with the empirical formula WCl5 or WCl6.
    Type: Application
    Filed: April 6, 2021
    Publication date: July 22, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Xinyu Fu, Srinivas Gandikota, Avgerinos V. Gelatos, Atif Noori, Mei Chang, David Thompson, Steve G. Ghanayem
  • Selective atomic layer deposition of ruthenium
    Patent number: 11066743
    Abstract: Methods of selectively depositing ruthenium are described. The preferred deposition surface changes based on the substrate temperature during processing. At high temperatures, ruthenium is deposited on a first surface of a conductive material over a second surface of an insulating material. At lower temperatures, ruthenium is deposited on an insulating surface over a conducting surface.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: July 20, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Yihong Chen, Yong Wu, Srinivas Gandikota, Abhijit Basu Mallick
  • Ultra-thin diffusion barriers
    Patent number: 11069568
    Abstract: In one embodiment, a method of forming a barrier layer is provided. The method includes positioning a substrate in a processing chamber, forming a barrier layer over the substrate and in contact with the underlayer, and annealing the substrate. The substrate comprises at least one underlayer having cobalt, tungsten, or copper. The barrier layer has a thickness of less than 70 angstroms.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: July 20, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Susmit Singha Roy, Yihong Chen, Abhijit Basu Mallick, Srinivas Gandikota
  • Enhanced spatial ALD of metals through controlled precursor mixing
    Patent number: 11043386
    Abstract: Methods of depositing a film by atomic layer deposition are described. The methods comprise exposing a substrate surface to a first process condition comprising a first reactive gas and a second reactive gas and exposing the substrate surface to a second process condition comprising the second reactive gas. The first process condition comprises less than a full amount of the second reactive gas for a CVD process.
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: June 22, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Kelvin Chan, Yihong Chen, Jared Ahmad Lee, Kevin Griffin, Srinivas Gandikota, Joseph Yudovsky, Mandyam Sriram
  • High-density low temperature carbon films for hardmask and other patterning applications
    Patent number: 11043372
    Abstract: Implementations of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the implementations described herein provide techniques for deposition of high-density films for patterning applications. In one implementation, a method of processing a substrate is provided. The method includes flowing a hydrocarbon-containing gas mixture into a processing volume of a process chamber having a substrate positioned on an electrostatic chuck. The substrate is maintained at a pressure between about 0.5 mTorr and about 10 Torr. The method further includes generating a plasma at the substrate level by applying a first RF bias to the electrostatic chuck to deposit a diamond-like carbon film on the substrate. The diamond-like carbon film has a density greater than 1.8 g/cc and a stress less than ?500 MPa.
    Type: Grant
    Filed: May 15, 2018
    Date of Patent: June 22, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Eswaranand Venkatasubramanian, Samuel E. Gottheim, Yang Yang, Pramit Manna, Kartik Ramaswamy, Takehito Koshizawa, Abhijit Basu Mallick, Srinivas Gandikota
  • Graphene Diffusion Barrier
    Publication number: 20210167021
    Abstract: A graphene barrier layer is disclosed. Some embodiments relate to a graphene barrier layer capable of preventing diffusion from a fill layer into a substrate surface and/or vice versa. Some embodiments relate to a graphene barrier layer that prevents diffusion of fluorine from a tungsten layer into the underlying substrate. Additional embodiments relate to electronic devices which contain a graphene barrier layer.
    Type: Application
    Filed: February 9, 2021
    Publication date: June 3, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Yong Wu, Srinivas Gandikota, Abhijit Basu Mallick, Srinivas D. Nemani
  • PMOS High-K Metal Gates
    Publication number: 20210134972
    Abstract: Metal gate stacks and integrated methods of forming metal gate stacks are disclosed. Some embodiment comprise MoN as a PMOS work function material. Some embodiments comprise TiSiN as a high-? capping layer. Some embodiments provide improved PMOS bandedge performance. Some embodiments provide improved PMOS bandedge performance with reduced EOT penalty.
    Type: Application
    Filed: November 4, 2020
    Publication date: May 6, 2021
    Inventors: Yixiong Yang, Jacqueline S. Wrench, Srinivas Gandikota, Yongjing Lin, Steven C.H. Hung, Shih Chung Chen, Haoyan Sha, Chi-Chou Lin
  • Metal and metal-derived films
    Patent number: 10998195
    Abstract: Embodiments described herein relate to methods and materials for fabricating semiconductor device structures. In one example, a metal film stack includes a plurality of metal containing films and a plurality of metal derived films arranged in an alternating manner. In another example, a metal film stack includes a plurality of metal containing films which are modified into metal derived films. In certain embodiments, the metal film stacks are used in oxide/metal/oxide/metal (OMOM) structures for memory devices.
    Type: Grant
    Filed: November 13, 2019
    Date of Patent: May 4, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Susmit Singha Roy, Yingli Rao, Srinivas Gandikota
  • In-situ tungsten deposition without barrier layer
    Patent number: 10991586
    Abstract: In-situ methods for depositing a metal film without the use of a barrier layer are disclosed. Some embodiments comprise forming an amorphous nucleation layer comprising one or more of silicon or boron and forming a metal layer on the nucleation layer. These processes are performed without an air break between processes.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: April 27, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Yong Wu, Wei V. Tang, Jianqiu Guo, Wenyi Liu, Yixiong Yang, Jacqueline S. Wrench, Mandyam Sriram, Srinivas Gandikota, Yumin He
  • Methods for depositing fluorine/carbon-free conformal tungsten
    Patent number: 10985023
    Abstract: Provided are atomic layer deposition methods to deposit a tungsten film or tungsten-containing film using a tungsten-containing reactive gas comprising one or more of tungsten pentachloride, a compound with the empirical formula WCl5 or WCl6.
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: April 20, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Xinyu Fu, Srinivas Gandikota, Avgerinos V. Gelatos, Atif Noori, Mei Chang, David Thompson, Steve G. Ghanayem
  • TREATMENTS TO ENHANCE MATERIAL STRUCTURES
    Publication number: 20210111020
    Abstract: A method of forming a high-K dielectric cap layer on a semiconductor structure formed on a substrate includes depositing the high-K dielectric cap layer on the semiconductor structure, depositing a sacrificial silicon cap layer on the high-K dielectric cap layer, performing a post cap anneal process to harden and densify the as-deposited high-K dielectric cap layer, and removing the sacrificial silicon cap layer.
    Type: Application
    Filed: November 18, 2020
    Publication date: April 15, 2021
    Inventors: Srinivas GANDIKOTA, Yixiong YANG, Jacqueline Samantha WRENCH, Yong YANG, Steven C. H. HUNG
  • P-Type Dipole For P-FET
    Publication number: 20210098581
    Abstract: Methods of forming and processing semiconductor devices are described. Certain embodiments related to electronic devices which comprise a dipole region having an interlayer dielectric, a high-K dielectric material, and a dipole layer. The dipole layer comprises one or more of titanium aluminum nitride (TiAlN), titanium tantalum nitride (TiTaN), titanium oxide (TiO), tantalum oxide (TaO), and titanium aluminum carbide (TiAlC).
    Type: Application
    Filed: September 28, 2020
    Publication date: April 1, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Yongjing Lin, Karla M. Bernal Ramos, Shih Chung Chen, Yixiong Yang, Lin Dong, Steven C.H. Hung, Srinivas Gandikota
  • Selective and self-limiting tungsten etch process
    Patent number: 10950498
    Abstract: Methods of dep-etch in semiconductor devices (e.g. V-NAND) are described. A metal layer is deposited in a feature. The metal layer is removed by low temperature atomic layer etching by oxidizing the surface of the metal layer and etching the oxide in a layer-by-layer fashion. After removal of the metal layer, the features are filled with a metal.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: March 16, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Susmit Singha Roy, Srinivas Gandikota, Pramit Manna, Abhijit Basu Mallick
  • Linerless continuous amorphous metal films
    Patent number: 10930493
    Abstract: Embodiments described herein generally relate to methods of depositing thin films and, more particularly, to depositing metal thin films. The methods herein provide a nucleation free conversion (NFC) approach which involves forming an amorphous silicon layer over the dielectric layer, and performing an NFC process which acts to convert the amorphous silicon layer into a thin metal film. In some embodiments, the NFC process is performed multiple times until the resulting thin metal film is continuous. A bulk metal is formed over the thin metal film.
    Type: Grant
    Filed: October 8, 2019
    Date of Patent: February 23, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Susmit Singha Roy, Yong Wu, Srinivas Gandikota
  • Bottom-Up Approach To High Aspect Ratio Hole Formation In 3D Memory Structures
    Publication number: 20210050365
    Abstract: Methods of forming memory structures are described. A metal film is deposited in the features of a structured substrate and volumetrically expanded to form pillars. A blanket film is deposited to a height less than the height of the pillars and the blanket film is removed from the top of the pillars. The height of the pillars is reduced so that the top of the pillars are below the surface of the blanket film and the process is optionally repeated to form a structure of predetermined height. The pillars can be removed from the features after formation of the predetermined height structure to form high aspect ratio features.
    Type: Application
    Filed: August 28, 2018
    Publication date: February 18, 2021
    Inventors: Praburam Gopalraja, Susmit Singha Roy, Abhijit Basu Mallick, Srinivas Gandikota
  • Self-Aligned Structures From Sub-Oxides
    Publication number: 20210047728
    Abstract: Methods of producing a self-aligned structure are described. The methods comprise forming a metal sub-oxide film in a substrate feature and oxidizing the sub-oxide film to form a self-aligned structure comprising metal oxide. In some embodiments, a metal film is deposited and then treated to form the metal sub-oxide film. In some embodiments, the process of depositing and treating the metal film to form the metal sub-oxide film is repeated until a predetermined depth of metal sub-oxide film is formed within the substrate feature.
    Type: Application
    Filed: August 28, 2018
    Publication date: February 18, 2021
    Inventors: Srinivas Gandikota, Susmit Singha Roy, Abhijit Basu Mallick