Abstract: Methods of depositing a metal film by exposing a substrate surface to a halide precursor and an organosilane reactant are described. The halide precursor comprises a compound of general formula (I): MQzRm, wherein M is a metal, Q is a halogen selected from Cl, Br, F or I, z is from 1 to 6, R is selected from alkyl, CO, and cyclopentadienyl, and m is from 0 to 6. The aluminum reactant comprises a compound of general formula (II) or general formula (III): wherein R1, R2, R3, R4, R5, R6, R7, R8, Ra, Rb, Rc, Rd, Re, and Rf are independently selected from hydrogen (H), substituted alkyl or unsubstituted alkyl; and X, Y, X?, and Y? are independently selected from nitrogen (N) and carbon (C).

Abstract: A method of forming a high-? dielectric cap layer on a semiconductor structure formed on a substrate includes depositing the high-? dielectric cap layer on the semiconductor structure, depositing a sacrificial silicon cap layer on the high-? dielectric cap layer, performing a post cap anneal process to harden and densify the as-deposited high-? dielectric cap layer, and removing the sacrificial silicon cap layer.

Abstract: Methods of producing a self-aligned structure are described. The methods comprise forming a metal sub-oxide film in a substrate feature and oxidizing the sub-oxide film to form a self-aligned structure comprising metal oxide. In some embodiments, a metal film is deposited and then treated to form the metal sub-oxide film. In some embodiments, the process of depositing and treating the metal film to form the metal sub-oxide film is repeated until a predetermined depth of metal sub-oxide film is formed within the substrate feature.

Abstract: A method of forming a high-K dielectric cap layer on a semiconductor structure formed on a substrate includes depositing the high-K dielectric cap layer on the semiconductor structure, depositing a sacrificial silicon cap layer on the high-K dielectric cap layer, performing a post cap anneal process to harden and densify the as-deposited high-K dielectric cap layer, and removing the sacrificial silicon cap layer.

Abstract: A sacrificial sealing layer is formed on a high-K metal gate (HKMG) stack to suppress oxidants, e.g., oxygen and water, from impacting the metal gate stack, thus preserving the device EOT. The method integrated processes that include forming an interfacial layer on the substrate; forming a high-K metal oxide layer on the interfacial layer, the high-K metal oxide layer comprising a dipole region adjacent to the interfacial layer, the dipole region; depositing a capping layer on the high-K metal oxide layer; and forming a sacrificial sealing layer on the capping layer. The dipole region is formed by driving a dopant species, e.g., zinc (Zn), vanadium (V), tungsten (W), molybdenum (Mo), ruthenium (Ru), titanium (Ti), tantalum (Ta), zirconium (Zr), aluminum (Al), niobium (Nb), or mixtures thereof, of a dipole film into the high-K metal oxide layer to form a dipole region.

Abstract: A metal gate stack on a substrate comprises: an interfacial layer on the substrate; a high-? metal oxide layer on the interfacial layer, the high-? metal oxide layer comprising a dipole region adjacent to the interfacial layer, the dipole region comprising niobium (Nb); a high-? metal oxide capping layer on the high-? metal oxide layer; a positive metal-oxide-semiconductor (PMOS) work function material above the high-? metal oxide capping layer; and a gate electrode above the PMOS work function material. The dipole region is formed by driving Nb species of a Nb-based film into the high-? metal oxide layer to form a dipole region.

Abstract: Methods of doping a semiconductor material are disclosed. Some embodiments provide for conformal doping of three dimensional structures. Some embodiments provide for doping with high concentrations of boron for p-type doping.

Abstract: A method of forming a gate stack structure includes forming a dipole metal layer on a high-? gate dielectric layer on a semiconductor structure formed on a substrate, annealing the dipole metal layer, and removing the dipole metal layer. The dipole metal layer comprises dopants in the high-? gate dielectric layer.

Abstract: Methods and apparatus for processing a substrate are provided herein. In some embodiments, a substrate processing chamber includes: a chamber body; a chamber lid assembly having a housing enclosing a central channel that extends along a central axis and has an upper portion and a lower portion; a lid plate coupled to the housing and having a contoured bottom surface that extends downwardly and outwardly from a central opening coupled to the lower portion of the central channel to a peripheral portion of the lid plate; and a gas distribution plate disposed below the lid plate and having a plurality of apertures disposed through the gas distribution plate.

Abstract: Methods of depositing a metal film by exposing a substrate surface to a halide precursor and an organosilane reactant are described. The halide precursor comprises a compound of general formula (I): MQzRm, wherein M is a metal, Q is a halogen selected from Cl, Br, F or I, z is from 1 to 6, R is selected from alkyl, CO, and cyclopentadienyl, and m is from 0 to 6. The aluminum reactant comprises a compound of general formula (II) or general formula (III): wherein R1, R2, R3, R4, R5, R6, R7, R8, Ra, Rb, Rc, Rd, Re, and Rf are independently selected from hydrogen (H), substituted alkyl or unsubstituted alkyl; and X, Y, X?, and Y? are independently selected from nitrogen (N) and carbon (C).

Abstract: Processing methods comprise forming a gap fill layer comprising tungsten or molybdenum by exposing a substrate surface having at least one feature thereon sequentially to a metal precursor and a reducing agent comprising hydrogen to form the gap fill layer in the feature, wherein there is not a nucleation layer between the substrate surface and the gap fill layer.

Abstract: A method of filling a feature in a semiconductor structure includes forming a barrier layer in the feature by one of atomic layer deposition (ALD), chemical vapor deposition (CVD), or physical vapor deposition (PVD); wherein the barrier layer is one of cobalt (Co), molybdenum (Mo), molybdenum nitride (MoN) plus Mo, titanium (Ti), titanium aluminum carbide (TiAlC), or titanium nitride (TiN); and forming a metal layer in the feature and over the barrier layer by one of ALD or CVD; wherein the metal layer is one of aluminum (Al), Co, Mo, ruthenium (Ru), or tungsten (W).

Abstract: Methods of forming and processing semiconductor devices are described. Certain embodiments related to electronic devices which comprise a dipole region having an interlayer dielectric, a high-K dielectric material, and a dipole layer. The dipole layer comprises one or more of titanium aluminum nitride (TiAIN), titanium tantalum nitride (TiTaN), titanium oxide (TiO), tantalum oxide (TaO), and titanium aluminum carbide (TiAIC).

Abstract: A method of forming an electronic device is disclosed. The method comprises forming depositing a metal on a substrate, the metal comprising one or more of copper (Cu), titanium (Ti), or tantalum (Ta). A metal cap is deposited on the metal. The metal cap comprises one or more of molybdenum (Mo), ruthenium (Ru), iridium (Ir), rhodium (Rh), palladium (Pd), silver (Ag), osmium (Os), platinum (Pt), or gold (Au). The substrate is then exposed to an anneal process, e.g., a hydrogen high-pressure anneal. The formation of the metal cap on the metal minimizes parasitic adsorption of hydrogen by the underlying metal.

Abstract: Methods of doping a semiconductor material are disclosed. Some embodiments provide for conformal doping of three dimensional structures. Some embodiments provide for doping with high concentrations of boron for p-type doping.

Abstract: Methods of forming memory structures are described. A metal film is deposited in the features of a structured substrate and volumetrically expanded to form pillars. A blanket film is deposited to a height less than the height of the pillars and the blanket film is removed from the top of the pillars. The height of the pillars is reduced so that the top of the pillars are below the surface of the blanket film and the process is optionally repeated to form a structure of predetermined height. The pillars can be removed from the features after formation of the predetermined height structure to form high aspect ratio features.

Abstract: Methods of forming and processing semiconductor devices are described. Certain embodiments related to electronic devices which comprise a dipole region having an interlayer dielectric, a high-? dielectric material, and a dipole layer. The dipole layer comprises one or more of titanium lanthanum nitride (TiLaN), titanium yttrium nitride (TiYN), titanium strontium nitride (TiSrN), titanium magnesium nitride (TiMgN, titanium aluminum nitride (TiAlN), titanium tantalum nitride (TiTaN), hafnium carbide (HfC), hafnium nitride (HfN), hafnium oxynitride (HfON), hafnium oxycarbide (HfOC), hafnium carbide aluminum (HfCAl), hafnium aluminum nitride (HfAlN), or hafnium carbonitride (HfCN).

Abstract: A method of forming a contact structure in a semiconductor device having a feature includes forming a barrier layer in the feature, wherein the barrier layer is TiN; and forming a metal layer in the feature and over the barrier layer, wherein the metal layer is at least one of aluminum (Al), ruthenium (Ru), or molybdenum (Mo).

Abstract: Methods of forming electronic devices comprising tungsten film stacks are provided. Methods include forming a tungsten nucleation layer on the barrier layer using an atomic layer deposition (ALD) process including a tungsten precursor that is free of fluorine. Forming the nucleation layer comprises controlling process parameters and/or forming WSi pre-nucleation layer.

Abstract: Methods of forming and processing semiconductor devices are described. Certain embodiments related to electronic devices which comprise a dipole region having an interlayer dielectric, a high-? dielectric material, and a dipole layer. The dipole layer comprises one or more of titanium aluminum nitride (TiAlN), titanium tantalum nitride (TiTaN), titanium oxide (TiO), tantalum oxide (TaO), and titanium aluminum carbide (TiAlC).