Patents by Inventor Srinivas Kumar

Srinivas Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220398322
    Abstract: A method of building a device historian, across a supply chain of device manufactures and managers, by a plurality of device management services comprising an enrollment service, an update service, a policy service, and an analytics service, a transaction connector, a blockchain broker service participating as a node in a blockchain network, and transaction filters. The method comprises sending, by the plurality of device management services a transaction record over the transaction connector to the blockchain broker service, receiving, by the blockchain broker service, the transaction record, filtering, by the blockchain broker service, information in the transaction record based on the transaction filters, preparing, by the blockchain broker service, a versioned block based on the filtered information from the transaction record, and adding, by the blockchain broker service, the versioned block to the blockchain network.
    Type: Application
    Filed: July 29, 2022
    Publication date: December 15, 2022
    Inventors: Srinivas KUMAR, Atul GUPTA, Ruslan ULANOV, Shreya UCHIL
  • Publication number: 20220382565
    Abstract: Generally, the present disclosure is directed to user interface understanding. More particularly, the present disclosure relates to training and utilization of machine-learned models for user interface prediction and/or generation. A machine-learned interface prediction model can be pre-trained using a variety of pre-training tasks for eventual downstream task training and utilization (e.g., interface prediction, interface generation, etc.).
    Type: Application
    Filed: June 1, 2021
    Publication date: December 1, 2022
    Inventors: Srinivas Kumar Sunkara, Xiaoxue Zang, Ying Xu, Lijuan Liu, Nevan Holt Wichers, Gabriel Overholt Schubiner, Jindong Chen, Abhinav Kumar Rastogi, Blaise Aguera-Arcas, Zecheng He
  • Publication number: 20220360239
    Abstract: Disclosed is a system comprising a plurality of operational amplifiers, each operational amplifier having individually adjustable operational parameters, and a trimming circuit. The trimming circuit includes successive approximation register (SAR) logic that determines associated memory values. The trimming circuit changes the adjustable operational parameters of each operation amplifier based on the associated memory values.
    Type: Application
    Filed: May 4, 2021
    Publication date: November 10, 2022
    Inventors: Vadim Valerievich Ivanov, Munaf Hussain Shaik, Srinivas Kumar Pulijala, Patrick Forster, Jerry Lee Doorenbos
  • Patent number: 11496124
    Abstract: A numerically-controlled oscillator (NCO) includes a phase accumulator (PA) which has a first input adapted to receive a phase increment, a second input adapted to receive a clock signal, and a third input adapted to receive a reset signal. The PA provides an instantaneous phase at an output. The NCO includes a dithered splitter which has an input coupled to receive the instantaneous phase. The dithered splitter dithers the instantaneous phase using a pseudo-random binary sequence (PRBS) and provides a dithered course phase and a dithered fine phase. The NCO includes a polynomial approximation unit which has a first input coupled to receive the dithered course phase and a second input coupled to receive the dithered fine phase. The polynomial approximation unit provides a sequence of numbers representing a discrete sinusoidal signal.
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: November 8, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Vinam Arora, Srinivas Kumar Reddy Naru
  • Publication number: 20220342884
    Abstract: Various embodiments are generally directed to techniques for building data lineages for queries, such as SQL queries. Some embodiments are particularly directed to a lineage tool that is able to construct data lineages in a recursive manner that uses the text of a query to identify dependent tables. In several embodiments, the data lineage tool may parse SQL queries to identify columns and dependent tables, including analyzing interdependent queries used to populate dependent tables and proceeding until the true source of data is identified. In several embodiments, the data lineage tool may utilize the relationships and dependencies to build element and table level lineages.
    Type: Application
    Filed: April 27, 2021
    Publication date: October 27, 2022
    Applicant: Capital One Services, LLC
    Inventors: Srinivas KUMAR, Aravind BIRUDU, Rajeev TIWARI, Puneet GOYAL
  • Publication number: 20220247420
    Abstract: In described examples, a circuit includes a calibration engine. The calibration engine generates multiple input codes. A digital to analog converter (DAC) is coupled to the calibration engine, and generates a first calibration signal in response to a first input code of the multiple input codes. An analog to digital converter (ADC) is coupled to the DAC, and generates multiple raw codes responsive to the first calibration signal. A storage circuit is coupled to the ADC and stores a first output code corresponding to the first input code. The first output code is obtained using the multiple raw codes generated by the ADC.
    Type: Application
    Filed: September 7, 2021
    Publication date: August 4, 2022
    Inventors: Narasimhan Rajagopal, Eeshan Miglani, Chirag Chandrahas Shetty, Neeraj Shrivastava, Shagun Dusad, Srinivas Kumar Reddy Naru, Nithin Gopinath, Charls Babu, Shivam Srivastava, Viswanathan Nagarajan, Jagannathan Venkataraman, Harshit Moondra, Prasanth K, Visvesvaraya Appala Pentakota
  • Publication number: 20220247421
    Abstract: In described examples, a circuit includes a multiplexer. The multiplexer receives an input voltage and a calibration signal. An analog-to-digital converter (ADC) is coupled to the multiplexer and generates an output code in response to the calibration signal. A storage circuit is coupled to the ADC and stores the input code representative of the calibration signal at an address corresponding to the output code. The stored input code includes an index value and a coarse value.
    Type: Application
    Filed: January 31, 2022
    Publication date: August 4, 2022
    Inventors: Visvesvaraya Appala Pentakota, Srinivas Kumar Reddy Naru, Chirag Shetty, Eeshan Miglani, Neeraj Shrivastava, Narasimhan Rajagopal, Shagun Dusad
  • Patent number: 11403402
    Abstract: A method of building a device historian, across a supply chain of device manufactures and managers, by a plurality of device management services comprising an enrollment service, an update service, a policy service, and an analytics service, a transaction connector, a blockchain broker service participating as a node in a blockchain network, and transaction filters. The method comprises sending, by the plurality of device management services a transaction record over the transaction connector to the blockchain broker service, receiving, by the blockchain broker service, the transaction record, filtering, by the blockchain broker service, information in the transaction record based on the transaction filters, preparing, by the blockchain broker service, a versioned block based on the filtered information from the transaction record, and adding, by the blockchain broker service, the versioned block to the blockchain network.
    Type: Grant
    Filed: April 8, 2020
    Date of Patent: August 2, 2022
    Assignee: DigiCert, Inc.
    Inventors: Srinivas Kumar, Atul Gupta, Ruslan Ulanov, Shreya Uchil
  • Publication number: 20220209730
    Abstract: Disclosed is a system that comprises an operational amplifier with adjustable operational parameters and a trimming module. The trimming module can adjust the operational parameters of the op-amp based on a memory value to compensate for an offset voltage of the op-amp. The trimming module can comprise successive approximation register (SAR) logic that controls the memory value. The SAR logic can be configured to detect a given memory value that causes an output voltage of the op-amp to be within a predetermined voltage interval when applying a predetermined common mode voltage to inverting and non-inverting inputs of the op-amp.
    Type: Application
    Filed: December 29, 2020
    Publication date: June 30, 2022
    Inventors: Vadim Valerievich Ivanov, Munaf Hussain Shaik, Srinivas Kumar Pulijala, Patrick Forster, Jerry Lee Doorenbos
  • Publication number: 20220171907
    Abstract: A method includes receiving, via a first component in a production environment, a sensor measurement corresponding to a second component in the production environment. A first digital twin corresponding to the first component is identified, and a perception algorithm is applied to identify a component type associated with the second component. A second digital twin is selected based on the component type, and a third digital twin is selected that models interactions between the first digital twin and the second digital twin. The third digital twin is used to generate instructions for the first component that allow the first component to interact with the second component. The instructions may then be delivered to the first component.
    Type: Application
    Filed: March 18, 2019
    Publication date: June 2, 2022
    Inventors: Ti-chiun Chang, Pranav Srinivas Kumar, Reed Williams, Arun Innanje, Janani Venugopalan, Edward Slavin, III, Lucia Mirabella
  • Patent number: 11309902
    Abstract: In described examples, a stochastic comparator includes a first comparator that compares an input signal and a primary threshold to generate a first signal. A second comparator compares the input signal and the primary threshold to generate a second signal. A decision block generates a control signal in response to the first signal, the second signal and a PRBS (pseudo random binary sequence) signal. A XOR gate generates a detection signal in response the first signal and the second signal.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: April 19, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Srinivas Kumar Reddy Naru, Narasimhan Rajagopal, Shagun Dusad, Viswanathan Nagarajan, Visvesvaraya Appala Pentakota
  • Patent number: 11303616
    Abstract: A trust chain having client system and a remote system in a secure connection, wherein an intermediary system associated with the network flow path serves as a signing entity to establish an end to end transitive trust. The intermediate system is a corroborative entity in the operations technology realm of the client system. The remote system serves as the host for a plurality of services in the information technology realm. A two way handshake during the initial secure exchange protocol between a local client application and a remote service is extended to a three way handshake that includes a nonce issued by the remote service on the remote system and a digital signature for the nonce issued by a signature service on an associated intermediate system. The nonce signature is verified authoritatively at the remote system based on the signing certificate of the intermediate system for explicit proof of association.
    Type: Grant
    Filed: January 29, 2020
    Date of Patent: April 12, 2022
    Assignee: DigiCert, Inc.
    Inventors: Srinivas Kumar, Shashank Jaywant Pandhare, Atul Gupta, Gopal Raman
  • Publication number: 20220100747
    Abstract: A system, method, and computer-readable medium for proving feedback on database instructions, identifying, for example, existing patterns and providing suggested replacement instructions. This may have the effect of improving the efficiency of instructions used to create and/or manipulate databases. According to some aspects, these and other benefits may be achieved by parsing received instructions into an organizational structure, traversing the organizational structure for known patterns, and suggesting replacement patterns. In implementation, this may be effected by receiving one or more sets of known patterns and corresponding replacement patterns, parsing received instructions, comparing the known patterns with the parsed instructions, and providing suggested replacement patterns based on one or more known patterns matching the parsed instructions. A benefit of may include reducing Cartesian products during the merging of tables.
    Type: Application
    Filed: December 14, 2021
    Publication date: March 31, 2022
    Inventors: Dennis J. Mire, Puneet Goyal, Siddharth Gupta, Srinivas Kumar, Deepak Sundararaj, Oron Hazi
  • Patent number: 11251759
    Abstract: An apparatus has four transistors. The first and third transistors each have a gate coupled to a first input terminal and second input terminal respectively, a source coupled to a current source and to a first terminal of a bias voltage source, and a substrate coupled to a second terminal of the bias voltage source. The second and fourth transistors each have a gate coupled to the first input terminal and the second input terminal respectively, a source coupled to the drain of the first and third transistors respectively, a drain coupled to a lower voltage supply and a substrate coupled to its source. The bias voltage source increases the threshold voltages of the first and third transistors above the second and fourth transistors, respectively. This ensures that the first and third transistors turn on after the second and fourth transistors, respectively.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: February 15, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Vadim Valerievich Ivanov, Srinivas Kumar Pulijala
  • Patent number: 11239851
    Abstract: A system has a digital-to-analog converter; a reference signal coupled to the digital-to-analog converter; a differential amplifier for applying gain, and for generating output signals as a function of sampled input signals, the reference signal, digital codes, and the gain applied by the differential amplifier coupled to the digital-to-analog converter; and a multi-bit successive-approximation register for determining the digital codes in successive stages coupled to the differential amplifier; and the gain applied by the differential amplifier is corrected based on previously determined digital codes.
    Type: Grant
    Filed: August 20, 2020
    Date of Patent: February 1, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Srinivas Kumar Reddy Naru, Anand Jerry George, Shagun Dusad, Visvesvaraya Appala Pentakota
  • Patent number: 11216438
    Abstract: A system, method, and computer-readable medium for proving feedback on database instructions, identifying, for example, existing patterns and providing suggested replacement instructions. This may have the effect of improving the efficiency of instructions used to create and/or manipulate databases. According to some aspects, these and other benefits may be achieved by parsing received instructions into an organizational structure, traversing the organizational structure for known patterns, and suggesting replacement patterns. In implementation, this may be effected by receiving one or more sets of known patterns and corresponding replacement patterns, parsing received instructions, comparing the known patterns with the parsed instructions, and providing suggested replacement patterns based on one or more known patterns matching the parsed instructions. A benefit of may include reducing Cartesian products during the merging of tables.
    Type: Grant
    Filed: April 14, 2020
    Date of Patent: January 4, 2022
    Assignee: Capital One Services, LLC
    Inventors: Dennis J. Mire, Puneet Goyal, Siddharth Gupta, Srinivas Kumar, Deepak Sundararaj, Oron Hazi
  • Publication number: 20210395104
    Abstract: The present invention discloses a method of preparing an electrode material for lithium-ion batteries comprising the steps of preparing a mixture of precursors taken in predefined stoichiometric ratios for synthesis of lithium iron phosphate (LiFePO4), adding niobium pentoxide as a precursor for doping of niobium at Li+ site of LiFePO4 for synthesis of niobium doped LiFePO4 and ball milling operation provides nano sized powder particles. Now, a precursor of carbon is added to said mixture of precursors for synthesizing and obtaining carbon coated niobium doped LiFePO4 nano sized powder particles. Pellets of required size are prepared and sintered. The obtained pellets are structurally characterized.
    Type: Application
    Filed: October 3, 2019
    Publication date: December 23, 2021
    Inventors: Srinivas Kumar ADAPAKA, Satyavani TRIUMALA VENKATA SESHA LAKSHMI
  • Patent number: 11206134
    Abstract: For protection of multipart system applications using a cryptographically protected package, a package map and a package object store for decryption and verification at runtime on the target device platform, a method including associating a device class with a set of content signing and encryption keys; signing application files based on the device class of the target device platform; aggregating application files into a file container based on a structured construct; encrypting application files/file containers with an encryption key associated with the device class; generating a package map and object stores for cryptographic artifacts and detached package metadata for passwords associated with the device package; building, the device package and update packages of the device package, detached package metadata, and package install scripts for the target device platform; publishing, the update packages signed with update package provider and update package publisher signing keys, and encrypted with target de
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: December 21, 2021
    Assignee: MOCANA CORPORATION
    Inventors: Srinivas Kumar, Shreya Uchil, Srikesh Amrutur Srinivas
  • Publication number: 20210359647
    Abstract: A circuit includes an operational amplifier having: a positive input; a negative input; an operational amplifier output; a differential front end; a positive channel (PCH) input stage; a negative channel (NCH) input stage; and an output stage. The operational amplifier also includes a current limit circuit coupled to an output of the output stage and including: an output current sense voltage circuit having an output configured to provide an output current sense voltage; an indirect current feedback circuit coupled to the output of the output current sense voltage circuit, the indirect current feedback circuit having an output configured to provide an output current feedback sense voltage responsive to the output current sense voltage; and control circuitry coupled to the indirect current feedback circuit and configured vary a resistance between the output stage output and ground responsive to a difference between the output current feedback sense voltage and a reference voltage.
    Type: Application
    Filed: April 16, 2021
    Publication date: November 18, 2021
    Inventors: Munaf Hussain SHAIK, Srinivas Kumar PULIJALA, Vadim Valerievich IVANOV
  • Publication number: 20210344049
    Abstract: A prismatic Zn—AgO secondary twin cell battery includes: an outer cell case of prismatic shape, wherein the outer cell case has bottom surface and a top surface with a cell case cover, an electrode assembly housed inside the outer cell case. The electrode assembly is formed by stacking a positive electrode plate and a negative electrode plate covered with a separator. The cell case cover is provided on the top/upper surface with a positive electrode terminal and a negative electrode terminal which seals the battery twin cell and an internal cell wall interposed in between the positive electrode plate and the negative electrode plate. The positive electrode plate and the negative electrode plate are coupled internally by crimping and potted to avoid inter cell leakage.
    Type: Application
    Filed: September 25, 2019
    Publication date: November 4, 2021
    Inventors: Srinivas Kumar ADAPAKA, Satyavani TRIUMALA VENKATA SESHA LAKSHMI, Senthil Kumar MATHIYAZHAGAN