Patents by Inventor Srinivas Kumar

Srinivas Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10103753
    Abstract: A pipeline ADC comprising an ADC segment and a digital backend coupled to the ADC segment. In some examples the ADC is configured to receive an analog signal, generate a first partial digital code representing a first sample of the analog signal, and generate a second partial digital code representing a second sample of the analog signal. In some examples the digital backend is configured to receive the first and second partial digital codes from the ADC segment, generate a combined digital code based at least partially on the first and second partial digital codes, determine a gain error of the ADC segment based at least partially on a first correlation of a PRBS with a difference between the first and second partial digital codes, and apply a first correction to the combined digital code based at least partially on the gain error of the ADC segment.
    Type: Grant
    Filed: December 8, 2017
    Date of Patent: October 16, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Viswanathan Nagarajan, Srinivas Kumar Reddy Naru, Narasimhan Rajagopal
  • Patent number: 10057243
    Abstract: A method of securing data transport between an endpoint device, without an IP address and connected to a gateway device, and a connected service using a discovery agent, a discovery service, and an enrollment service. The method includes: sending to the discovery service on the gateway device, an authenticated identity beacon with a device profile of the endpoint device; verifying authentication of the endpoint device and the device profile and generating a certificate request for the endpoint device; processing, by the enrollment service, the certificate request for the endpoint device to translate the certificate request for a certificate authority and receiving a certificate for the endpoint device issued by the certificate authority; processing the received certificate for the endpoint device to translate the received certificate for the endpoint device to represent a privacy certificate authority; and performing cryptographic operations on data using the certificate for the endpoint device.
    Type: Grant
    Filed: February 19, 2018
    Date of Patent: August 21, 2018
    Assignee: MOCANA CORPORATION
    Inventors: Srinivas Kumar, Atul Gupta, Ruslan Ulanov, Shreya Uchil
  • Publication number: 20180198764
    Abstract: The method provides a multi system trust chain between a client system and a remote system in a secure connection, wherein an intermediary system associated with the network flow path serves as a signing entity to establish an end to end transitive trust. The intermediate system is a corroborative entity in the operations technology (OT) realm of the client system. The remote system serves as the host for a plurality of services in the information technology (IT) realm. A two way handshake during the initial secure exchange protocol between a local client application and a remote service is extended to a three way handshake that includes a nonce issued by the remote service on the remote system and a digital signature for the nonce issued by a signature service on an associated intermediate system. The nonce signature is verified authoritatively at the remote system based on the signing certificate of the intermediate system for explicit proof of association.
    Type: Application
    Filed: February 10, 2017
    Publication date: July 12, 2018
    Applicant: Mocana Corporation
    Inventors: Srinivas Kumar, Gopal Raman, Atul Gupta, Shashank Jaywant Pandhare
  • Publication number: 20180191362
    Abstract: The disclosure provides an analog to digital converter (ADC). The ADC includes a flash ADC. The flash ADC generates a flash output in response to an input signal, and an error correction block generates a known pattern. A selector block is coupled to the flash ADC and the error correction block, and generates a plurality of selected signals in response to the flash output and the known pattern. A digital to analog converter (DAC) is coupled to the selector block, and generates a coarse analog signal in response to the plurality of selected signals. A residue amplifier is coupled to the DAC, and generates a residual analog signal in response to the coarse analog signal, the input signal and an analog PRBS (pseudo random binary sequence) signal. A residual ADC generates a residual code in response to the residual analog signal.
    Type: Application
    Filed: March 1, 2018
    Publication date: July 5, 2018
    Inventors: Srinivas Kumar Reddy Naru, Visvesvaraya Pentakota Appala, Shagun Dusad, Neeraj Shrivastava, Viswanathan Nagarajan, Ani Xavier, Rishi Soundararajan, Sai Aditya Nurani, Roswald Francis
  • Publication number: 20180109538
    Abstract: A method provides policy based adaptive application capability management and device attestation for dynamic control of remote device operations. The method includes instrumenting applications installed on a remote device to examine their runtime application programming interface (API) invocations to trusted functions abstracted by a trusted services platform anchored to an underlying firmware, software or hardware root of trust, and managing the application security operations based on the execution context and dynamic privilege controls to restrict their capabilities. The invention also provides a local attestation agent to perform state measurements for platform trust, configuration and operational metrics, and generates device policy based platform and application level alerts.
    Type: Application
    Filed: December 27, 2016
    Publication date: April 19, 2018
    Applicant: Mocana Corporation
    Inventors: Srinivas Kumar, Celena Tanguay, Steven Darrel Burnett
  • Patent number: 9941893
    Abstract: An ADC includes a flash ADC. The flash ADC generates a flash output in response to an input signal, and an error correction block generates a known pattern. A selector block is coupled to the flash ADC and the error correction block, and generates a plurality of selected signals in response to the flash output and the known pattern. A digital to analog converter (DAC) is coupled to the selector block, and generates a coarse analog signal in response to the plurality of selected signals. A residue amplifier is coupled to the DAC, and generates a residual analog signal in response to the coarse analog signal, the input signal and an analog PRBS (pseudo random binary sequence) signal. A residual ADC generates a residual code in response to the residual analog signal.
    Type: Grant
    Filed: April 12, 2017
    Date of Patent: April 10, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Srinivas Kumar Reddy Naru, Visvesvaraya Pentakota Appala, Shagun Dusad, Neeraj Shrivastava, Viswanathan Nagarajan, Ani Xavier, Rishi Soundararajan, Sai Aditya Nurani, Roswald Francis
  • Patent number: 9836373
    Abstract: On-chip field testing methods and apparatus are disclosed. Example on-chip testers disclosed herein include a decoder having a test data input and a test stimuli interface. Disclosed example on-chip testers also include a multiplexer having a first multiplexer interface coupled to the test stimuli interface, a second multiplexer interface coupled to an automatic test equipment interface, a third multiplexer interface coupled to a design-for-testing subsystem interface and an interface selection input. Disclosed example on-chip testers further include a memory having a memory interface coupled to the test data input.
    Type: Grant
    Filed: February 24, 2015
    Date of Patent: December 5, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Srinivas Kumar Vooka, Vishwanath S, Pranav Murthy, Ratheesh Thekke Veetil, Rahul Gulati
  • Publication number: 20170302287
    Abstract: The disclosure provides an analog to digital converter (ADC). The ADC includes a flash ADC. The flash ADC generates a flash output in response to an input signal, and an error correction block generates a known pattern. A selector block is coupled to the flash ADC and the error correction block, and generates a plurality of selected signals in response to the flash output and the known pattern. A digital to analog converter (DAC) is coupled to the selector block, and generates a coarse analog signal in response to the plurality of selected signals. A residue amplifier is coupled to the DAC, and generates a residual analog signal in response to the coarse analog signal, the input signal and an analog PRBS (pseudo random binary sequence) signal. A residual ADC generates a residual code in response to the residual analog signal.
    Type: Application
    Filed: April 12, 2017
    Publication date: October 19, 2017
    Inventors: Srinivas Kumar Reddy Naru, Visvesvaraya Pentakota Appala, Shagun Dusad, Neeraj Shrivastava, Viswanathan Nagarajan, Ani Xavier, Rishi Soundararajan, Sai Aditya Nurani, Roswald Francis
  • Publication number: 20170286608
    Abstract: An on-demand and real-time evidence based cost modeling and predictive analysis system, and a financial incentives based plan to reduce healthcare costs. An analytics system that includes a data aggregator and regression models generates incremental expenditures among overweight and obese individuals, predictive forecasts of future medical costs, and predictive forecasts of cost reduction based on financial incentives to recipients. The forecasts may include interactions, personalized variables, statistical trends, prevalence of diseases based on body mass index and/or age, and medical evidence associated with specific illnesses. A computer-based program may process and analyze variables in healthcare records. A health insurance provider may provide an annual rebate on paid premiums to recipients based on a qualifying annual BMI as an incentive.
    Type: Application
    Filed: June 15, 2017
    Publication date: October 5, 2017
    Inventors: Neela SRINIVAS, Srinivas KUMAR
  • Patent number: 9781114
    Abstract: A method of packet management for restricting access to a resource of a computer system. The method includes identifying client parameters and network parameters, as a packet management information, used to determine access to the resource, negotiating a session key between client and server devices, generating a session ID based on at least the negotiated session key, inserting the packet management information and the session ID into each information packet sent from the client device to the server device, monitoring packet management information in each information packet from the client device, and filtering out respective information packets sent to the server device from the client device when the monitored packet management information indicates that access to the resource is restricted.
    Type: Grant
    Filed: December 8, 2014
    Date of Patent: October 3, 2017
    Assignee: Citrix Systems, Inc.
    Inventors: Dennis Vance Pollutro, Kiet Tuan Tran, Srinivas Kumar
  • Patent number: 9748966
    Abstract: A system includes an analog-to-digital converter (ADC) including an ADC input terminal; an ADC output terminal; and analog components configured to convert an analog signal received at the ADC input terminal to a digital signal. The system also includes a histogram estimation circuit coupled to the ADC output terminal and configured to generate information on a plurality of codes generated by the ADC and determine a region defining a range of codes corresponding to an occurrence of an error caused by the analog components of the ADC. The system also includes a dither circuit coupled to the ADC input terminal and configured to introduce a dither in the analog signal to generate a modified analog signal.
    Type: Grant
    Filed: August 8, 2016
    Date of Patent: August 29, 2017
    Assignee: Texas Instruments Incorporated
    Inventors: Viswanathan Nagarajan, Srinivas Kumar Reddy Naru, Ratna Kumar Venkata Parupudi
  • Patent number: 9734290
    Abstract: An on-demand and real-time evidence based cost modeling and predictive analysis system, and a financial incentives based plan to reduce healthcare costs. An analytics system that includes a data aggregator and regression models generates incremental expenditures among overweight and obese individuals, predictive forecasts of future medical costs, and predictive forecasts of cost reduction based on financial incentives to recipients. The forecasts may include interactions, personalized variables, statistical trends, prevalence of diseases based on body mass index and/or age, and medical evidence associated with specific illnesses. A computer-based program may process and analyze variables in healthcare records. A health insurance provider may provide an annual rebate on paid premiums to recipients based on a qualifying annual BMI as an incentive.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: August 15, 2017
    Inventors: Neela Srinivas, Srinivas Kumar
  • Publication number: 20170041013
    Abstract: A system includes an analog-to-digital converter (ADC) including an ADC input terminal; an ADC output terminal; and analog components configured to convert an analog signal received at the ADC input terminal to a digital signal. The system also includes a histogram estimation circuit coupled to the ADC output terminal and configured to generate information on a plurality of codes generated by the ADC and determine a region defining a range of codes corresponding to an occurrence of an error caused by the analog components of the ADC. The system also includes a dither circuit coupled to the ADC input terminal and configured to introduce a dither in the analog signal to generate a modified analog signal.
    Type: Application
    Filed: August 8, 2016
    Publication date: February 9, 2017
    Inventors: Viswanathan NAGARAJAN, Srinivas Kumar Reddy NARU, Ratna Kumar Venkata PARUPUDI
  • Publication number: 20160378942
    Abstract: An on-demand and real-time evidence based cost modeling and predictive analysis system, and a financial incentives based plan to reduce healthcare costs. An analytics system that includes a data aggregator and regression models generates incremental expenditures among overweight and obese individuals, predictive forecasts of future medical costs, and predictive forecasts of cost reduction based on financial incentives to recipients. The forecasts may include interactions, personalized variables, statistical trends, prevalence of diseases based on body mass index and/or age, and medical evidence associated with specific illnesses. A computer-based program may process and analyze variables in healthcare records. A health insurance provider may provide an annual rebate on paid premiums to recipients based on a qualifying annual BMI as an incentive.
    Type: Application
    Filed: March 7, 2016
    Publication date: December 29, 2016
    Inventors: Neela SRINIVAS, Srinivas KUMAR
  • Patent number: 9503452
    Abstract: The method integrates the dynamic and authoritative posture of an authenticated user, a registered device, and a registered service provider as a conclusive proof of identity recognition for affiliation of associated contextual attribution and referential integrity. In addition to relieving the user of the burden of remembering multiple passwords for a plurality of services, the method provides a means to facilitate an affiliation oriented architecture for a broad spectrum of web and cloud based services with affiliation aware content streaming, leveraging the affiliation score as a key trust metric. The method provides protection from user-agnostic delegation and impersonation of identity, social engineering, and compromised passwords, which are exploited by numerous strains of landed malware to launch multi-stage coordinated cyber-attacks on consumer accounts and enterprise systems.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: November 22, 2016
    Assignee: AUTOMITI LLC
    Inventors: Srinivas Kumar, Atul Gupta, Shashank Jaywant Pandhare
  • Publication number: 20160315629
    Abstract: In described examples, an analog to digital converter (ADC) includes a main ADC and a reference ADC. The main ADC generates a zone information signal and a digital output in response to an input signal. The reference ADC receives a plurality of reference voltages from the main ADC. The plurality of reference voltages includes a first reference voltage and a second reference voltage. The reference ADC generates a reference output in response to the input signal, the first reference voltage and the second reference voltage. A subtractor generates an error signal in response to the digital output and the reference output. A logic block generates one of a first offset correction signal, a second offset correction signal and a gain mismatch signal in response to the zone information signal, the error signal and the reference output.
    Type: Application
    Filed: September 30, 2015
    Publication date: October 27, 2016
    Inventors: Srinivas Kumar Reddy NARU, Nagarajan VISWANATHAN, Visvesvaraya PENTAKOTA
  • Patent number: 9479186
    Abstract: In described examples, an analog to digital converter (ADC) includes a main ADC and a reference ADC. The main ADC generates a zone information signal and a digital output in response to an input signal. The reference ADC receives a plurality of reference voltages from the main ADC. The plurality of reference voltages includes a first reference voltage and a second reference voltage. The reference ADC generates a reference output in response to the input signal, the first reference voltage and the second reference voltage. A subtractor generates an error signal in response to the digital output and the reference output. A logic block generates one of a first offset correction signal, a second offset correction signal and a gain mismatch signal in response to the zone information signal, the error signal and the reference output.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: October 25, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Srinivas Kumar Reddy Naru, Nagarajan Viswanathan, Visvesvaraya Pentakota
  • Publication number: 20160241574
    Abstract: A method of determining real-time operational integrity of an application or service operating on a computing device, the method including inspecting network traffic sent or received by the application or the service operating on the computing device, determining in real-time, by a network analyzer of an endpoint trust agent on the computing device, signaling integrity and data exchange of the application or the service based on the inspecting of the network traffic to assess trustworthiness of the signaling, and data exchange, and determining, by the network analyzer, that the application or the service is malicious based on the determined trustworthiness of the signaling and data exchange.
    Type: Application
    Filed: February 16, 2015
    Publication date: August 18, 2016
    Applicant: Taasera, Inc.
    Inventors: Srinivas KUMAR, Shashank Jaywant PANDHARE
  • Publication number: 20160203279
    Abstract: An on-demand and real-time evidence based cost modeling and predictive analysis system, and a financial incentives based plan to reduce healthcare costs. An analytics system that includes a data aggregator and regression models generates incremental expenditures among overweight and obese individuals, predictive forecasts of future medical costs, and predictive forecasts of cost reduction based on financial incentives to recipients. The forecasts may include interactions, personalized variables, statistical trends, prevalence of diseases based on body mass index and/or age, and medical evidence associated with specific illnesses. A computer-based program may process and analyze variables in healthcare records. A health insurance provider may provide an annual rebate on paid premiums to recipients based on a qualifying annual BMI as an incentive.
    Type: Application
    Filed: March 24, 2016
    Publication date: July 14, 2016
    Inventors: Neela SRINIVAS, Srinivas KUMAR
  • Publication number: 20160146888
    Abstract: On-chip field testing methods and apparatus are disclosed. Example on-chip testers disclosed herein include a decoder having a test data input and a test stimuli interface. Disclosed example on-chip testers also include a multiplexer having a first multiplexer interface coupled to the test stimuli interface, a second multiplexer interface coupled to an automatic test equipment interface, a third multiplexer interface coupled to a design-for-testing subsystem interface and an interface selection input. Disclosed example on-chip testers further include a memory having a memory interface coupled to the test data input.
    Type: Application
    Filed: February 24, 2015
    Publication date: May 26, 2016
    Inventors: Srinivas Kumar Vooka, Vishwanath S, Pranav Murthy, Ratheesh Thekke Veetil, Rahul Gulati