Abstract: A method of managing a wireless communication between a plurality of accessory devices and a host device includes, at the host device, establishing a data connection with a plurality of accessory devices, obtaining a radio ID for each accessory device of the plurality of accessory devices, grouping the plurality of accessory devices into at least one OFDMA device and at least one non-OFDMA device based at least partially on the radio IDs, sending a trigger signal to the at least one OFDMA device; and after receiving a first response signal from the at least one OFDMA device in response to the trigger signal, receiving a second response signal from the at least one non-OFDMA device.

Abstract: A materials kit for three-dimensional (3D) printing can include a powder bed material including electroactive polymer particles including electroactive polymer having a melting temperature from about 100° C. to about 250° C. and a fusing agent including a radiation absorber to selectively apply to the powder bed material.

Abstract: A method of managing wireless communication between electronic devices includes, at a first electronic device, transmitting a first downlink transmission from the first electronic device to a second electronic device and receiving a first response from the second electronic device at the first electronic device, wherein the first response includes a downlink channel quality information (CQI). The method further includes determining a per-subcarrier CQI based at least partially on the downlink CQI and determining an output modulation and coding scheme (MCS) based at least partially on the per-subcarrier CQI. After determining the output MCS, the method includes selecting a selected MCS based at least partially on the output MCS and setting an MCS of the first electronic device to the selected MCS.

Abstract: A computing device (such as a computer gaming console) uses only a single radio to concurrently communicate with a wireless network access point and wireless client devices such as game controllers or peripherals. To establish and maintain both a high-throughput link with the access point, and a low-latency link with the client device(s), the single Wi-Fi radio of the computing device is configured to periodically switch between a channel used for the high-throughput link and a different channel that is used for the low-latency link—thus implementing a combination of frequency division multiplexing (FDM) and time division multiplexing (TDM). The console may use aspects of the Wi-Fi protocol standard to ensure that periodically switching its single radio between the two channels is accomplished while maintaining reliable communication on both channels.

Abstract: A first device includes a processor, a wireless communication device in data communication with the processor, and a hardware storage device in data communication with the processor. The hardware storage device includes instructions stored thereon that, when executed by the processor, causes the host device to compare a Quality of Server Subtype (QoS-Subtype) value to a matching rule of a policy table stored on the hardware storage device, determine a transmission policy based at least partially on the QoS-Subtype value, wherein the transmission policy includes a transmission rate with a modulation and coding scheme (MCS) index based at least partially on the QoS-Subtype, and transmit a transmission to a second device according to the transmission policy.

Abstract: A method of managing a wireless communication between a plurality of accessory devices and a host device includes, at the host device, establishing a data connection with a plurality of accessory devices, obtaining a radio ID for each accessory device of the plurality of accessory devices, grouping the plurality of accessory devices into at least one OFDMA device and at least one non-OFDMA device based at least partially on the radio IDs, sending a trigger signal to the at least one OFDMA device; and after receiving a first response signal from the at least one OFDMA device in response to the trigger signal, receiving a second response signal from the at least one non-OFDMA device.

Abstract: An electronic device includes a processor, a wireless communication device, and a hardware storage device. The hardware storage device has instructions stored thereon that, when executed by the processor, cause the electronic device to obtain a plurality of data channel personalities. Each of the data channel personalities includes a unique radio communication and network protocol for the wireless communication device. The instructions further cause the electronic device to select a data channel personality from the plurality of data channel personalities and transmit data to a host device using the wireless communication device and the radio communication and network protocol according to the selected data channel personality.

Abstract: A host device includes a processor, a wireless communication device in data communication with the processor, and a hardware storage device in data communication with the processor. The hardware storage device has instructions stored thereon that, when executed by the processor, cause the host device to establish a wireless data channel with an accessory device and assign the wireless data channel to a resource unit with a bandwidth less than 20 MHz. The instructions further cause the host device to send a trigger signal to the accessory device and receive state data from the accessory device in response to the trigger signal.

Abstract: An electrically actuated switch comprises a first electrode, a second electrode, and an active region disposed therebetween. The active region comprises at least one primary active region comprising at least one material that can be doped or undoped to change its electrical conductivity, and a secondary active region comprising at least one material for providing a source/sink of ionic species that act as dopants for the primary active region(s). Methods of operating the switch are also provided.

Abstract: A technique includes providing a first set of values to a memristor crossbar array and using the memristor crossbar array to perform a Fourier transformation. Using the memristor crossbar array to perform the Fourier transform includes using the array to apply a Discrete Fourier Transform (DFT) to the first set of values to provide a second set of values.

Abstract: A computing device (such as a computer gaming console) uses only a single radio to concurrently communicate with a wireless network access point and wireless client devices such as game controllers or peripherals. To establish and maintain both a high-throughput link with the access point, and a low-latency link with the client device(s), the single Wi-Fi radio of the computing device is configured to periodically switch between a channel used for the high-throughput link and a different channel that is used for the low-latency link—thus implementing a combination of frequency division multiplexing (FDM) and time division multiplexing (TDM). The console may use aspects of the Wi-Fi protocol standard to ensure that periodically switching its single radio between the two channels is accomplished while maintaining reliable communication on both channels.

Abstract: Examples herein relate to linear transformation accelerators. An example linear transformation accelerator may include a crossbar array programmed to calculate a linear transformation. The crossbar array has a plurality of words lines, a plurality of bit lines, and a memory cell coupled between each unique combination of one word line and one bit line, where the memory cells are programmed according to a linear transformation matrix. The plurality of word lines are to receive an input vector, and the plurality of bit lines are to output an output vector representing a linear transformation of the input vector.

Abstract: A computing device (such as a computer gaming console) uses only a single radio to concurrently communicate with a wireless network access point and wireless client devices such as game controllers or peripherals. To establish and maintain both a high-throughput link with the access point, and a low-latency link with the client device(s), the single Wi-Fi radio of the computing device is configured to periodically switch between a channel used for the high-throughput link and a different channel that is used for the low-latency link—thus implementing a combination of frequency division multiplexing (FDM) and time division multiplexing (TDM). The console may use aspects of the Wi-Fi protocol standard to ensure that periodically switching its single radio between the two channels is accomplished while maintaining reliable communication on both channels.

Abstract: A crossbar array, comprises a plurality of row lines, a plurality of column lines intersecting the plurality of row lines at a plurality of intersections, and a plurality of junctions coupled between the plurality of row lines and the plurality of column lines at a portion of the plurality of intersections. Each junction comprises a resistive memory element, and the junctions are positioned to calculate a matrix multiplication of a first matrix and a second matrix.

Abstract: An electrically actuated switch comprises a first electrode, a second electrode, and an active region disposed therebetween. The active region comprises at least one primary active region comprising at least one material that can be doped or undoped to change its electrical conductivity, and a secondary active region comprising at least one material for providing a source/sink of ionic species that act as dopants for the primary active region(s). Methods of operating the switch are also provided.

Abstract: Example implementations of the present disclosure relate to improved computational accuracy in a crossbar array. An example system may include a crossbar array, having a plurality of memory elements at junctions, usable in performance of computations. The example system may further include a calculate engine to calculate ideal conductance of memory elements at a plurality of junctions of the crossbar array and a determine engine to determine conductance of the memory elements at the plurality of junctions of the crossbar array. An adjust engine of the example system may be used to adjust conductance of at least one memory element to improve computational accuracy by reduction of a difference between the ideal conductance and the determined conductance of the at least one memory element.

Abstract: A computing device (such as a computer gaming console) uses only a single radio to concurrently communicate with a wireless network access point and wireless client devices such as game controllers or peripherals. To establish and maintain both a high-throughput link with the access point, and a low-latency link with the client device(s), the single Wi-Fi radio of the computing device is configured to periodically switch between a channel used for the high-throughput link and a different channel that is used for the low-latency link—thus implementing a combination of frequency division multiplexing (FDM) and time division multiplexing (TDM). The console may use aspects of the Wi-Fi protocol standard to ensure that periodically switching its single radio between the two channels is accomplished while maintaining reliable communication on both channels.

Abstract: An electrically actuated switch comprises a first electrode, a second electrode, and an active region disposed therebetween. The active region comprises at least one primary active region comprising at least one material that can be doped or undoped to change its electrical conductivity, and a secondary active region comprising at least one material for providing a source/sink of ionic species that act as dopants for the primary active region(s). Methods of operating the switch are also provided.

Abstract: Example implementations of the present disclosure relate to improved computational accuracy in a crossbar array. An example system may include a crossbar array, having a plurality of memory elements at junctions, usable in performance of computations. The example system may further include a calculate engine to calculate ideal conductance of memory elements at a plurality of junctions of the crossbar array and a determine engine to determine conductance of the memory elements at the plurality of junctions of the crossbar array. An adjust engine of the example system may be used to adjust conductance of at least one memory element to improve computational accuracy by reduction of a difference between the ideal conductance and the determined conductance of the at least one memory element.

Abstract: Examples herein relate to linear transformation accelerators. An example linear transformation accelerator may include a crossbar array programmed to calculate a linear transformation. The crossbar array has a plurality of words lines, a plurality of bit lines, and a memory cell coupled between each unique combination of one word line and one bit line, where the memory cells are programmed according to a linear transformation matrix. The plurality of word lines are to receive an input vector, and the plurality of bit lines are to output an output vector representing a linear transformation of the input vector.