Patents by Inventor Stanley A. Williams

Stanley A. Williams has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9812500
    Abstract: A circuit component that exhibits a region of negative differential resistance includes: a first layer of material; and a second layer of material in contact with the first layer of material, the contact forming a first self-heating interface. The first self-heating interface is structured such that an electrical current flowing from the first layer of material to the second layer of material encounters an electrical impedance occurring at the first interface that is greater than any electrical impedance occurring in the first and second layers of material, wherein heating occurring at the first interface is dominated by Joule heating caused by the electrical impedance occurring at the first interface, and wherein the electrical impedance occurring at the first interface decreases with increasing temperature to induce a region of negative differential resistance.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: November 7, 2017
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Gary Gibson, Warren Jackson, R. Stanley Williams
  • Publication number: 20170317646
    Abstract: In some examples, a device includes a nano-scale oscillator that exhibits chaotic oscillation responsive to a control input to the nano-scale oscillator, where the control input including a tunable input parameter.
    Type: Application
    Filed: April 28, 2016
    Publication date: November 2, 2017
    Inventors: Suhas Kumar, John Paul Strachan, Gary Gibson, R. Stanley Williams
  • Publication number: 20170317277
    Abstract: An electrically actuated switch comprises a first electrode, a second electrode, and an active region disposed therebetween. The active region comprises at least one primary active region comprising at least one material that can be doped or undoped to change its electrical conductivity, and a secondary active region comprising at least one material for providing a source/sink of ionic species that act as dopants for the primary active region(s). Methods of operating the switch are also provided.
    Type: Application
    Filed: July 18, 2017
    Publication date: November 2, 2017
    Inventor: R. Stanley Williams
  • Patent number: 9793322
    Abstract: In an example, an apparatus includes an electrically conductive component having a first side and a second side, a first switching material formed on the first side of the electrically conductive component, and a second switching material formed on the second side of the electrically conductive component. The second switching material may include a different material than the first switching material and resistance states of each of the first switching material and the second switching material are to be modified through application of electric fields through the first switching material and the second switching material. The apparatus may also include an electrode in contact with one of the first switching material and the second switching material.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: October 17, 2017
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Ning Ge, Jianhua Yang, Stanley Williams, Kyung Min Kim
  • Patent number: 9793473
    Abstract: A memristor structure may be provided that includes a first electrode, a second electrode, and a buffer layer disposed on the first electrode. The memristor structure may include a switching layer interposed between the second electrode and the buffer layer to form, when a voltage is applied, a filament or path that extends from the second electrode to the buffer layer and to form a Schottky-like contact or a heterojunction between the filament and the buffer layer.
    Type: Grant
    Filed: September 5, 2013
    Date of Patent: October 17, 2017
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Shih-Yuan Wang, Jianhua Yang, Minxian Max Zhang, Alexandre M. Bratkovski, R. Stanley Williams
  • Patent number: 9773547
    Abstract: A non-volatile memory device with multiple latency tiers includes at least two crossbar memory arrays, each crossbar memory array comprising a number of memory cells, each memory cell connected to a word line and a bit line at a cross point. The crossbar memory arrays each have a different latency. The crossbar memory arrays are formed on a single die.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: September 26, 2017
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Richard H. Henze, Naveen Muralimanohar, Yoocharn Jeon, Martin Foltin, Erik Ordentlich, Gregg B. Lesartre, R. Stanley Williams
  • Publication number: 20170271410
    Abstract: Provided in one example is a nonvolatile memory crossbar array. The array includes a number of junctions formed by a number of row lines intersecting a number of column lines; and a resistive memory element in series with a selector at each of the junctions coupling between one of the row lines and one of the column lines. The selector may be a volatile switch including: a bottom electrode; an oxide layer disposed over the bottom electrode, the oxide layer including Cu2O; and a top electrode disposed over the oxide layer.
    Type: Application
    Filed: February 11, 2015
    Publication date: September 21, 2017
    Inventors: Minxian Max Zhang, Kathryn Samuels, Jianhua Joshua Yang, R. Stanley Williams, Zhiyong Li
  • Publication number: 20170271589
    Abstract: A resistive memory array includes a plurality of resistive memory devices. A sneak path current in the resistive memory array is reduced when a negative temperature coefficient of resistance material is incorporated in series with a negative differential resistance selector that is in series with a memristor switching material at a junction formed at a cross-point between two conductors of one of the plurality of resistive memory devices.
    Type: Application
    Filed: January 26, 2015
    Publication date: September 21, 2017
    Inventors: Minxian Max Zhang, Jianhua Yang, Zhiyong Li, R. Stanley Williams
  • Publication number: 20170243924
    Abstract: A negative differential resistance (NDR) device for non-volatile memory cells in crossbar arrays is provided. Each non-volatile memory cell is situated at a crosspoint of the array. Each non-volatile memory cell comprises a switching layer in series with an NDR material containing fast diffusive atoms that are electrochemically inactive. The switching layer is positioned between two elec-trodes.
    Type: Application
    Filed: December 19, 2014
    Publication date: August 24, 2017
    Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Jianhua YANG, Stanley WILLIAMS, Max ZHANG, Zhiyong LI
  • Patent number: 9735355
    Abstract: An electrically actuated switch comprises a first electrode, a second electrode, and an active region disposed therebetween. The active region comprises at least one primary active region comprising at least one material that can be doped or undoped to change its electrical conductivity, and a secondary active region comprising at least one material for providing a source/sink of ionic species that act as dopants for the primary active region(s). Methods of operating the switch are also provided.
    Type: Grant
    Filed: February 14, 2014
    Date of Patent: August 15, 2017
    Assignee: Hewlett Packard Enterprise Development LP
    Inventor: R. Stanley Williams
  • Publication number: 20170229170
    Abstract: A device for generating a representative logic indicator of grouped memristors is described. The device includes a memristor array. The memristor array includes a number of first memristors having a first set of logic indicators and a number of second memristors having a second set of logic indicators. The second set of logic indicators is different than the first set of logic indicators. Each first memristor is grouped with a corresponding second memristor during a memory read operation to generate a representative logic indicator.
    Type: Application
    Filed: October 23, 2014
    Publication date: August 10, 2017
    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Ning GE, Jianhua YANG, Zhiyong LI, R. Stanley Williams
  • Publication number: 20170221558
    Abstract: In an example, a memristor apparatus with variable transmission delay may include a first memristor programmable to have one of a plurality of distinct resistance levels, a second memristor, a transistor connected between the first memristor and the second memristor, and a capacitor having a capacitance, in which the capacitor is connected between the first memristor and the transistor. In addition, application of a reading voltage across the second memristor is delayed by a time period equivalent to the programmed resistance level of the first memristor and the capacitance of the capacitor.
    Type: Application
    Filed: April 28, 2015
    Publication date: August 3, 2017
    Inventors: Miao Hu, Ning Ge, John Paul Strachan, R. Stanley Williams
  • Publication number: 20170190606
    Abstract: A method of forming a mould assembly (10) is provided. The method includes providing a mould body (12) defining a mould insert receiving zone (14). The method includes providing a mould insert (16), defining opposed sides (18, 20). One side (18) defines a mould cavity surface (21), against which an article is to be moulded, and the opposed side (20) defines a mould body seating arrangement (22) for seating the mould insert (16) in the mould insert receiving zone (14). The method further includes positioning the mould insert 16 in the mould insert receiving zone (14) of the mould body (12).
    Type: Application
    Filed: December 16, 2016
    Publication date: July 6, 2017
    Inventor: Stanley William BENNETT
  • Patent number: 9681422
    Abstract: A method of operating a transceiver may comprise operating in an adaptive mode in which transmissions from the transceiver are halted after detection of interference, performing a clear channel assessment (CCA), as a result of the CCA, detecting energy from an interferer above a predetermined threshold, and switching operation to a non-adaptive mode in which the transceiver is configured to alternate transmission periods and idle periods according to a duty cycle. Then, the method may comprise performing an energy detect, as a result of the energy detect, subsequently detecting the energy from the interferer below the predetermined threshold, and switching operation to the adaptive mode.
    Type: Grant
    Filed: April 21, 2015
    Date of Patent: June 13, 2017
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Mike Nakahara, Stanley William Adermann
  • Patent number: 9678013
    Abstract: Examples of integrated sensors are disclosed herein. An example of an integrated sensor includes a substrate and a sensing member formed on a surface of the substrate. The sensing member includes collapsible signal amplifying structures and an area surrounding the collapsible signal amplifying structures that enables self-positioning of droplets exposed thereto toward the collapsible signal amplifying structures.
    Type: Grant
    Filed: April 20, 2012
    Date of Patent: June 13, 2017
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Alexandre M. Bratkovski, Zhiyong Li, Wei Wu, Min Hu, R. Stanley Williams, Ansoon Kim
  • Patent number: 9664560
    Abstract: A double-grating surface-enhanced Raman spectrometer. The spectrometer includes a substrate; a plurality of nanofingers carried by the substrate, the nanofingers arranged to define a first optical grating; a light source oriented to project a beam of light toward the first optical grating; a second optical grating oriented to receive a beam of light scattered from the first optical grating; and a detector oriented to receive a beam of light scattered from the second optical grating.
    Type: Grant
    Filed: March 6, 2012
    Date of Patent: May 30, 2017
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: R. Stanley Williams, Zhiyong Li
  • Publication number: 20170141160
    Abstract: Protective elements are provided for non-volatile memory cells in crossbar arrays in which each memristor is situated at a crosspoint of the array. Each memristor is provided with a protective element. The protective element includes a layer of a first oxide that upon heating converts to a second oxide having a higher resistivity than the first oxide.
    Type: Application
    Filed: June 26, 2014
    Publication date: May 18, 2017
    Inventors: Minxian Max ZHANG, Jianhua YANG, R. Stanley WILLIAMS
  • Patent number: 9597867
    Abstract: A duct tape and a method of making a duct tape having a customized, printed design on a surface of the duct tape. The method comprises providing a design for printing on the duct tape, digitally printing the design on the surface of the duct tape, and curing the ink printed on the duct tape with ultraviolet light in dual stages. The method further comprises applying on the digitally printed duct tape a material or composition having overcoat properties, release properties, or a combination thereof.
    Type: Grant
    Filed: July 23, 2014
    Date of Patent: March 21, 2017
    Assignee: Shurtape Technologies, LLC
    Inventors: George Stamatoukos, Daniel Eric Festa, Sr., Stanley Williams, Donald Terry Hagood
  • Patent number: 9594022
    Abstract: A chemical-analysis device integrated with a metallic-nanofinger device for chemical sensing. The chemical-analysis device includes a metallic-nanofinger device, and a platform. The metallic-nanofinger device includes a substrate, and a plurality of nanofingers coupled with the substrate. A nanofinger of the plurality includes a flexible column, and a metallic cap coupled to an apex of the flexible column. At least the nanofinger and a second nanofinger of the plurality of nanofingers are to self-arrange into a close-packed configuration with at least one analyte molecule. A morphology of the metallic cap is to generate a shifted plasmonic-resonance peak associated with amplified luminescence from the analyte molecule. A method for using, and a chemical-analysis apparatus including the chemical-analysis device are also provided.
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: March 14, 2017
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Zhiyong Li, R. Stanley Williams
  • Patent number: 9558869
    Abstract: Apparatus and methods related to negative differential resistance (NDR) are provided. An NDR device includes a spaced pair of electrodes and at least two different materials disposed there between. One of the two materials is characterized by negative thermal expansion, while the other material is characterized by positive thermal expansion. The two materials are further characterized by distinct electrical resistivities. The NDR device is characterized by a non-linear electrical resistance curve that includes a negative differential resistance range. The NDR device operates along the curve in accordance with an applied voltage across the pair of electrodes.
    Type: Grant
    Filed: September 4, 2015
    Date of Patent: January 31, 2017
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Jianhua Yang, Minxian Max Zhang, R. Stanley Williams