Abstract: Numerous examples for performing tuning of a page or a word of non-volatile memory cells in an analog neural memory are disclosed. In one example, a method comprises programming a word or page of non-volatile memory cells in an analog neural memory system; and identifying any fast bits in the word or page of non-volatile memory cells.

Abstract: Numerous examples are disclosed of an artificial neural network comprising a plurality of reference arrays used for configuration of a vector-by-matrix multiplication array. In one example, a system comprises a vector-by-matrix multiplication array in an artificial neural network; and a plurality of reference arrays characterized by different I-V curves, wherein one or more of the plurality of reference arrays are used to generate input voltage the vector-by-matrix multiplication array during operation.

Abstract: Numerous examples are disclosed of an artificial neural network that comprises vector-by-matrix multiplication arrays utilizing analog outputs. In one example, a system comprises a vector by matrix multiplication array comprising a plurality of non-volatile memory cells arranged in rows and columns; and an output circuit to receive a respective neuron current from respective columns of the vector by matrix multiplication array and to generate a respective output voltage, the output circuit comprising a neuron scalar to generate a scaled current from the received respective neuron current, and a current-to-voltage converter to convert the scaled current into the respective output voltage.

Abstract: Numerous examples are disclosed of an artificial neural network that comprises vector-by-matrix multiplication arrays utilizing analog inputs. In one example, a system comprises a vector by matrix multiplication array comprising a plurality of non-volatile memory cells arranged in rows and columns, a capacitor comprising a first terminal and a second terminal, the second terminal coupled to a common potential, a row decoder to enable an application of an input signal to the first terminal of the capacitor in response to an address, and a buffer coupled to the first terminal of the capacitor, the buffer to generate an output voltage for a respective row of the vector by matrix multiplication array.

Abstract: An apparatus includes a flow cell body, a plurality of electrodes, an integrated circuit, and an imaging assembly. The flow cell body defines one or more flow channels and a plurality of wells. Each flow channel is configured to receive a flow of fluid. Each well is fluidically coupled with the corresponding flow channel. Each well is configured to contain at least one polynucleotide. Each electrode is positioned in a corresponding well of the plurality of wells. The electrodes are operable to effect writing of polynucleotides in the corresponding wells. The integrated circuit is operable to drive selective deposition or activation of selected nucleotides to attach to polynucleotides in the wells to thereby generate polynucleotides representing machine-written data in the wells. The imaging assembly is operable to capture images indicative of one or more nucleotides in a polynucleotide.

Abstract: In one example, a method is disclosed of compensating for leakage in an array of analog neural non-volatile memory cells, wherein the array is arranged in rows and columns, wherein each row is coupled to a word line and each column is coupled to a bitline, the method comprising measuring leakage for a column of analog neural non-volatile memory cells coupled to a bitline; storing the measured leakage value; and applying the measured leakage value during a read operation of the column of analog neural non-volatile memory cells to compensate for the leakage.

Abstract: Artificial intelligence driven signal enhancement of sequencing images enables enhanced sequencing by synthesis that determines a sequence of bases in genetic material with any one or more of: improved performance, improved accuracy, and/or reduced cost. A training set of images taken at unreduced and reduced power levels used to excite fluorescence during sequencing by synthesis is used to train a neural network to enable the neural network to recover enhanced images, as if taken at the unreduced power level, from unenhanced images taken at the reduced power level.

Abstract: Devices, systems, and methods for non-volatile storage include a well activation device operable to modify one or more wells from a plurality of wells of a flow cell to provide a set of readable wells. Readable wells are configured to allow exposure of a well to substances from nucleotide sequencing fluids, and prevent exposure to other substances and fluids, such as nucleotide synthesizing fluids. The well activation device may also modify wells to provide a set of writeable wells. This set of wells is configured to allow exposure to the nucleotide synthesizing fluids and substances; and prevent exposure to the nucleotide sequencing fluids and substances. There may also be provisions made for risk mitigation for data errors such as generating commands to write specified data to a nucleotide sequence associated with a particular location in a storage device, reading the nucleotide sequence and performing a comparison.

Abstract: In one example, a method comprises determining a program resolution current value; and setting levels for a programming operation of a plurality of non-volatile memory cells in a neural network array such that a delta current between levels of each pair of adjacent cells in the plurality is a multiple of the program resolution current value.

Abstract: Artificial intelligence driven enhancement of motion blurred sequencing images enables enhanced sequencing that determines a sequence of bases in genetic material with any one or more of: improved performance, improved accuracy, and/or reduced cost. A training set of images taken after unreduced and reduced movement settling times during sequencing is used to train a neural network to enable the neural network to recover enhanced images, as if taken after the unreduced movement settling time, from unenhanced images taken after the reduced movement settling time.

Abstract: Numerous embodiments are disclosed for a high voltage generation algorithm and system for generating high voltages necessary for a particular programming operation in analog neural memory used in a deep learning artificial neural network. In one example, a method for programming a plurality of non-volatile memory cells in an array of non-volatile memory cells, comprises generating a high voltage, and programming a plurality of non-volatile memory cells in an array using the high voltage when a programming enable signal is asserted and providing a feedback loop to maintain the high voltage while programming the plurality of non-volatile memory cells.

Abstract: Numerous examples are described for providing an artificial neural network system comprising an analog array and a digital array. In certain examples, an analog array and a digital array are coupled to shared bit lines. In other examples, an analog array and a digital array are coupled to separate bit lines.

Abstract: Numerous embodiments are disclosed for splitting a physical array into multiple arrays for separate vector-by-matrix multiplication (VMM) operations. In one example, a system comprises an array of non-volatile memory cells arranged into rows and columns; and a plurality of sets of output lines, where each column contains a set of output lines; wherein each row is coupled to only one output line in the set of output lines for each column.

Abstract: An apparatus includes a flow cell body, a plurality of electrodes, an integrated circuit, and an imaging assembly. The flow cell body defines one or more flow channels and a plurality of wells. Each flow channel is configured to receive a flow of fluid. Each well is fluidically coupled with the corresponding flow channel. Each well is configured to contain at least one polynucleotide. Each electrode is positioned in a corresponding well of the plurality of wells. The electrodes are operable to effect writing of polynucleotides in the corresponding wells. The integrated circuit is operable to drive selective deposition or activation of selected nucleotides to attach to polynucleotides in the wells to thereby generate polynucleotides representing machine-written data in the wells. The imaging assembly is operable to capture images indicative of one or more nucleotides in a polynucleotide.

Abstract: Techniques are described for reducing the number of angles needed in structured illumination imaging of biological samples through the use of patterned flowcells, where nanowells of the patterned flowcells are arranged in, e.g., a square array, or an asymmetrical array. Accordingly, the number of images needed to resolve details of the biological samples is reduced. Techniques are also described for combining structured illumination imaging with line scanning using the patterned flowcells.

Abstract: Two or more physical memory cells are grouped together to form a logical cell that stores one of N possible levels. Within each logical cell, the memory cells can be programmed using different mechanisms. For example, one or more of the memory cells in a logical cell can be programmed using a coarse programming mechanism, one or more of the memory cells can be programmed using a fine mechanism, and one or more of the memory cells can be programmed using a tuning mechanism. This achieves extreme programming accuracy and programming speed.

Abstract: An apparatus includes a flow cell body, a plurality of electrodes, an imaging assembly, and one or more barrier features. The flow cell body defines one or more flow channels and a plurality of wells defined as recesses in the floor of each flow channel. Each well is fluidically coupled with the corresponding flow channel. The flow cell body further defines interstitial surfaces between adjacent wells. Each well defines a corresponding depth. Each electrode is positioned in a corresponding well of the plurality of wells. The electrodes are to effect writing of polynucleotides in the wells. The imaging assembly is to capture images of polynucleotides written in the wells. The one or more barrier features are positioned in the wells, between the wells, or above the wells. The one or more barrier features contain reactions in each well, reduce diffusion between the wells, or reduce optical cross-talk between the wells.

Abstract: Numerous embodiments of analog neural memory arrays are disclosed. In one embodiment, a system comprises a first array of non-volatile memory cells, wherein the cells are arranged in rows and columns and the non-volatile memory cells in one or more of the columns stores W+ values, and wherein one of the columns in the first array is a dummy column; and a second array of non-volatile memory cells, wherein the cells are arranged in rows and columns and the non-volatile memory cells in one or more of the columns stores W? values, and wherein one of the columns in the second array is a dummy column; wherein pairs of cells from the first array and the second array store a differential weight, W, according to the formula W=(W+)?(W?).

Abstract: Apparatus and methods for controlling heating of an objective in a linescanning sequencing system to improve resolution are disclosed. In accordance with a first implementation, an apparatus includes or comprises a beam source for providing input radiation and a beam shaping group including or comprising one or more optical elements positioned to receive the input radiation from the beam source, and to perform beam shaping on the input radiation to form a shaped beam. The apparatus further including or comprising an objective positioned to receive the shaped beam and to transform the shaped beam into a probe beam and configured to provide the probe beam to a focal plane of the objective for optically probing a sample. The beam shaping group is configured to adjust one or more properties of the shaped beam over time to generally uniformly heat the objective over a region of incidence for the shaped beam.

Abstract: Numerous embodiments of circuitry for a set-while-verify operation and a reset-while verify operation for resistive random access memory cells are disclosed. In one embodiment, a set-while-verify circuit for performing a set operation on a selected RRAM cell in the array applies a combination of voltages or current to a bit line, word line, and source line associated with the selected RRAM cell and stops said applying when the set operation is complete. In another embodiment, a reset-while-verify circuit for performing a reset operation on a selected RRAM cell in the array applies a combination of voltages or current to a bit line, word line, and source line associated with the selected RRAM cell and stops said applying when the reset operation is complete.