Patents by Inventor Stanley Hong

Stanley Hong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220319620
    Abstract: Testing circuitry and methods are disclosed for use with analog neural memory in deep learning artificial neural networks. In one example, a method is disclosed of testing a plurality of non-volatile memory cells in an array of non-volatile memory cells, wherein the array is arranged in rows and columns, wherein each row is coupled to a word line and each column is coupled to a bit line, and wherein each word line is selectively coupled to a row decoder and each bit line is selectively coupled to a column decoder, the method comprising asserting, by the row decoder, all word lines in the array; asserting, by the column decoder, all bit lines in the array; performing a deep programming operation on the array of non-volatile memory cells; and measuring a total current received from the bit lines.
    Type: Application
    Filed: June 15, 2022
    Publication date: October 6, 2022
    Inventors: Hieu Van TRAN, Thuan VU, Stephen TRINH, Stanley HONG, Anh LY, Steven LEMKE, Nha NGUYEN, Vipin TIWARI, Nhan DO
  • Publication number: 20220317100
    Abstract: An apparatus includes a flow cell body, a plurality of electrodes, an imaging assembly, and one or more barrier features. The flow cell body defines one or more flow channels and a plurality of wells defined as recesses in the floor of each flow channel. Each well is fluidically coupled with the corresponding flow channel. The flow cell body further defines interstitial surfaces between adjacent wells. Each well defines a corresponding depth. Each electrode is positioned in a corresponding well of the plurality of wells. The electrodes are to effect writing of polynucleotides in the wells. The imaging assembly is to capture images of polynucleotides written in the wells. The one or more barrier features are positioned in the wells, between the wells, or above the wells. The one or more barrier features contain reactions in each well, reduce diffusion between the wells, or reduce optical cross-talk between the wells.
    Type: Application
    Filed: June 22, 2022
    Publication date: October 6, 2022
    Inventors: Tarun Khurana, Ali Agah, Aathavan Karunakaran, Stanley Hong, Merek Siu, Arvin Emadi, Craig Ciesla
  • Patent number: 11453003
    Abstract: An apparatus includes a flow cell body, a plurality of electrodes, an integrated circuit, and an imaging assembly. The flow cell body defines one or more flow channels and a plurality of wells. Each flow channel is configured to receive a flow of fluid. Each well is fluidically coupled with the corresponding flow channel. Each well is configured to contain at least one polynucleotide. Each electrode is positioned in a corresponding well of the plurality of wells. The electrodes are operable to effect writing of polynucleotides in the corresponding wells. The integrated circuit is operable to drive selective deposition or activation of selected nucleotides to attach to polynucleotides in the wells to thereby generate polynucleotides representing machine-written data in the wells. The imaging assembly is operable to capture images indicative of one or more nucleotides in a polynucleotide.
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: September 27, 2022
    Assignee: ILLUMINA, INC.
    Inventors: Ali Agah, Aathavan Karunakaran, Tarun Khurana, Stanley Hong, Merek Siu, Arvin Emadi, Craig Ciesla
  • Patent number: 11449741
    Abstract: Testing circuitry and methods are disclosed for use with analog neural memory in deep learning artificial neural networks. The analog neural memory comprises one or more arrays of non-volatile memory cells. The testing circuitry and methods can be utilized during sort tests, qualification tests, and other tests to verify programming operations of one or more cells.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: September 20, 2022
    Assignee: SILICON STORAGE TECHNOLOGY, INC.
    Inventors: Hieu Van Tran, Thuan Vu, Stephen Trinh, Stanley Hong, Anh Ly, Steven Lemke, Nha Nguyen, Vipin Tiwari, Nhan Do
  • Patent number: 11423979
    Abstract: Various embodiments of word line decoders, control gate decoders, bit line decoders, low voltage row decoders, and high voltage row decoders and various types of physical layout designs for non-volatile flash memory arrays in an analog neural system are disclosed. Shared and segmented embodiments of high voltage row decoders are disclosed.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: August 23, 2022
    Assignee: SILICON STORAGE TECHNOLOGY, INC.
    Inventors: Hieu Van Tran, Thuan Vu, Stanley Hong, Stephen Trinh, Anh Ly, Han Tran, Kha Nguyen, Hien Pham
  • Publication number: 20220254414
    Abstract: Numerous embodiments are disclosed for a high voltage generation algorithm and system for generating high voltages necessary for a particular programming operation in analog neural memory used in a deep learning artificial neural network. In one example, a method for programming a plurality of non-volatile memory cells in an array of non-volatile memory cells, comprises generating a high voltage, and programming a plurality of non-volatile memory cells in an array using the high voltage when a programming enable signal is asserted and providing a feedback loop to maintain the high voltage while programming the plurality of non-volatile memory cells.
    Type: Application
    Filed: May 2, 2022
    Publication date: August 11, 2022
    Inventors: Hieu Van Tran, Thuan Vu, Stanley Hong, Anh Ly, Vipin Tiwari, Nhan Do
  • Publication number: 20220254452
    Abstract: A system writes input data to a storage device as machine-written polynucleotides; and reads machine written polynucleotides from the storage device as output data. The storage device includes a flow cell including a plurality of storage wells in which machine written polynucleotides may be stored. The storage device may include a set of electrodes corresponding to the storage wells that allow for selective interactions with wells across the surface of a flow cell. Operation of the storage device may include receiving a read request associated with a particular location in the storage device, creating a copy of a nucleotide sequence located at the particular location in the storage device, transferring the copy of the nucleotide sequence to a read location, and reading the copy of the nucleotide sequence at the read location.
    Type: Application
    Filed: March 1, 2022
    Publication date: August 11, 2022
    Inventors: Craig Ciesla, Ali Agah, Stanley Hong, Tarun Khurana, Aathavan Karunakaran, Arvin Emadi, Merek Siu
  • Patent number: 11402358
    Abstract: An apparatus includes a flow cell body, a plurality of electrodes, an imaging assembly, and one or more barrier features. The flow cell body defines one or more flow channels and a plurality of wells defined as recesses in the floor of each flow channel. Each well is fluidically coupled with the corresponding flow channel. The flow cell body further defines interstitial surfaces between adjacent wells. Each well defines a corresponding depth. Each electrode is positioned in a corresponding well of the plurality of wells. The electrodes are to effect writing of polynucleotides in the wells. The imaging assembly is to capture images of polynucleotides written in the wells. The one or more barrier features are positioned in the wells, between the wells, or above the wells. The one or more barrier features contain reactions in each well, reduce diffusion between the wells, or reduce optical cross-talk between the wells.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: August 2, 2022
    Assignee: ILLUMINA, INC.
    Inventors: Tarun Khurana, Ali Agah, Aathavan Karunakaran, Stanley Hong, Merek Siu, Arvin Emadi, Craig Ciesla
  • Patent number: 11393546
    Abstract: Testing circuitry and methods are disclosed for use with analog neural memory in deep learning artificial neural networks. The analog neural memory comprises one or more arrays of non-volatile memory cells. The testing circuitry and methods can be utilized during sort tests, qualification tests, and other tests to verify programming operations of one or more cells.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: July 19, 2022
    Assignee: SILICON STORAGE TECHNOLOGY, INC.
    Inventors: Hieu Van Tran, Thuan Vu, Stephen Trinh, Stanley Hong, Anh Ly, Steven Lemke, Nha Nguyen, Vipin Tiwari, Nhan Do
  • Publication number: 20220215239
    Abstract: Numerous embodiments for reading or verifying a value stored in a selected non-volatile memory cell in a vector-by-matrix multiplication (VMM) array in an artificial neural network are disclosed. The embodiments comprise various designs of input blocks for applying inputs to the VMM array during a read or verify operation and various designs of output blocks for receiving outputs from the VMM array during the read or verify operation.
    Type: Application
    Filed: March 31, 2021
    Publication date: July 7, 2022
    Inventors: Hieu Van Tran, Thuan Vu, Stephen Trinh, Stanley Hong, Nghia Le, Toan Le, Hien Pham
  • Patent number: 11354562
    Abstract: Numerous embodiments for processing the current output of a vector-by-matrix multiplication (VMM) array in an artificial neural network are disclosed. The embodiments comprise a summer circuit and an activation function circuit. The summer circuit and/or the activation function circuit comprise circuit elements that can be adjusted in response to the total possible current received from the VMM to optimize power consumption.
    Type: Grant
    Filed: March 27, 2018
    Date of Patent: June 7, 2022
    Assignee: SILICON STORAGE TECHNOLOGY, INC.
    Inventors: Hieu Van Tran, Stanley Hong, Anh Ly, Thuan Vu, Hien Pham, Kha Nguyen, Han Tran
  • Patent number: 11355184
    Abstract: Numerous embodiments of analog neural memory arrays are disclosed. In certain embodiments, each memory cell in the array has an approximately constant source impedance when that cell is being operated. In certain embodiments, power consumption is substantially constant from bit line to bit line within the array when cells are being read. In certain embodiments, weight mapping is performed adaptively for optimal performance in power and noise.
    Type: Grant
    Filed: August 6, 2020
    Date of Patent: June 7, 2022
    Assignee: SILICON STORAGE TECHNOLOGY, INC.
    Inventors: Hieu Van Tran, Thuan Vu, Stephen Trinh, Stanley Hong, Anh Ly, Vipin Tiwari
  • Publication number: 20220172781
    Abstract: Various embodiments of tandem row decoders are disclosed. Each embodiment of a tandem row decoder comprises a word line decoder and a control gate decoder. The tandem row decoder exhibits reduced leakage current on the word line and the control gate line when the tandem row decoder is not enabled.
    Type: Application
    Filed: February 15, 2022
    Publication date: June 2, 2022
    Inventors: Hieu Van Tran, Thuan Vu, Stanley Hong, Stephen Trinh, Anh Ly
  • Publication number: 20220150394
    Abstract: A method is used to generate an analysis image of a moving sample based on one or more exposures. An illumination source illuminates a field of view of a camera for one or more pulses while the sample moves through the field of view. The distance moved by the sample during each of these one or more pulses may be less than the size of one pixel in an image captured by the camera.
    Type: Application
    Filed: October 28, 2021
    Publication date: May 12, 2022
    Inventors: Geraint Evans, Stanley Hong, Merek Siu, Shaoping Lu, John Moon
  • Publication number: 20220134334
    Abstract: An analysis substrate comprises: a localization layer to be provided with a sample comprising a nucleotide provided with a fluorescent dye; and a sensor layer comprising an array of sensor pixels, the localization layer being on-chip relative to the sensor layer, one or more of the array of sensor pixels to receive a propagation of fluorescence from the fluorescent dye.
    Type: Application
    Filed: December 8, 2020
    Publication date: May 5, 2022
    Inventors: Geraint Evans, Stanley Hong
  • Publication number: 20220097060
    Abstract: An apparatus includes a flow cell body, a plurality of electrodes, an integrated circuit, and an imaging assembly. The flow cell body defines one or more flow channels and a plurality of wells. Each flow channel is configured to receive a flow of fluid. Each well is fluidically coupled with the corresponding flow channel. Each well is configured to contain at least one polynucleotide. Each electrode is positioned in a corresponding well of the plurality of wells. The electrodes are operable to effect writing of polynucleotides in the corresponding wells. The integrated circuit is operable to drive selective deposition or activation of selected nucleotides to attach to polynucleotides in the wells to thereby generate polynucleotides representing machine-written data in the wells. The imaging assembly is operable to capture images indicative of one or more nucleotides in a polynucleotide.
    Type: Application
    Filed: December 14, 2021
    Publication date: March 31, 2022
    Inventors: Ali Agah, Aathavan Karunakaran, Tarun Khurana, Stanley Hong, Merek Siu, Arvin Emadi, Craig Ciesla
  • Patent number: 11289164
    Abstract: Various embodiments of tandem row decoders are disclosed. Each embodiment of a tandem row decoder comprises a word line decoder and a control gate decoder. The tandem row decoder exhibits reduced leakage current on the word line and the control gate line when the tandem row decoder is not enabled.
    Type: Grant
    Filed: November 25, 2020
    Date of Patent: March 29, 2022
    Assignee: SILICON STORAGE TECHNOLOGY, INC.
    Inventors: Hieu Van Tran, Thuan Vu, Stanley Hong, Stephen Trinh, Anh Ly
  • Patent number: 11282588
    Abstract: A system writes input data to a storage device as machine-written polynucleotides; and reads machine written polynucleotides from the storage device as output data. The storage device includes a flow cell including a plurality of storage wells in which machine written polynucleotides may be stored. The storage device may include a set of electrodes corresponding to the storage wells that allow for selective interactions with wells across the surface of a flow cell. Operation of the storage device may include receiving a read request associated with a particular location in the storage device, creating a copy of a nucleotide sequence located at the particular location in the storage device, transferring the copy of the nucleotide sequence to a read location, and reading the copy of the nucleotide sequence at the read location.
    Type: Grant
    Filed: May 26, 2020
    Date of Patent: March 22, 2022
    Assignee: ILLUMINA, INC.
    Inventors: Craig Ciesla, Ali Agah, Stanley Hong, Tarun Khurana, Aathavan Karunakaran, Arvin Emadi, Merek Siu
  • Patent number: 11229909
    Abstract: An apparatus includes a flow cell body, a plurality of electrodes, an integrated circuit, and an imaging assembly. The flow cell body defines one or more flow channels and a plurality of wells. Each flow channel is configured to receive a flow of fluid. Each well is fluidically coupled with the corresponding flow channel. Each well is configured to contain at least one polynucleotide. Each electrode is positioned in a corresponding well of the plurality of wells. The electrodes are operable to effect writing of polynucleotides in the corresponding wells. The integrated circuit is operable to drive selective deposition or activation of selected nucleotides to attach to polynucleotides in the wells to thereby generate polynucleotides representing machine-written data in the wells. The imaging assembly is operable to capture images indicative of one or more nucleotides in a polynucleotide.
    Type: Grant
    Filed: May 26, 2020
    Date of Patent: January 25, 2022
    Assignee: ILLUMINA, INC.
    Inventors: Ali Agah, Aathavan Karunakaran, Tarun Khurana, Stanley Hong, Merek Siu, Arvin Emadi, Craig Ciesla
  • Publication number: 20220004860
    Abstract: Numerous embodiments of analog neural memory arrays are disclosed. Certain embodiments comprise an adaptive bias decoder for providing additional bias to array input lines to compensate for instances where ground floats above 0V. This is useful, for example, to minimize the voltage drop for a read, program, or erase operation while maintaining accuracy in the operation.
    Type: Application
    Filed: January 4, 2021
    Publication date: January 6, 2022
    Inventors: Hieu Van Tran, Thuan Vu, Stanley Hong, Stephen Trinh, Anh Ly, Nhan Do, Mark Reiten