Patents by Inventor Stephen P. Robb

Stephen P. Robb has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190298497
    Abstract: A lower region of a temporary abutment includes an anti-rotational feature for non-rotationally mating with a dental implant. An upper region of the temporary abutment includes a first anti-rotational structure and at least one retention groove. A top surface of the temporary abutment includes one or more informational markers that provide information concerning the dental implant. A temporary abutment cap is configured to be coupled to the upper region of the temporary abutment. The temporary abutment cap has at least one projection configured to mate with the at least one retention groove of the temporary abutment. The temporary abutment cap has a second anti-rotational structure that is configured to slidably engage the first anti-rotational structure of the temporary abutment. The temporary abutment cap is configured to be coupled with a temporary prosthesis such that the temporary prosthesis and the temporary abutment cap are removable from the temporary abutment.
    Type: Application
    Filed: June 19, 2019
    Publication date: October 3, 2019
    Inventors: T. Tait Robb, Stephen M. Herrington, Miguel G. Montero, Ralph E. Goodman, Dan P. Rogers, John J. Bellanca, Zachary B. Suttin
  • Patent number: 10368964
    Abstract: A lower region of a temporary abutment includes an anti-rotational feature for non-rotationally mating with a dental implant. An upper region of the temporary abutment includes a first anti-rotational structure and at least one retention groove. A top surface of the temporary abutment includes one or more informational markers that provide information concerning the dental implant. A temporary abutment cap is configured to be coupled to the upper region of the temporary abutment. The temporary abutment cap has at least one projection configured to mate with the at least one retention groove of the temporary abutment. The temporary abutment cap has a second anti-rotational structure that is configured to slidably engage the first anti-rotational structure of the temporary abutment. The temporary abutment cap is configured to be coupled with a temporary prosthesis such that the temporary prosthesis and the temporary abutment cap are removable from the temporary abutment.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: August 6, 2019
    Assignee: Biomet 3I, LLC
    Inventors: T. Tait Robb, Stephen M. Herrington, Miguel G. Montero, Ralph E. Goodman, Dan P. Rogers, John J. Bellanca, Zachary B. Suttin
  • Patent number: 8748262
    Abstract: In one embodiment, a vertical power transistor is formed on a semiconductor substrate with other transistors. A portion of the semiconductor layer underlying the vertical power transistor is doped to provide a low on-resistance for the vertical power transistor.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: June 10, 2014
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Francine Y. Robb, Stephen P. Robb, Prasad Venkatraman, Zia Hossain
  • Patent number: 8693149
    Abstract: In one embodiment, a semiconductor device to provide protection for electronic circuits, the semiconductor device typically includes a vertical MOS transistor, a reference circuit, and an amplifier. The amplifier amplifies the reference voltage to enable the vertical MOS transistor responsively to a transient event.
    Type: Grant
    Filed: May 20, 2009
    Date of Patent: April 8, 2014
    Assignee: Semiconductor Components Industries, LLC.
    Inventors: Alan R. Ball, Stephen P. Robb
  • Patent number: 8530284
    Abstract: In one embodiment, a transistor is formed to have a first current flow path to selectively conduct current in both directions through the transistor and to have a second current flow path to selectively conduct current in one direction.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: September 10, 2013
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Francine Y. Robb, Stephen P. Robb
  • Publication number: 20120211827
    Abstract: In one embodiment, a vertical power transistor is formed on a semiconductor substrate with other transistors. A portion of the semiconductor layer underlying the vertical power transistor is doped to provide a low on-resistance for the vertical power transistor.
    Type: Application
    Filed: April 27, 2012
    Publication date: August 23, 2012
    Inventors: Francine Y. Robb, Stephen P. Robb, Prasad Venkatraman, Zia Hossain
  • Patent number: 8217706
    Abstract: A method and circuit for managing thermal performance of an integrated circuit. Temperature sensing circuits and a plurality of power FETs that are coupled together in parallel are manufactured from a semiconductor substrate. Each temperature sensing circuit monitors the temperature of the portion of the semiconductor substrate near or including a corresponding power FET. When the temperature of the semiconductor substrate near one or more of the power FETs reaches a predetermined value, the corresponding temperature sensing circuit reduces a voltage appearing on the gate of the power FET. The reduced voltage increases the on-resistance of the power FET and channels a portion of its current to others of the plurality of power FETs. The power FET continues operating but with a reduced current flow. When the temperature of the semiconductor substrate falls below the predetermined value, the gate voltage of the power FET is increased to its nominal value.
    Type: Grant
    Filed: March 4, 2009
    Date of Patent: July 10, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Alan R. Ball, Stephen P. Robb
  • Patent number: 8207035
    Abstract: In one embodiment, a vertical power transistor is formed on a semiconductor substrate with other transistors. A portion of the semiconductor layer underlying the vertical power transistor is doped to provide a low on-resistance for the vertical power transistor.
    Type: Grant
    Filed: January 29, 2010
    Date of Patent: June 26, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Francine Y. Robb, Stephen P. Robb, Prasad Venkatraman, Zia Hossain
  • Publication number: 20120083075
    Abstract: In one embodiment, a transistor is formed to have a first current flow path to selectively conduct current in both directions through the transistor and to have a second current flow path to selectively conduct current in one direction.
    Type: Application
    Filed: December 13, 2011
    Publication date: April 5, 2012
    Inventors: Francine Y. Robb, Stephen P. Robb
  • Patent number: 8101969
    Abstract: In one embodiment, a transistor is formed to have a first current flow path to selectively conduct current in both directions through the transistor and to have a second current flow path to selectively conduct current in one direction.
    Type: Grant
    Filed: February 8, 2011
    Date of Patent: January 24, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Francine Y. Robb, Stephen P. Robb
  • Publication number: 20110127573
    Abstract: In one embodiment, a transistor is formed to have a first current flow path to selectively conduct current in both directions through the transistor and to have a second current flow path to selectively conduct current in one direction.
    Type: Application
    Filed: February 8, 2011
    Publication date: June 2, 2011
    Inventors: Francine Y. Robb, Stephen P. Robb
  • Patent number: 7910409
    Abstract: In one embodiment, a transistor is formed to have a first current flow path to selectively conduct current in both directions through the transistor and to have a second current flow path to selectively conduct current in one direction.
    Type: Grant
    Filed: March 20, 2009
    Date of Patent: March 22, 2011
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Francine Y. Robb, Stephen P. Robb
  • Publication number: 20100296210
    Abstract: In one embodiment, a semiconductor device to provide protection for electronic circuits, the semiconductor device typically includes a vertical MOS transistor, a reference circuit, and an amplifier. The amplifier amplifies the reference voltage to enable the vertical MOS transistor responsively to a transient event.
    Type: Application
    Filed: May 20, 2009
    Publication date: November 25, 2010
    Inventors: Alan R. Ball, Stephen P. Robb
  • Patent number: 7839099
    Abstract: In one embodiment, an LED control circuit is configured control a current through an LED responsively to a value that is proportional to a control signal for values of the control signal that are less than a threshold value of the control signal and to control the current to a value that is proportional to the threshold value for values of the control signal that are greater than the threshold value.
    Type: Grant
    Filed: April 7, 2006
    Date of Patent: November 23, 2010
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Alan R. Ball, Stephen P. Robb
  • Publication number: 20100133610
    Abstract: In one embodiment, a vertical power transistor is formed on a semiconductor substrate with other transistors. A portion of the semiconductor layer underlying the vertical power transistor is doped to provide a low on-resistance for the vertical power transistor.
    Type: Application
    Filed: January 29, 2010
    Publication date: June 3, 2010
    Inventors: Francine Y. Robb, Stephen P. Robb, Prasad Venkatraman, Zia Hossain
  • Patent number: 7714381
    Abstract: In one embodiment, a vertical power transistor is formed on a semiconductor substrate with other transistors. A portion of the semiconductor layer underlying the vertical power transistor is doped to provide a low on-resistance for the vertical power transistor.
    Type: Grant
    Filed: April 1, 2005
    Date of Patent: May 11, 2010
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Francine Y. Robb, Stephen P. Robb, Prasad Venkatraman, Zia Hossain
  • Patent number: 7583034
    Abstract: In one embodiment, a vertical N-channel transistor is coupled in a high side configuration to control a current through an LED. A control circuit operates the vertical N-channel transistor to control a value of the current.
    Type: Grant
    Filed: September 26, 2006
    Date of Patent: September 1, 2009
    Assignee: Semiconductor Components Industries, L.L.C.
    Inventors: Alejandro Lara-Ascorra, Stephen P. Robb, Alan R. Ball
  • Patent number: 7564666
    Abstract: In one embodiment, a protection device is used to protect a circuit. The protection device has a maximum rated power dissipation that is less than a maximum rated power dissipation of the circuit that is being protected.
    Type: Grant
    Filed: May 2, 2006
    Date of Patent: July 21, 2009
    Assignee: Semiconductor Components Industries, L.L.C.
    Inventors: Alan R. Ball, Stephen P. Robb
  • Publication number: 20090179223
    Abstract: In one embodiment, a transistor is formed to have a first current flow path to selectively conduct current in both directions through the transistor and to have a second current flow path to selectively conduct current in one direction.
    Type: Application
    Filed: March 20, 2009
    Publication date: July 16, 2009
    Inventors: Francine Y. Robb, Stephen P. Robb
  • Publication number: 20090160528
    Abstract: A method and circuit for managing thermal performance of an integrated circuit. Temperature sensing circuits and a plurality of power FETs that are coupled together in parallel are manufactured from a semiconductor substrate. Each temperature sensing circuit monitors the temperature of the portion of the semiconductor substrate near or including a corresponding power FET. When the temperature of the semiconductor substrate near one or more of the power FETs reaches a predetermined value, the corresponding temperature sensing circuit reduces a voltage appearing on the gate of the power FET. The reduced voltage increases the on-resistance of the power FET and channels a portion of its current to others of the plurality of power FETs. The power FET continues operating but with a reduced current flow. When the temperature of the semiconductor substrate falls below the predetermined value, the gate voltage of the power FET is increased to its nominal value.
    Type: Application
    Filed: March 4, 2009
    Publication date: June 25, 2009
    Inventors: Alan R. Ball, Stephen P. Robb