Abstract: A method is provided of determining the pixel drive signals to be applied to the pixels of an array of light emitting display elements arranged in rows and columns, with a plurality of the pixels in a row being supplied with current simultaneously along a respective row conductor. Target pixel drive currents are determined from a model of the pixel current-brightness characteristics. These are modified to take account of the voltage on the respective row conductor at each pixel resulting from the currents drawn from the row conductor by the plurality of pixels and the dependency of the pixel brightness characteristics on the voltage on the row conductor at the pixel. This addresses the problem of horizontal cross-talk that occurs in active matrix LED displays due to the finite output impedance of the current providing TFTs as well as the finite resistance of metals used to form power supply lines.

Abstract: Each pixel of an active matrix electroluminescent display device has a first amorphous silicon drive transistor for intermittently driving a current through the display element and a second amorphous silicon drive transistor for intermittently driving a current through the display element. The aging effect of amorphous silicon TFTs can be reduced by sharing the driving of the display element between two drive transistors. Providing a duty cycle reduces the on-time for each drive transistor, but also provides a period during which there can be some recovery of the TFT characteristics.

Abstract: An active matrix pixel device is provided, for example an electroluminescent display device, the device comprising circuitry supported by a substrate and including a polysilicon TFT (10) and an amorphous silicon thin film PIN diode (12). Polysilicon islands are formed before an amorphous silicon layer is deposited for the PIN diode. This avoids the exposure of the amorphous silicon to high temperature processing. The TFT comprises doped source/drain regions (16a,17a), one of which (17a) may also provide the n-type or p-type doped region for the diode. Advantageously, the requirement to provide a separate doped region for the photodiode is removed, thereby saving processing costs. A second TFT (10b) having a doped source/drain region (16b,17b) of the opposite conductivity type may provide the other doped region (16b) for the diode, wherein the intrinsic region (25) is disposed laterally between the two TFTs, overlying each of the respective polysilicon islands.

Abstract: An active matrix EL display device has pixels comprising an EL display element, a drive transistor and a storage capacitor for storing a voltage to be used for controlling the addressing of the drive transistor. Each pixel also has a light-dependent device for controlling discharge of the storage capacitor, thereby to alter the control of the drive transistor in dependence on the light output of the display element. A circuit is associated with the drive transistor for increasing the rate of discharge of the storage capacitor when the storage capacitor is discharged in response to the light dependent device output. This improvement in the rate of capacitor discharge ensures that good correction for differential aging is obtained at all grey levels.

Abstract: Each stage of a shift register circuit has an input section (60) and an output section (62). The input section of each stage comprises an input section drive transistor (Tdrive) for coupling a first clocked power line voltage (Pn) to the output of the input section (60), an input section compensation capacitor (Ci) for compensating for the effects of a parasitic capacitance of the input section drive transistor (Tdrive) and a first input section bootstrap capacitor (C2) connected between the gate of the drive transistor and the output of the input section. The input section (60) of each stage uses the output (Rn-i) of the input section (60) of at least one preceding stage as a timing control input for controlling a bootstrap function, and the output section (62) of each stage comprises a circuit which receives the outputs of multiple input sections (60) as timing signals for generating output signals for the output loads (64).

Abstract: Driving schemes are described in which rows (1 to m) are selected one at a time and column data voltages are inverted to provide inversion schemes for display devices comprising pixels (12) arranged in rows (1 to m) and columns (1 to n). The order in which rows are selected is such that a first group of first polarity rows is selected in a first order, a first group of second polarity rows is selected in a second order, a second group of first polarity rows is selected in the second order, and a second group of second polarity rows is selected in the first order, the first order being one of ascending or descending row number order, and the second order being the other of ascending or descending row number order.

Abstract: An active matrix pixel device is provided, for example an electroluminescent display device, the device comprising circuitry supported by a substrate and including a polysilicon TFT (10) and an amorphous silicon thin film PIN diode (12). Polysilicon islands are formed before an amorphous silicon layer is deposited for the PIN diode. This avoids the exposure of the amorphous silicon to high temperature processing. The TFT comprises doped source/drain regions (16a,17a), one of which (17a) may also provide the n-type or p-type doped region for the diode. Advantageously, the requirement to provide a separate doped region for the photodiode is removed, thereby saving processing costs. A second TFT (10b) having a doped source/drain region (16b,17b) of the opposite conductivity type may provide the other doped region (16b) for the diode, wherein the intrinsic region (25) is disposed laterally between the two TFTs, overlying each of the respective polysilicon islands.

Abstract: An active matrix display device has an array of oled display pixels (2) operable in two modes in which the power supply line (26) is modulated between a low voltage and a normal power supply voltage. In a first mode, a pixel drive transistor current is supplied to the display element (2) and is selected to provide a desired pixel brightness. In a second mode, a voltage is provided to the drive transistor and is selected to provide a desired ageing effect, but no current flows through the display element. The frame time is thus divided into two periods, one when the power supply line (26) is supplied with a voltage of e.g. OV or ?5V to turn the display element on and the other when the power supply line (26) is supplied with a voltage of e.g. OV or ?5V to turn the display element off.

Abstract: A method of driving an active matrix display device comprises, for each pixel, driving a current through a drive transistor (22) by applying a gate voltage to the drive transistor which comprises a fixed component and a component which depends on a measurement of the threshold voltage of the drive transistor (22), and switching off the drive transistor using a discharge transistor (36) for discharging a capacitance between the gate and source of the drive transistor (22), and at a time which depends on the optical output of the display element (2) and a pixel data signal. This method uses optical feedback to implement a duty cycle control for the output of the display element. The brightness of the display element when turned on is determined by the drive transistor drive voltage, and this takes account of the threshold voltage.

Abstract: An active matrix display is provided with conductor lines extending along edges of the display over the display substrate but outside the display area. These conductor lines include at least one layer which is additional to the thin film layers defining the array of pixels. Row driver circuitry and/or column driver circuitry has a portion provided on the common substrate outside the display area and which connects to the conductor lines. A dedicated process may be used for the conductor lines in order to form low resistance lines. These assist in the integration or mounting of row or column driver circuits onto the common substrate.

Abstract: An active matrix pixel device including a plurality of polycrystalline silicon islands supported by a substrate, one of the polycrystalline silicon islands providing a channel and doped source/drain regions of a thin film transistor, a PIN diode which includes a p-type doped region, and an n-type doped region separated by an amorphous silicon intrinsic region. The amorphous silicon intrinsic region overlies and contacts at least a part of one of the polycrystalline silicon islands which provides one of the p-type or n-type doped regions of the PIN diode. The doped source/drain regions and said one of the p-type or n-type doped regions of the PIN diode are provided by the same polycrystalline silicon island and a vertical n-i-p stack is used by using a doped region of a polysilicon thin film transistor (TFT) for the n-type doped region.

Abstract: In an active matrix display, each pixel has a storage capacitor for storing a voltage to be used for addressing a drive transistor. A discharge transistor is provided for discharging the storage capacitor thereby to switch off the drive transistor. The timing of this is controlled by a light-dependent device which is illuminated by the display element. The drive transistor is controlled to provide a constant light output from the display element, and the duration is controlled in dependence on the data voltage. Optical feedback is used to alter further the timing of operation of the discharge transistor to provide ageing compensation of the display element and compensation for changes in the drive transistor.

Abstract: Each stage of a shift register circuit has a first input (Rn?1) connected to the output of the preceding stage, a drive transistor (Tdrive)for coupling a first clocked power line voltage (Pn) to the output (Rn) of the stage, a compensation capacitor (C1) for compensating for the effects of a parasitic capacitance of the drive transistor, a first bootstrap capacitor (C2) connected between the gate of the drive transistor and the output (Rn) of the stage; and an input transistor (Tin1) for charging the first bootstrap capacitor (C2) and controlled by the first input (Rn?1). Each stage has an input section (10) coupled to the output (Rn?2) of the stage two stages before the stage having a second bootstrap capacitor (C3) connected between the gate of the input transistor (Tin1) and the first input (Rn?1). The use of two bootstrapping capacitors makes the circuit less sensitive to threshold voltage levels or variations, and enables implementation using amorphous silicon technology.

Abstract: A display device has a plurality of pixels, each having a current-driven display element coupled between a first conductive layer and a second conductive layer, the second conductive layer being coupled to a current supply via a switchable device having a thin film component on a first area of a substrate. Each pixel has a first capacitive device having a first capacitor plate on a second area of the substrate, the first capacitor plate conductively coupled to the thin film component, a second capacitor plate and a first insulating layer between the first capacitor plate and the second capacitor plate. On top of the first capacitive device is a second capacitive device sharing the second capacitor plate, the second capacitive device including a third capacitor plate sharing the second conductive layer, and a second insulating layer between the second capacitor plate and the third capacitor plate.

Abstract: Each stage of a shift register circuit has a first input (Rn?1) connected to the output of a preceding stage, a drive transistor (Tdrive) for coupling a first clocked power line voltage (Pn) to the output (Rn) of the stage, a compensation capacitor (C1) for compensating for the effects of a parasitic capacitance of the drive transistor, a first bootstrap capacitor (C2) connected between the gate of the drive transistor and the output (Rn) of the stage; and an input transistor (Tin1) for charging the first bootstrap capacitor (C2) and controlled by the first input (Rn?1). Each stage has an input section (10) coupled to the output (Rn?2) of the stage two (or more) stages before the stage having a second bootstrap capacitor (C3) connected between the gate of the input transistor (Tin1) and the first input (Rn?1). The use of two bootstrapping capacitors makes the circuit less sensitive to threshold voltage levels or variations, and enables implementation using amorphous silicon technology.

Abstract: A thin film circuit comprises a plurality of thin film transistors, each having a light shield portion (60) which is electrically isolated from the source (72), drain (70) and gate (76) electrodes. The light shield portion comprises a first, drain overlap portion in which the light shield portion overlaps the drain conductor (70), a second, source overlap portion in which the light shield portion overlaps the source conductor (72), and a third, gate overlap portion in which the light shield portion overlaps the gate conductor (76) only. In one embodiment, at least ? of the light shield portion area comprises the gate overlap portion. In another embodiment, one of the source and drain overlap portions has at least 1.5 times the area of the other of the source and drain overlap portions. The use of an electrically floating light shield simplifies the layer construction and design.

Abstract: A circuit comprises a first circuit portion (52) controllable by first and second inputs, and a second circuit portion (54) for generating the second input. The first circuit portion (52) has first operating characteristics when the second input (invPn) is provided as control input, and second operating characteristics when the second input (invPn) is not provided as control input. The second circuit portion (54) is adapted to cease functioning through ageing before the end of the lifetime of the first circuit portion (52) thereby to switch the first circuit portion from the first to the second operating characteristics. This circuit uses the failure of a portion of the circuit which generates at least one input control signal, so as to change the overall circuit characteristics as the circuit ages.

Abstract: An active matrix display device has column address circuitry for generating pixel drive signals. The column address circuitry has an output buffer for providing a pixel drive signal to a column conductor, and the positive and negative slew rates of the output buffer are different. By selecting the positive and negative slew rates independently in the design of the output buffer, the size of the transistors (54, 56), particularly those which pass the charging (or discharging) current of the column capacitance, can be kept to a minimum.

Abstract: A display and input device, comprising a substrate (30), for example a flexible conducting foil, comprising a front surface (8) and a rear surface (10); a plurality of layers (32, 34, 35, 36, 37, 39) provided on the front surface (8) of the substrate (30), the plurality of layers (32, 34, 35, 36, 37, 39) being operable as a display, for example an electrophoretic display, viewable from the front surface side of the device; and circuitry (52, 54) connected to the substrate (30) for detecting capacitive coupling between a user's finger (12) and the substrate (30) such that the substrate (30) is operable as a touchpad for sensing a user's finger (12) touching, or being located in close proximity to, the rear surface (10) of the substrate (30).

Abstract: The storage capacitor of an active matrix liquid crystal display is formed to have a second electrode (28) that laterally overlaps a first electrode (10). The drain (30) of a thin film transistor extends across the gate electrode (2). The gate electrode (2) and the first electrode (10) of the storage capacitor are formed from a single metallization layer. The width of the gate electrode (2) and the first electrode (10) will tend to vary in parallel, as a result of process variation. This parallel variation tends to cancel out subsequent variation in the kick back voltage.