Abstract: The invention provides a method of manufacturing an electronic device including a vertical thin film transistor. A layer (8) of semiconductor material is provided over an insulated gate electrode (2). A negative resist (14) is used to define source and drain electrodes (26,28) which extend over the insulating layer (8) up to the step formed therein adjacent an edge (16A) of the gate electrode (2).

Abstract: Short channel thin film transistors suffer from unacceptably high leakage currents. The invention provides an electronic device including a thin film transistor in which the length (20) of the channel of the transistor is 1 &mgr;m or less, and the mobility of the semiconductor material in the channel is less than 0.2 cm2/Vs. The selection of a low mobility semiconductor material results in acceptable off-current characteristics and its effect on the switching speed of the device is compensated for by the short channel length (20) of the device.

Abstract: A method of manufacturing thin film transistors includes the steps of depositing and patterning a plurality of layers (3,13,15,23) to define the thin film transistors, wherein one of the plurality of layers (23) is patterned using a higher definition process and others (3,13,15) of the plurality of layers are patterned using a lower definition process. In particular, a metallization layer (23) defining the source and drain of the thin film transistors may be patterned using the high definition process and the other layers patterned by the low definition process. The high definition process may be photolithography and the low definition process may be printing.

Abstract: A method of forming an active plate for a liquid crystal display using top gate TFTs is described. A black organic light shield layer (73) is used under the TFTs to shield the channel (91) of the TFTs from light passing through a substrate (71) from below. The active plate may be a high aperture plate having pixel electrodes (99) overlapping the row and column (79) conductors. The organic light shield layer may mask the gaps (102) between pixel electrodes.

Abstract: A method of forming an active plate for a liquid crystal display is disclosed in which the source and drain conductors (28, 30), pixel electrodes (38) and column conductors (32) are formed by depositing and patterning a transparent conductor layer. There is selective plating of areas (52; 60) of the transparent conductor layer to form a metallic layer for reducing the resistivity of the transparent conductor layer. The plated areas include the column conductors (32) but exclude the source and drain conductors and the pixel electrodes. This enables the column conductors to be treated to reduce the resistivity, but without altering the channel length of the transistor because the source and drain parts of the layer are shielded from the plating process.

Abstract: An insulated-gate thin film transistor comprises a gate electrode and source (20) and drain (24) electrodes. The source and drain electrodes are laterally spaced apart, and are vertically separated from the gate electrode (12) by a gate insulator layer and an amorphous silicon layer. A region of the amorphous silicon layer (16) is vertically aligned with the lateral spacing between the source and drain electrodes defining the transistor channel, and the region of the amorphous silicon layer has a thickness of less than 100 nm, and is doped with phosphorus atoms with a doping density of between 2.5×1016 and 1.5×1018 atoms per cm3.

Abstract: A thin-film circuit element such as a top-gate TFT has good quality electrical contacts formed between an electrode (151, 152, 155) of chromium nitride and the semiconductor film (50) of the circuit element and/or another conductive film such as a connection track (37,39,40) of, for example, aluminium. Chromium nitride has a particularly advantageous combination of propertied for use as such an electrode material, including, for example, low affinity for oxide growth even during deposition thereon of semiconductor, insulating and/or metal films, a doping potential to enhance ohmic contact to semiconductors, a barrier function against potential impurities, good thin-film processing compatibility, and hillock prevention in an underlying aluminium conductor.

Abstract: An active matrix device comprises a supporting plate (20), an array of control elements (6), a set of row address conductors (26) on the plate for addressing the array to which selection signals are applied by a row driver circuit (22), and a set of column address conductors (12) on the plate to which data signals are applied by a column driver circuit (22) for conduction to the array. Connection from the respective driver circuits (22) to at least some of both sets of address conductors is via the same side of the array, the profile of the plate around the other sides of the array being non-rectangular. Greater flexibility in the design of such devices is thus provided.

Abstract: A method of forming an active plate for a liquid crystal display using bottom gate TFTs. A black mask layer (50,52) is deposited over the patterned source and drain conductor layer before the semiconductor layer is patterned. The black mask layer (50,52) and the part of the semiconductor layer (19) not shielded by the patterned source and drain conductor layer are then patterned using the same pattern, thereby defining a transistor semiconductor body between the patterned gate conductor layer (10) and the patterned source and drain conductor layers (20,22,24) and also defining a patterned black mask layer (50) overlying the semiconductor body (19). In this method, a single mask can be used for patterning the black mask layer and the semiconductor layer defining the transistor body. In this way, no additional masks are required to provide shielding of the transistor body.

Abstract: A transistor substrate for a liquid crystal display comprises an array of insulated-gate staggered TFTs and a capacitor (36) associated with each transistor. The gate insulator (400,420) comprises a first inorganic layer (400) and a second, polymer or spin-on glass layer (420), of which layers only the polymer or spin-on glass layer (420) extends to the capacitor (36) to define the capacitor dielectric.

Abstract: In an electronic device, such as an active matrix display device or the like, comprising a top gate amorphous silicon thin film transistor (10) in which one or both of the source and drain electrodes (15, 16) is of transparent conductive material such as ITO, the PECVD deposited semiconductor layer (18) extending over and between the source and drain electrodes of the TFT is formed as first and second sub-layers (18A, 18B), using different source gas compositions. A noble inert gas such as helium is used as dilutant in forming the first sub-layer adjacent the source and drain electrodes to avoid reduction problems while hydrogen is used as the dilutant in forming the second sub-layer to achieve high stability and mobility characteristics in the completed transistor.

Abstract: Thin-film switching elements (20,21) of a display device or the like include a first electrode (22,23) on a substrate (11) and a layer of switching material (24,25) on the first electrode. These switching elements may be semiconductor PIN or Schottky diodes, or MIMs, or TFTs. The switching material is typically .alpha.-Si:H in the case of the semiconductor diodes and TFTs, and tantalum oxide or silicon nitride in the case of the MIMs. An auxiliary layer (28,29) of insulating material is provided between the first electrode (22,23) and the layer of switching material (24,25), leaving an edge (30,31) of the first electrode uncovered, so that the layer of switching material is connected to this edge only. The switching elements with this construction can be patterned using an inexpensive proximity printer, and have a low capacitance value, so counter-acting kickback and crosstalk which can occur in a switching matrix, e.g in the display of television pictures.

Abstract: A thin-film circuit element such as a top-gate TFT has good quality electrical contacts formed between an electrode (151, 152, 155) of chromium nitride and the semiconductor film (50) of the circuit element and/or another conductive film such as a connection track (37,39,40) of, for example, aluminium. Chromium nitride has a particularly advantageous combination of properties for use as such an electrode material, including, for example, low affinity for oxide growth even during deposition thereon of semiconductor, insulating and/or metal films, a doping potential to enhance ohmic contact to semiconductors, a barrier function against potential impurities, good thin-film processing compatibility, and hillock prevention in an underlying aluminium conductor.

Abstract: A thin film transistor (10) in an electronic device such as an active matrix display panel having an intrinsic amorphous silicon semiconductor layer (22) providing a channel region (23) between source and drain electrodes (14, 16) includes directly adjacent to the side of the semiconductor layer (22) remote from the gate electrode (25) at the channel region (23) a layer (20) of amorphous semiconductor material which has a high defect density and low conductivity that serves to provide recombination centres for photogenerated carriers. Leakage problems due to the photoconductive properties of the intrinsic semiconductor material are then reduced. Conveniently, an hydrogenated silicon rich amorphous silicon alloy (e.g. nitride etc) can be used for the recombination centre layer (20).

Abstract: In a flat panel display or other large-area electronics device, each cell of a matrix comprises a thin-film switching transistor (T1) connected between a respective column conductor (CC) and a respective cell electrode (C.sub.LC). Row conductors (RR) of the matrix comprise a conductive film pattern (14) on an insulating film pattern (13) on a semiconductor film pattern (12); portions (11a) of the semiconductor film pattern (11) provide channel regions of the switching transistors (T1), while portions (14a) of the conductive film pattern provide gate electrodes of the switching transistors (T1) connected to the respective row conductor (RR; 14b). Each cell also has a storage capacitor (C.sub.s) formed with the row conductor (RR(n-1); 14b) of a neighbouring cell by a lower conductive film part (11c) present under the insulating and semiconductor film patterns (13 and 12) of the row conductor (RR(n-1); 14b) of the neighbouring cell.