Patents by Inventor Steven C. H. Hung
Steven C. H. Hung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220254900Abstract: A metal gate stack on a substrate comprises: an interfacial layer on the substrate; a high-? metal oxide layer on the interfacial layer, the high-? metal oxide layer comprising a dipole region adjacent to the interfacial layer, the dipole region comprising niobium (Nb); a high-? metal oxide capping layer on the high-? metal oxide layer; a positive metal-oxide-semiconductor (PMOS) work function material above the high-? metal oxide capping layer; and a gate electrode above the PMOS work function material. The dipole region is formed by driving Nb species of a Nb-based film into the high-? metal oxide layer to form a dipole region.Type: ApplicationFiled: February 8, 2022Publication date: August 11, 2022Applicant: Applied Materials, Inc.Inventors: Yong Yang, Srinivas Gandikota, Steven C.H. Hung, Mandyam Sriram, Jacqueline S. Wrench, Yixiong Yang
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Publication number: 20220238680Abstract: A method of forming a gate stack structure includes forming a dipole metal layer on a high-? gate dielectric layer on a semiconductor structure formed on a substrate, annealing the dipole metal layer, and removing the dipole metal layer. The dipole metal layer comprises dopants in the high-? gate dielectric layer.Type: ApplicationFiled: November 17, 2021Publication date: July 28, 2022Inventors: Steven C. H. HUNG, Benjamin COLOMBEAU, Myungsun KIM, Srinivas GANDIKOTA, Yixiong YANG, Jacqueline Samantha WRENCH, Yong YANG
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Publication number: 20220165854Abstract: Methods of forming and processing semiconductor devices are described. Certain embodiments related to electronic devices which comprise a dipole region having an interlayer dielectric, a high-K dielectric material, and a dipole layer. The dipole layer comprises one or more of titanium aluminum nitride (TiAIN), titanium tantalum nitride (TiTaN), titanium oxide (TiO), tantalum oxide (TaO), and titanium aluminum carbide (TiAIC).Type: ApplicationFiled: February 10, 2022Publication date: May 26, 2022Applicant: Applied Materials, Inc.Inventors: Yongjing Lin, Karla M. Bernal Ramos, Shih Chung Chen, Yixiong Yang, Lin Dong, Steven C.H. Hung, Srinivas Gandikota
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Publication number: 20220157654Abstract: A method of forming an electronic device is disclosed. The method comprises forming depositing a metal on a substrate, the metal comprising one or more of copper (Cu), titanium (Ti), or tantalum (Ta). A metal cap is deposited on the metal. The metal cap comprises one or more of molybdenum (Mo), ruthenium (Ru), iridium (Ir), rhodium (Rh), palladium (Pd), silver (Ag), osmium (Os), platinum (Pt), or gold (Au). The substrate is then exposed to an anneal process, e.g., a hydrogen high-pressure anneal. The formation of the metal cap on the metal minimizes parasitic adsorption of hydrogen by the underlying metal.Type: ApplicationFiled: January 28, 2022Publication date: May 19, 2022Applicant: Applied Materials, Inc.Inventors: Srinivas Gandikota, Steven C.H. Hung, Srinivas D. Nemani, Yixiong Yang, Susmit Singha Roy, Nikolaos Bekiaris
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Publication number: 20220115516Abstract: Methods of forming and processing semiconductor devices are described. Certain embodiments related to electronic devices which comprise a dipole region having an interlayer dielectric, a high-? dielectric material, and a dipole layer. The dipole layer comprises one or more of titanium lanthanum nitride (TiLaN), titanium yttrium nitride (TiYN), titanium strontium nitride (TiSrN), titanium magnesium nitride (TiMgN, titanium aluminum nitride (TiAlN), titanium tantalum nitride (TiTaN), hafnium carbide (HfC), hafnium nitride (HfN), hafnium oxynitride (HfON), hafnium oxycarbide (HfOC), hafnium carbide aluminum (HfCAl), hafnium aluminum nitride (HfAlN), or hafnium carbonitride (HfCN).Type: ApplicationFiled: December 21, 2021Publication date: April 14, 2022Applicant: Applied Materials, Inc.Inventors: Yongjing Lin, Karla M. Bernal Ramos, Luping Li, Shih Chung Chen, Jacqueline S. Wrench, Yixiong Yang, Steven C.H. Hung, Srinivas Gandikota, Naomi Yoshida, Lin Dong
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Patent number: 11289579Abstract: Methods of forming and processing semiconductor devices are described. Certain embodiments related to electronic devices which comprise a dipole region having an interlayer dielectric, a high-? dielectric material, and a dipole layer. The dipole layer comprises one or more of titanium aluminum nitride (TiAlN), titanium tantalum nitride (TiTaN), titanium oxide (TiO), tantalum oxide (TaO), and titanium aluminum carbide (TiAlC).Type: GrantFiled: September 28, 2020Date of Patent: March 29, 2022Assignee: Applied Materials, Inc.Inventors: Yongjing Lin, Karla M Bernal Ramos, Shih Chung Chen, Yixiong Yang, Lin Dong, Steven C. H. Hung, Srinivas Gandikota
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Publication number: 20220077298Abstract: Metal gate stacks and integrated methods of forming metal gate stacks are disclosed. Some embodiments comprise NbN as a PMOS work function material at a thickness in a range of greater than or equal to 5 ? to less than or equal to 50 ?. The PMOS work function material comprising NbN has an effective work function of greater than or equal to 4.75 eV. Some embodiments comprise HfO2 as a high-? metal oxide layer. Some embodiments provide improved PMOS bandedge performance evidenced by improved flatband voltage. Some embodiments exclude transition metal niobium nitride materials as work function materials.Type: ApplicationFiled: September 4, 2020Publication date: March 10, 2022Applicant: Applied Material, Inc.Inventors: SRINIVAS GANDIKOTA, Steven C. H. Hung, Mandyam Sriram, Jacqueline S. Wrench, Yixiong Yang, Yong Yang
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Patent number: 11245022Abstract: Methods of forming and processing semiconductor devices are described. Certain embodiments related to electronic devices which comprise a dipole region having an interlayer dielectric, a high-? dielectric material, and a dipole layer. The dipole layer comprises one or more of titanium lanthanum nitride (TiLaN), titanium yttrium nitride (TiYN), titanium strontium nitride (TiSrN), titanium magnesium nitride (TiMgN, titanium aluminum nitride (TiAlN), titanium tantalum nitride (TiTaN), hafnium carbide (HfC), hafnium nitride (HfN), hafnium oxynitride (HfON), hafnium oxycarbide (HfOC), hafnium carbide aluminum (HfCAl), hafnium aluminum nitride (HfAlN), or hafnium carbonitride (HfCN).Type: GrantFiled: May 18, 2020Date of Patent: February 8, 2022Assignee: Applied Materials, Inc.Inventors: Yongjing Lin, Karla M. Bernal Ramos, Luping Li, Shih Chung Chen, Jacqueline S. Wrench, Yixiong Yang, Steven C. H. Hung, Srinivas Gandikota, Naomi Yoshida, Lin Dong
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Publication number: 20210398814Abstract: Processing methods may be performed to produce semiconductor structures. The methods may include forming a silicon layer over a semiconductor substrate. The forming may include forming a silicon layer incorporating a dopant. The methods may include oxidizing a portion of the silicon layer while maintaining a portion of the silicon layer in contact with the semiconductor substrate. The oxidizing may drive a portion of the dopant through the silicon layer and into the semiconductor substrate.Type: ApplicationFiled: June 15, 2021Publication date: December 23, 2021Applicant: Applied Materials, Inc.Inventors: Steven C. H. Hung, Benjamin Colombeau, Abhishek Dube, Sheng-Chin Kung, Patricia M. Liu, Malcolm J. Bevan, Johanes F. Swenberg
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Patent number: 11189479Abstract: A method of forming an electronic device is disclosed. The method comprises forming a barrier layer on a silicon layer, and depositing a silicon oxide layer on the barrier layer. The formation of the barrier layer on the silicon layer minimizes parasitic oxidation of the underlying silicon layer and minimizes defects in the silicon layer.Type: GrantFiled: May 4, 2020Date of Patent: November 30, 2021Assignee: Applied Materials, Inc.Inventors: Benjamin Colombeau, Johanes F. Swenberg, Steven C. H. Hung
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Patent number: 11171047Abstract: Methods of forming semiconductor device with fluorine-incorporated metal nitride films are described. A substrate surface is exposed to a metal fluoride precursor to form a metal-fluorine species on the substrate surface. The substrate surface is exposed to a nitriding agent to react with the metal-fluorine species to form a fluorine-incorporated metal nitride film.Type: GrantFiled: June 28, 2020Date of Patent: November 9, 2021Assignee: APPLIED MATERIALS, INC.Inventors: Yixiong Yang, Srinivas Gandikota, Steven C. H. Hung, Jacqueline S. Wrench, Yongjing Lin, Susmit Singha Roy, Wei V. Tang, Shih Chung Chen
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Publication number: 20210193468Abstract: A method of forming a semiconductor structure includes annealing a surface of a substrate in an ambient of hydrogen to smooth the surface, pre-cleaning the surface of the substrate, depositing a high-? dielectric layer on the pre-cleaned surface of the substrate, performing a re-oxidation process to thermally oxidize the surface of the substrate; performing a plasma nitridation process to insert nitrogen atoms in the deposited high-? dielectric layer, and performing a post-nitridation anneal process to passivate chemical bonds in the plasma nitridated high-? dielectric layer.Type: ApplicationFiled: March 4, 2021Publication date: June 24, 2021Applicant: Applied Materials, Inc.Inventors: Steven C.H. Hung, Lin Dong, Benjamin Colombeau, Johanes F. Swenberg, Linlin Wang
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Publication number: 20210134972Abstract: Metal gate stacks and integrated methods of forming metal gate stacks are disclosed. Some embodiment comprise MoN as a PMOS work function material. Some embodiments comprise TiSiN as a high-? capping layer. Some embodiments provide improved PMOS bandedge performance. Some embodiments provide improved PMOS bandedge performance with reduced EOT penalty.Type: ApplicationFiled: November 4, 2020Publication date: May 6, 2021Inventors: Yixiong Yang, Jacqueline S. Wrench, Srinivas Gandikota, Yongjing Lin, Steven C.H. Hung, Shih Chung Chen, Haoyan Sha, Chi-Chou Lin
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Publication number: 20210111020Abstract: A method of forming a high-K dielectric cap layer on a semiconductor structure formed on a substrate includes depositing the high-K dielectric cap layer on the semiconductor structure, depositing a sacrificial silicon cap layer on the high-K dielectric cap layer, performing a post cap anneal process to harden and densify the as-deposited high-K dielectric cap layer, and removing the sacrificial silicon cap layer.Type: ApplicationFiled: November 18, 2020Publication date: April 15, 2021Inventors: Srinivas GANDIKOTA, Yixiong YANG, Jacqueline Samantha WRENCH, Yong YANG, Steven C. H. HUNG
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Publication number: 20210104617Abstract: Described is a method of manufacturing a gate-all-around electronic device. The method includes forming a thermal oxide layer though an enhanced in situ steam generation process in combination with atomic layer deposition of a low-? layer. The thin thermal oxide layer passivates the interface between the silicon layer and the dielectric layer of the GAA. A passivation process after the deposition of the low-? layer reduces the bulk trap and enhances the breakdown performance of the GAA transistor.Type: ApplicationFiled: September 30, 2020Publication date: April 8, 2021Applicant: Applied Materials, Inc.Inventors: Steven C.H. Hung, Benjamin Colombeau, Andy Lo, Byeong Chan Lee, Johanes F. Swenberg, Theresa Kramer Guarini, Malcolm J. Bevan
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Publication number: 20210098581Abstract: Methods of forming and processing semiconductor devices are described. Certain embodiments related to electronic devices which comprise a dipole region having an interlayer dielectric, a high-K dielectric material, and a dipole layer. The dipole layer comprises one or more of titanium aluminum nitride (TiAlN), titanium tantalum nitride (TiTaN), titanium oxide (TiO), tantalum oxide (TaO), and titanium aluminum carbide (TiAlC).Type: ApplicationFiled: September 28, 2020Publication date: April 1, 2021Applicant: Applied Materials, Inc.Inventors: Yongjing Lin, Karla M. Bernal Ramos, Shih Chung Chen, Yixiong Yang, Lin Dong, Steven C.H. Hung, Srinivas Gandikota
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Publication number: 20210057215Abstract: A method of forming a semiconductor structure includes pre-cleaning a surface of a substrate, forming an interfacial layer on the pre-cleaned surface of the substrate, depositing a high-? dielectric layer on the interfacial layer, performing a plasma nitridation process to insert nitrogen atoms in the deposited high-? dielectric layer, and performing a post-nitridation anneal process to passivate chemical bonds in the plasma nitridated high-? dielectric layer.Type: ApplicationFiled: November 6, 2020Publication date: February 25, 2021Inventor: Steven C. H. HUNG
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Publication number: 20200411373Abstract: Methods of forming semiconductor device with fluorine-incorporated metal nitride films are described. A substrate surface is exposed to a metal fluoride precursor to form a metal-fluorine species on the substrate surface. The substrate surface is exposed to a nitriding agent to react with the metal-fluorine species to form a fluorine-incorporated metal nitride film.Type: ApplicationFiled: June 28, 2020Publication date: December 31, 2020Applicant: Applied Materials, Inc.Inventors: Yixiong Yang, Srinivas Gandikota, Steven C.H. Hung, Jacqueline S. Wrench, Yongjing Lin, Susmit Singha Roy, Wei V. Tang, Shih Chung Chen
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Publication number: 20200373404Abstract: Methods of forming and processing semiconductor devices are described. Certain embodiments related to electronic devices which comprise a dipole region having an interlayer dielectric, a high-? dielectric material, and a dipole layer. The dipole layer comprises one or more of titanium lanthanum nitride (TiLaN), titanium yttrium nitride (TiYN), titanium strontium nitride (TiSrN), titanium magnesium nitriride (TiMgN, titanium aluminum nitride (TiAlN), titanium tantalum nitride (TiTaN), hafnium carbide (HfC), hafnium nitride (HfN), hafnium oxynitride (HfON), hafnium oxycarbide (HfOC), hafnium carbide aluminum (HfCAl), hafnium aluminum nitride (HfAlN), or hafnium carbonitride (HfCN).Type: ApplicationFiled: May 18, 2020Publication date: November 26, 2020Applicant: Applied Materials, Inc.Inventors: Yongjing Lin, Karla M. Bernal Ramos, Luping Li, Shih Chung Chen, Jacqueline S. Wrench, Yixiong Yang, Steven C.H. Hung, Srinivas Gandikota, Naomi Yoshida, Lin Dong
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Publication number: 20200373200Abstract: A method of forming an electronic device is disclosed. The method comprises forming depositing a metal on a substrate, the metal comprising one or more of copper (Cu), titanium (Ti), or tantalum (Ta). A metal cap is deposited on the metal, the metal cap comprising one or more of molybdenum (Mo), ruthenium (Ru), iridium (Ir), rhodium (Rh), palladium (Pd), silver (Ag), osmium (Os), platinum (Pt), or gold (Au). The substrate is then exposed to a hydrogen high-pressure anneal. The formation of the metal cap on the metal minimizes parasitic adsorption of hydrogen by the underlying metal.Type: ApplicationFiled: May 18, 2020Publication date: November 26, 2020Applicant: Applied Materials, Inc.Inventors: Srinivas Gandikota, Steven C.H. Hung, Srinivas D. Nemani, Yixiong Yang, Susmit Singha Roy, Nikolaos Bekiaris