Abstract: The invention provides methods and apparatuses of forming a silicon nitride layer on a semiconductor wafer. A semiconductor wafer is located on a susceptor within a semiconductor processing chamber. A carrier gas, a nitrogen source gas, and a silicon source gas are introduced into the semiconductor processing chamber and a semiconductor wafer is exposed to the mixture of gases at a pressure in the chamber in the range of approximately 100 to 500 Torr.

Abstract: A method for depositing doped polycrystalline or amorphous silicon film. The method includes placing a substrate onto a susceptor. The susceptor includes a body having a resistive heater therein and a thermocouple in physical contact with the resistive heater. The susceptor is located in the process chamber such that the process chamber has a top portion above the susceptor and a bottom portion below the susceptor. The method further includes heating the susceptor. The method further includes providing a process gas mix into the process chamber through a shower head located on the susceptor. The process gas mix includes a silicon source gas, a dopant gas, and a carrier gas. The carrier gas includes nitrogen. The method further includes forming the doped silicon film from the silicon source gas.

Abstract: A blank optical disk container for holding a plurality of blank optical disks allows the blank optical disks be retrieved individually and easily from the container. The container has a case lid movably mounted upon it. The case lid has claws located on the bottom side thereof to clip and grip the center opening of a blank optical disk. The case lid may be closed and depressed downwards to grip one blank optical disk with its claws, then the case lid may be opened to allow the blank optical disk to be removed from the case lid.

Abstract: A terrestrial C/A code GPS receiver system digitally samples, filters and stores a segment of 11 half chips of the received composite as a binary number and multiplexes this number for parallel correlation with each of a series of multibit code replicas for the satellites to be tracked. Each of the time delay specific correlation products are accumulated in a cell of a memory matrix so that at least twenty two delays for each satellite may be evaluated each code period providing fast reacquisition, even within a city intersection, as well as correction of multipath tracking and multipath interference. All cells of the memory matrix may be used for a acquisition of a single satellite in about 4 ms. Two satellite tracking, in addition to altitude hold, uses cross track hold alternating with clock hold to update the cross track estimate. Single satellite tracking uses cross track and clock hold together. Navigation data is updated with detected changes in motion including turns.

Abstract: A semiconductor wafer (70) that includes a support body (72), at least one thin die (20, 60), and a plurality of tethers (78, 178). The support body (72) is made of a semiconductor material. The thin die (20, 60) has a circuit (21) formed thereon and has an outer perimeter (74) defined by an open trench (76). The open trench (76) separates the thin die (20, 60) from the support body (72). The tethers (78, 178) extend across the open trench (76) and between the support body (72) and the thin die (20, 60). A method of making a thin die (20, 60) on a wafer (70) where the wafer (70) has a support body (72), a topside (82) and a backside (90). A circuit (21) is formed on the topside (82) of the wafer (70).

Abstract: A semiconductor wafer (70) that includes a support body (72), at least one thin die (20, 60), and a plurality of tethers (78, 178). The support body (72) is made of a semiconductor material. The thin die (20, 60) has a circuit (21) formed thereon and has an outer perimeter (74) defined by an open trench (76). The open trench (76) separates the thin die (20, 60) from the support body (72). The tethers (78, 178) extend across the open trench (76) and between the support body (72) and the thin die (20, 60). A method of making a thin die (20, 60) on a wafer (70) where the wafer (70) has a support body (72), a topside (82) and a backside (90). A circuit (21) is formed on the topside (82) of the wafer (70).

Abstract: A semiconductor wafer (70) that includes a support body (72), at least one thin die (20, 60), and a plurality of tethers (78, 178). The support body (72) is made of a semiconductor material. The thin die (20, 60) has a circuit (21) formed thereon and has an outer perimeter (74) defined by an open trench (76). The open trench (76) separates the thin die (20, 60) from the support body (72). The tethers (78, 178) extend across the open trench (76) and between the support body (72) and the thin die (20, 60). A method of making a thin die (20, 60) on a wafer (70) where the wafer (70) has a support body (72), a topside (82) and a backside (90). A circuit (21) is formed on the topside (82) of the wafer (70).

Abstract: A method of separating a thin die (20, 60) from a support body (72) of a semiconductor wafer (70). The thin die (20, 60) being initially attached to the support body (72) by an attachment mechanism (78, 178). The attachment mechanism may be a plurality of tethers (78, 178) that extend between the thin die (20, 60) and the support body (72).

Abstract: A spread spectrum receiver processes signals from a plurality of sources modulated by different spread spectrum codes by sampling the signals as received to produce an integer series of sampling segments at a sampling rate at least twice a chip rate of the codes, each sampling segment containing an integer number of bits representing a fraction of a chip of the codes, time division multiplexing each sample segment into a number of channels, correlating the bits in each sample segment in each channel in parallel with a source specific series of locally generated sequential code samples differing by one bit, summing each parallel correlation, and accumulating the summed parallel correlations for each code sample in each channel at a rate at least equal to the chip rate to derive data related to each of the sources.

Abstract: The present invention is a method of annealing an oxide film. According to the present invention, an oxide film is deposited over a substrate. The oxide film is then annealed by exposing the oxide film to an ambient containing atomic oxygen for a predetermined period of time. In an embodiment of the present invention, the ambient containing atomic oxygen (O) is formed in the chamber by reacting a hydrogen containing gas and an oxygen containing gas together. In another embodiment of the present invention, the ambient containing atomic oxygen (O) is formed by decomposing N2O.

Abstract: A method and apparatus for directing a process gas through a processing apparatus, such as a vapor deposition chamber. The apparatus comprises a pumping plate for a processing chamber having an annular body member wherein said body member has a first portion and a second defining a circumferential edge and a central opening. The first portion comprises a sidewall of the circumferential edge having a plurality of circumferentially spaced through holes and the second portion has comprises a lateral portion that protrudes from the circumferential edge, such that, in a processing chamber, the first portion defines a first gas flow region comprising the central opening and a second gas flow region comprising the lateral portion of the second portion.

Abstract: A method for generating technology data files for use by at least one chip and circuit analysis tools begins by accepting a user analysis request for a specific chip and circuit analyses. The design automation tool required for the requested analysis is then selected. A standard, generic technology data file(TDF) is converted to a custom TDF specified for a given design analysis tool from a set of TDF formatting rules for the given design analysis tool. The chip coordinate references, process parameters and line segment layout data to be tested are extracted from a physical design data layout file. The line segment layout data of a standard wafer test site for the foundry/process selected is extracted from a circuit simulation model of the desired foundry/process. The design automation tool is executed using the foundry/process and line segment layout data as requested in the user analysis request.

Abstract: Provided herein is an emissivity-change-free pumping plate kit used in a single wafer chamber. This kit comprises a top open pumping plate, and optionally a skirt and/or a second stage choking plate. The skirt may be installed around the wafer heater, underneath the wafer heater, or along the chamber body inside the chamber. The choking plate is installed downstream of the top open pumping plate along the purge gas flow. Also provided is a method of preventing emissivity change and further providing optimal film thickness uniformity during wafer processing by utilizing such kit in the chamber.

Abstract: The invention provides a method of making a transistor. A gate dielectric layer is formed on a semiconductor substrate. A gate is formed on the dielectric layer, the gate having an exposed upper surface and exposed side surfaces. A first silicon nitride layer having a first thickness is deposited over the gate, for example over an oxide layer on the gate, at a first deposition rate. A second silicon nitride layer having a second thickness is deposited over the first silicon nitride layer at a second deposition rate, the second thickness being more that the first thickness and the second deposition rate being more than the first deposition rate. The first silicon nitrogen layer then has a lower hydrogen concentration. At least the second silicon nitride layer (or a silicon oxide layer in the case of an ONO spacer) is etched to leave spacers next to the side surfaces while exposing the upper surface of the gate and areas of the substrate outside the spacers.

Abstract: A method for depositing doped polycrystalline or amorphous silicon film. The method includes placing a substrate onto a susceptor. The susceptor includes a body having a resistive heater therein and a thermocouple in physical contact with the resistive heater. The susceptor is located in the process chamber such that the process chamber has a top portion above the susceptor and a bottom portion below the susceptor. The method further includes heating the susceptor. The method further includes providing a process gas mix into the process chamber through a shower head located on the susceptor. The process gas mix includes a silicon source gas, a dopant gas, and a carrier gas. The carrier gas includes nitrogen. The method further includes forming the doped silicon film from the silicon source gas.

Abstract: A silicon nitride layer is formed over transistor gates while the processing temperature is relatively high, typically at least 500° C., and the pressure is relatively high, typically at least 50 Torr, to obtain a relatively high rate of formation of the silicon nitride layer. Processing conditions are controlled so as to more uniformly form the silicon nitride layer. Generally, the ratio of the NH3 gas to the silicon-containing gas by volume is selected sufficiently high so that, should the surface have a low region between transistor gates which is less than 0.15 microns wide and have a height-to-width ratio of at least 1.0, as well as an entirely flat area of at least 5 microns by 5 microns, the layer forms at a rate of not more than 25% faster on the flat area than on a base of the low region.

Abstract: A bi-layer silicon electrode and its method of fabrication is described. The electrode of the present invention comprises a lower polysilicon film having a random grain microstructure, and an upper polysilicon film having a columnar grain microstructure.

Abstract: Methods and apparatuses of forming a film on a substrate including introducing a pretreatment material into a processing chamber sufficient to form a film as a portion of an inner surface of the processing chamber to inhibit outgassing from that portion of the chamber, introducing a substrate into the chamber, and forming a film on the substrate.

Abstract: A modular multinode computing apparatus includes a rack mountable enclosure and more than one system board that is secured within the enclosure in a high density configuration that is preferably configured so that the system boards are positioned in substantially the same plane, which is also the plane in which the apparatus resides when mounted within a rack. The enclosure preferably has four system boards, and is sized as a 1 u form factor. When mounted in a rack with like units, the apparatus permits a data center or computing cluster to be fabricated that has a processing density that is much greater than conventional clusters that are configured with 1 u based single node units.

Abstract: A spread spectrum receiver processes signals from a plurality of sources modulated by different spread spectrum codes by sampling the signals as received to produce an integer series of sampling segments at a sampling rate at least twice a chip rate of the codes, each sampling segment containing an integer number of bits representing a fraction of a chip of the codes, time division multiplexing each sample segment into a number of channels, correlating the bits in each sample segment in each channel in parallel with a source specific series of locally generated sequential code samples differing by one bit, summing each parallel correlation, and accumulating the summed parallel correlations for each code sample in each channel at at least the chip rate to derive data related to each of the sources.