Abstract: In an aspect, an update unit can evaluate condition(s) in an update request and update one or more memory locations based on the condition evaluation. The update unit can operate atomically to determine whether to effect the update and to make the update. Updates can include one or more of incrementing and swapping values. An update request may specify one of a pre-determined set of update types. Some update types may be conditional and others unconditional. The update unit can be coupled to receive update requests from a plurality of computation units. The computation units may not have privileges to directly generate write requests to be effected on at least some of the locations in memory. The computation units can be fixed function circuitry operating on inputs received from programmable computation elements. The update unit may include a buffer to hold received update requests.

Abstract: Ray tracing systems and computer-implemented methods are described for performing intersection testing on a bundle of rays with respect to a box. Silhouette edges of the box are identified from the perspective of the bundle of rays. For each of the identified silhouette edges, components of a vector providing a bound to the bundle of rays are obtained and it is determined whether the vector passes inside or outside of the silhouette edge. Results of determining, for each of the identified silhouette edges, whether the vector passes inside or outside of the silhouette edge, are used to determine an intersection testing result for the bundle of rays with respect to the box.

Abstract: Ray tracing systems have computation units (“RACs”) adapted to perform ray tracing operations (e.g. intersection testing). There are multiple RACs. A centralized packet unit controls the allocation and testing of rays by the RACs. This allows RACs to be implemented without Content Addressable Memories (CAMs) which are expensive to implement, but the functionality of CAMs can still be achieved by implemented them in the centralized controller.

Abstract: Hierarchical acceleration structures with implicitly represented nodes are used for intersection testing in a ray tracing system. Nodes of the hierarchical acceleration structure each represents a region in a scene and are linked to form the hierarchical acceleration structure. Data is stored representing the hierarchical acceleration structure including data defining the regions represented by a plurality of the nodes of the hierarchical acceleration structure. At least one node of the hierarchical acceleration structure is an implicitly represented node, wherein data represented by an implicitly represented node is not explicitly included as part of the stored data but can be inferred from the stored data. Intersection testing in the ray tracing system is performed in which, based on conditions in the ray tracing system, a determination is made as to whether testing of one or more rays for intersection with a region represented by a particular node of a sub-tree is to be skipped.

Abstract: A ray tracing unit implemented in a graphics rendering system includes processing logic configured to perform ray tracing operations on rays, a dedicated ray memory coupled to the processing logic and configured to store ray data for rays to be processed by the processing logic, an interface to a memory system, and control logic configured to manage allocation of ray data to either the dedicated ray memory or the memory system. Core ray data for rays to be processed by the processing logic is stored in the dedicated ray memory, and at least some non-core ray data for the rays is stored in the memory system. This allows core ray data for many rays to be stored in the dedicated ray memory without the size of the dedicated ray memory becoming too wasteful when the ray tracing unit is not in use.

Abstract: Ray tracing systems and computer-implemented methods are described for performing intersection testing on a bundle of rays with respect to a box. Silhouette edges of the box are identified from the perspective of the bundle of rays. For each of the identified silhouette edges, components of a vector providing a bound to the bundle of rays are obtained and it is determined whether the vector passes inside or outside of the silhouette edge. Results of determining, for each of the identified silhouette edges, whether the vector passes inside or outside of the silhouette edge, are used to determine an intersection testing result for the bundle of rays with respect to the box.

Abstract: A hierarchy is a multi-level linked structure of nodes, wherein the hierarchy represents data relating to a set of one or more items to be processed. Where there are multiple input hierarchies, it may improve the efficiency of the processing of the items to merge the input hierarchies to form a merged hierarchy. The hierarchies are merged by identifying two or more sub-hierarchies within the input hierarchies which are to be merged, and determining one or more nodes of the merged hierarchy which reference nodes of the identified sub-hierarchies. The determined nodes of the merged hierarchy are stored and indications of the references between the determined nodes of the merged hierarchy and the referenced nodes of the identified sub-hierarchies are also stored. In this way, the merged hierarchy is formed for use in processing the items.

Abstract: Hierarchical acceleration structures to be used for intersection testing in a ray tracing system are generated. Nodes of the hierarchical acceleration structure represent regions in a scene, and are linked to form the hierarchical acceleration structure. Data is stored representing the hierarchical acceleration structure defining the regions represented by a plurality of the nodes of the hierarchical acceleration structure. At least one node of the hierarchical acceleration structure is an implicitly represented node, wherein data defining a region represented by an implicitly represented node is not explicitly included as part of the stored data but can be inferred from said stored data. Ray tracing systems and computer-implemented methods perform intersection testing in the ray tracing system in which, based on conditions in the ray tracing system, a determination is made as to whether testing of one or more rays for intersection with a region represented by a particular node of a sub-tree is to be skipped.

Abstract: A ray tracing unit is implemented in a graphics rendering system. The ray tracing unit comprises: processing logic configured to perform ray tracing operations on rays, a dedicated ray memory coupled to the processing logic and configured to store ray data for rays to be processed by the processing logic, an interface to a memory system, and control logic configured to manage allocation of ray data to either the dedicated ray memory or the memory system. Core ray data for rays to be processed by the processing logic is stored in the dedicated ray memory, and at least some non-core ray data for the rays is stored in the memory system. This allows core ray data for many rays to be stored in the dedicated ray memory without the size of the dedicated ray memory becoming too wasteful when the ray tracing unit is not in use.

Abstract: Ray tracing systems and computer-implemented methods perform intersection testing on a bundle of rays with respect to a box. Silhouette edges of the box are identified from the perspective of the bundle of rays. For each of the identified silhouette edges, components of a vector providing a bound to the bundle of rays are obtained and it is determined whether the vector passes inside or outside of the silhouette edge. Results of determining, for each of the identified silhouette edges, whether the vector passes inside or outside of the silhouette edge, are used to determine an intersection testing result for the bundle of rays with respect to the box.

Abstract: Ray tracing systems and computer-implemented methods perform intersection testing on a bundle of rays with respect to a box. A bundle of rays to be tested for intersection with a box is received, and a first bundle intersection test is performed to determine whether or not all of the rays of the bundle intersect the box, wherein if the first bundle intersection test determines that all of the rays of the bundle intersect the box, an intersection testing result for the bundle with respect to the box is that all of the rays of the bundle intersect the box. If the first bundle intersection test does not determine that all of the rays of the bundle intersect the box, a second bundle intersection test is performed, which determines whether or not all of the rays of the bundle miss the box, the result of which is used to determine the intersection testing result for the bundle with respect to the box.

Abstract: Aspects comprise systems implementing 3-D graphics processing functionality in a multiprocessing system. Control flow structures are used in scheduling instances of computation in the multiporcessing system, where different points in the control flow structure serve as points where deferral of some instances of computation can be performed in favor of scheduling other instances of computation. In some examples, the control flow structure identifies particular tasks, such as intersection testing of a particular portion of an acceleration structure, and a particular element of shading code. In some examples, the aspects are used in 3-D graphics processing systems that can perform ray tracing based rendering.

Abstract: Ray tracing systems have computation units (“RACs”) adapted to perform ray tracing operations (e.g. intersection testing). There are multiple RACs. A centralized packet unit controls the allocation and testing of rays by the RACs. This allows RACs to be implemented without Content Addressable Memories (CAMs) which are expensive to implement, but the functionality of CAMs can still be achieved by implemented them in the centralized controller.

Abstract: In an aspect, an update unit can evaluate condition(s) in an update request and update one or more memory locations based on the condition evaluation. The update unit can operate atomically to determine whether to effect the update and to make the update. Updates can include one or more of incrementing and swapping values. An update request may specify one of a pre-determined set of update types. Some update types may be conditional and others unconditional. The update unit can be coupled to receive update requests from a plurality of computation units. The computation units may not have privileges to directly generate write requests to be effected on at least some of the locations in memory. The computation units can be fixed function circuitry operating on inputs received from programmable computation elements. The update unit may include a buffer to hold received update requests.

Abstract: Hierarchical acceleration structures to be used for intersection testing in a ray tracing system are generated. Nodes of the hierarchical acceleration structure represent regions in a scene, and are linked to form the hierarchical acceleration structure. Data is stored representing the hierarchical acceleration structure defining the regions represented by a plurality of the nodes of the hierarchical acceleration structure. At least one node of the hierarchical acceleration structure is an implicitly represented node, wherein data defining a region represented by an implicitly represented node is not explicitly included as part of the stored data but can be inferred from said stored data. Ray tracing systems and computer-implemented methods perform intersection testing in the ray tracing system in which, based on conditions in the ray tracing system, a determination is made as to whether testing of one or more rays for intersection with a region represented by a particular node of a sub-tree is to be skipped.

Abstract: Ray tracing systems and computer-implemented methods perform intersection testing on a bundle of rays with respect to a box. Silhouette edges of the box are identified from the perspective of the bundle of rays. For each of the identified silhouette edges, components of a vector providing a bound to the bundle of rays are obtained and it is determined whether the vector passes inside or outside of the silhouette edge. Results of determining, for each of the identified silhouette edges, whether the vector passes inside or outside of the silhouette edge, are used to determine an intersection testing result for the bundle of rays with respect to the box.

Abstract: Hierarchical acceleration structures with implicitly represented nodes are used for intersection testing in a ray tracing system. Nodes of the hierarchical acceleration structure each represents a region in a scene and are linked to form the hierarchical acceleration structure. Data is stored representing the hierarchical acceleration structure including data defining the regions represented by a plurality of the nodes of the hierarchical acceleration structure. At least one node of the hierarchical acceleration structure is an implicitly represented node, wherein data represented by an implicitly represented node is not explicitly included as part of the stored data but can be inferred from the stored data. Intersection testing in the ray tracing system is performed in which, based on conditions in the ray tracing system, a determination is made as to whether testing of one or more rays for intersection with a region represented by a particular node of a sub-tree is to be skipped.

Abstract: A hierarchical acceleration structure is generated for intersection testing in a ray tracing system. Nodes of the hierarchical acceleration structure are determined, wherein each of the nodes represents a region in a scene, and wherein the nodes are linked to form the hierarchical acceleration structure. Data is stored representing the hierarchical acceleration structure. The stored data defines the regions represented by a plurality of the nodes of the hierarchical acceleration structure. At least one node is an implicitly represented node, wherein data defining a region represented by an implicitly represented node is not explicitly included as part of the stored data but can be inferred from the stored data.

Abstract: Ray tracing systems and computer-implemented methods perform intersection testing on a bundle of rays with respect to a box. A bundle of rays to be tested for intersection with a box is received, and a first bundle intersection test is performed to determine whether or not all of the rays of the bundle intersect the box, wherein if the first bundle intersection test determines that all of the rays of the bundle intersect the box, an intersection testing result for the bundle with respect to the box is that all of the rays of the bundle intersect the box. If the first bundle intersection test does not determine that all of the rays of the bundle intersect the box, a second bundle intersection test is performed, which determines whether or not all of the rays of the bundle miss the box, the result of which is used to determine the intersection testing result for the bundle with respect to the box.

Abstract: Aspects comprise systems implementing 3-D graphics processing functionality in a multiprocessing system. Control flow structures are used in scheduling instances of computation in the multiporcessing system, where different points in the control flow structure serve as points where deferral of some instances of computation can be performed in favor of scheduling other instances of computation. In some examples, the control flow structure identifies particular tasks, such as intersection testing of a particular portion of an acceleration structure, and a particular element of shading code. In some examples, the aspects are used in 3-D graphics processing systems that can perform ray tracing based rendering.