Abstract: A continuous glucose monitoring system may utilize electrode current (Isig) signals, Electrochemical Impedance Spectroscopy (EIS), and Vcntr values to optimize sensor glucose (SG) calculation in such a way as to enable reduction of the need for blood glucose (BG) calibration requests from users.

Abstract: Methods, systems, and devices for continuous glucose monitoring. More particularly, the methods, systems, and devices describe a working electrode with a GOx sensor and a background electrode in which the background electrode has no GOx sensor. The system may then compare the first signal and the second signal to detect ingestion of a medication by the user. The system may generate a sensor glucose value based on the comparison.

Abstract: A continuous glucose monitoring system may utilize electrode current (Isig) signals, Electrochemical Impedance Spectroscopy (EIS), and Vcntr values to optimize sensor glucose (SG) calculation in such a way as to enable reduction of the need for blood glucose (BG) calibration requests from users.

Abstract: Provided herein are low resistance metallization stack structures for logic and memory applications and related methods of fabrication. In some implementations, the methods involve providing a tungsten (W)-containing layer on a substrate; and depositing a molybdenum (Mo)-containing layer on the W-containing layer. In some implementations, the methods involve depositing a Mo-containing layer directly on a dielectric or titanium nitride (TiN) substrate without an intervening W-containing layer.

Abstract: Methods, systems, and devices for continuous glucose monitoring. More particularly, the methods, systems, and devices describe a working electrode with a GOx sensor and a background electrode in which the background electrode has no GOx sensor. The system may then compare the first signal and the second signal to detect ingestion of a medication by the user. The system may generate a sensor glucose value based on the comparison.

Abstract: Provided are deposition processes including deposition of a thin, protective Mo layer using a molybdenum chloride (MoClx) precursor. This may be followed by Mo deposition to fill the feature using a molybdenum oxyhalide (MoOyXz) precursor. The protective Mo layer enables Mo fill using an MoOyXz precursor without oxidation of the underlying surfaces. Also provided are in-situ clean processes in which a MoClx precursor is used to remove oxidation from underlying surfaces prior to deposition. Subsequent deposition using the MoClx precursor may deposit an initial layer and/or fill a feature.

Abstract: Methods of filling features including metal and dielectric surfaces with conductive materials involve cleaning the metal surfaces with little or no damage to the dielectric surfaces. After cleaning, the feature may be exposed to one or more reactants to fill the feature with the conductive material in an atomic layer deposition (ALD) or chemical vapor deposition (CVD) process. Deposition may be selective or non-selective to the metal surface. In some embodiments, the filled feature is barrier-less, such that the conductive material directly contacts the metal and dielectric surfaces with no interposing barrier or adhesion layer.

Abstract: Provided are methods of filling patterned features with molybdenum (Mo). The methods involve selective deposition of Mo films on bottom metal-containing surfaces of a feature including dielectric sidewalls. The selective growth of Mo on the bottom surface allows bottom-up growth and high quality, void-free fill. Also provided are related apparatus.

Abstract: Substantially carbon-free molybdenum-containing and tungsten-containing films are deposited on semiconductor substrates using halide-free metalorganic precursors. The precursors do not include metal-carbon bonds, carbonyl ligands, and, preferably do not include beta-hydrogen atoms. Metal-containing films, such as molybdenum nitride, molybdenum oxynitride, molybdenum silicide, and molybdenum boride with carbon content of less than about 5% atomic, such as less than about 3% atomic are deposited. The films are deposited in some embodiments by reacting the metal-containing precursor with a reactant on a surface of a substrate in an absence of plasma, e.g. using several ALD cycles. In some embodiments the formed film is then treated with a second reactant in a plasma to modify its properties (e.g., to densify the film, to reduce resistivity of the film, or to increase its work function). The films can be used as liners, diffusion barriers, and as electrode material in pMOS devices.

Abstract: Provided herein are low resistance metallization stack structures for logic and memory applications and related methods of fabrication. In some implementations, the methods involve providing a tungsten (W)-containing layer on a substrate; and depositing a molybdenum (Mo)-containing layer on the W-containing layer. In some implementations, the methods involve depositing a Mo-containing layer directly on a dielectric or titanium nitride (TiN) substrate without an intervening W-containing layer.

Abstract: Methods of depositing tungsten into high aspect ratio features using a dep-etch-dep process integrating various deposition techniques with alternating pulses of surface modification and removal during etch are provided herein.

Abstract: Methods, systems, and devices for continuous glucose monitoring. More particularly, the methods, systems, and devices describe a working electrode with a GOx sensor and a background electrode in which the background electrode has no GOx sensor. The system may then compare the first signal and the second signal to detect ingestion of a medication by the user. The system may generate a sensor glucose value based on the comparison.

Abstract: Methods of depositing tungsten into high aspect ratio features using a dep-etch-dep process integrating various deposition techniques with alternating pulses of surface modification and removal during etch are provided herein.

Abstract: Methods of depositing tungsten into high aspect ratio features using a dep-etch-dep process integrating various deposition techniques with alternating pulses of surface modification and removal during etch are provided herein.

Abstract: Provided herein are low resistance metallization stack structures for logic and memory applications and related methods of fabrication. In some implementations, the methods involve providing a tungsten (W)-containing layer on a substrate; and depositing a molybdenum (Mo)-containing layer on the W-containing layer. In some implementations, the methods involve depositing a Mo-containing layer directly on a dielectric or titanium nitride (TiN) substrate without an intervening W-containing layer.

Abstract: Provided herein are low resistance metallization stack structures for logic and memory applications and related methods of fabrication. In some implementations, the methods involve providing a tungsten (W)-containing layer on a substrate; and depositing a molybdenum (Mo)-containing layer on the W-containing layer. In some implementations, the methods involve depositing a Mo-containing layer directly on a dielectric or titanium nitride (TiN) substrate without an intervening W-containing layer.

Abstract: Methods of depositing tungsten into high aspect ratio features using a dep-etch-dep process integrating various deposition techniques with alternating pulses of surface modification and removal during etch are provided herein.

Abstract: A continuous glucose monitoring system may utilize electrode current (Isig) signals, Electrochemical Impedance Spectroscopy (EIS), and Vcntr values to optimize sensor glucose (SG) calculation in such a way as to enable reduction of the need for blood glucose (BG) calibration requests from users.

Abstract: In some embodiments, deposition processes for ruthenium (Ru) feature fill include deposition of a thin, protective Ru film under reducing conditions, followed by a Ru fill step under oxidizing conditions. The presence of protective Ru films formed under oxygen-free conditions or with an oxygen-removing operation can enable Ru fill without oxidation of an underlying adhesion layer or metal feature.

Abstract: Provided herein are low resistance metallization stack structures for logic and memory applications and related methods of fabrication. In some implementations, the methods involve providing a tungsten (W)-containing layer on a substrate; and depositing a molybdenum (Mo)-containing layer on the W-containing layer. In some implementations, the methods involve depositing a Mo-containing layer directly on a dielectric or titanium nitride (TiN) substrate without an intervening W-containing layer.