Abstract: In some embodiments, deposition processes for ruthenium (Ru) feature fill include deposition of a thin, protective Ru film under reducing conditions, followed by a Ru fill step under oxidizing conditions. The presence of protective Ru films formed under oxygen-free conditions or with an oxygen-removing operation can enable Ru fill without oxidation of an underlying adhesion layer or metal feature.

Abstract: Provided herein are low resistance metallization stack structures for logic and memory applications and related methods of fabrication. In some implementations, the methods involve providing a tungsten (W)-containing layer on a substrate; and depositing a molybdenum (Mo)-containing layer on the W-containing layer. In some implementations, the methods involve depositing a Mo-containing layer directly on a dielectric or titanium nitride (TiN) substrate without an intervening W-containing layer.

Abstract: Provided herein are low resistance metallization stack structures for logic and memory applications and related methods of fabrication. In some implementations, the methods involve providing a tungsten (W)-containing layer on a substrate; and depositing a molybdenum (Mo)-containing layer on the W-containing layer. In some implementations, the methods involve depositing a Mo-containing layer directly on a dielectric or titanium nitride (TiN) substrate without an intervening W-containing layer.

Abstract: Provided herein are methods of forming conductive cobalt (Co) interconnects and Co features. The methods involve deposition of a thin manganese (Mn)-containing film on a dielectric followed by subsequent deposition of cobalt on the Mn-containing film. The Mn-containing film may be deposited on a silicon-containing dielectric, such as silicon dioxide, and annealed to form a manganese silicate.

Abstract: Provided are methods of forming diffusion barriers and adhesion layers for interconnects such as cobalt (Co) interconnects or ruthenium (Ru) interconnects. The methods involve selective deposition of tungsten carbon nitride (WCN) films on the oxide surfaces of a feature including a Co surface. The selective growth of WCN on oxide allows the contact resistance at an interface such as a Co—Co interface or a Co—Ru interface to be significantly reduced while maintaining good film coverage, adhesion, and/or barrier properties on the sidewall oxide surfaces.

Abstract: A method for depositing a metal layer on a barrier layer includes a) arranging a substrate in a processing chamber. The substrate has been exposed to at least one of air and/or oxidizing chemistry and includes a barrier layer and one or more underlying layers, wherein the barrier layer includes a material selected from a group consisting of tantalum nitride, titanium nitride, tantalum and titanium. The method includes b) supplying a gas selected from a group consisting of hydrazine, a gas including fluorine species, a gas including chlorine species, derivatives of hydrazine, ammonia, carbon monoxide, a gas including amidinates, and/or a gas including metal organic ligands to the processing chamber for a predetermined period to remove oxidation from the barrier layer. The method includes c) depositing a metal layer on the barrier layer after b). The metal layer includes a metal selected from a group consisting of cobalt, copper, tungsten, ruthenium, rhodium, molybdenum, and nickel.

Abstract: Provided are deposition processes for ruthenium (Ru) feature fill. In some embodiments, the processes include deposition of a thin, protective Ru film under reducing conditions, followed by a Ru fill step under oxidizing conditions. The presence of protective Ru films formed under oxygen-free conditions or with an oxygen-removing operation can enable Ru fill without oxidation of an underlying adhesion layer or metal feature.

Abstract: Provided herein are low resistance metallization stack structures for logic and memory applications and related methods of fabrication. In some implementations, the methods involve providing a tungsten (W)-containing layer on a substrate; and depositing a molybdenum (Mo)-containing layer on the W-containing layer. In some implementations, the methods involve depositing a Mo-containing layer directly on a dielectric or titanium nitride (TiN) substrate without an intervening W-containing layer.

Abstract: Provided are methods of forming diffusion barriers and adhesion layers for interconnects such as cobalt (Co) interconnects or ruthenium (Ru) interconnects. The methods involve selective deposition of tungsten carbon nitride (WCN) films on the oxide surfaces of a feature including a Co surface. The selective growth of WCN on oxide allows the contact resistance at an interface such as a Co—Co interface or a Co—Ru interface to be significantly reduced while maintaining good film coverage, adhesion, and/or barrier properties on the sidewall oxide surfaces.

Abstract: Methods of depositing tungsten into high aspect ratio features using a dep-etch-dep process integrating various deposition techniques with alternating pulses of surface modification and removal during etch are provided herein. Methods involve introducing an activation gas at a chamber pressure and/or applying a bias using a bias power selected to preferentially etch the metal at or near the opening of the feature relative to the interior region of the feature. Apparatuses include integrated hardware for performing deposition of metal and atomic layer etching of metal in the same tool and/or without breaking vacuum.

Abstract: Methods of depositing tungsten into high aspect ratio features using a dep-etch-dep process integrating various deposition techniques with alternating pulses of surface modification and removal during etch are provided herein.

Abstract: A method for depositing a metal layer on a barrier layer includes a) arranging a substrate in a processing chamber. The substrate has been exposed to at least one of air and/or oxidizing chemistry and includes a barrier layer and one or more underlying layers, wherein the barrier layer includes a material selected from a group consisting of tantalum nitride, titanium nitride, tantalum and titanium. The method includes b) supplying a gas selected from a group consisting of hydrazine, a gas including fluorine species, a gas including chlorine species, derivatives of hydrazine, ammonia, carbon monoxide, a gas including amidinates, and/or a gas including metal organic ligands to the processing chamber for a predetermined period to remove oxidation from the barrier layer. The method includes c) depositing a metal layer on the barrier layer after b). The metal layer includes a metal selected from a group consisting of cobalt, copper, tungsten, ruthenium, rhodium, molybdenum, and nickel.

Abstract: Provided herein are methods of forming conductive cobalt (Co) interconnects and Co features. The methods involve deposition of a thin manganese (Mn)-containing film on a dielectric followed by subsequent deposition of cobalt on the Mn-containing film. The Mn-containing film may be deposited on a silicon-containing dielectric, such as silicon dioxide, and annealed to form a manganese silicate.

Abstract: Provided herein are methods of depositing void-free cobalt into features with high aspect ratios. Methods involve (a) partially filling a feature with cobalt, (b) exposing the feature to a plasma generated from nitrogen-containing gas to selectively inhibit cobalt nucleation on surfaces near or at the top of the feature, optionally repeating (a) and (b), and depositing bulk cobalt into the feature by chemical vapor deposition. Methods may also involve exposing a feature including a barrier layer to a plasma generated from nitrogen-containing gas to selectively inhibit cobalt nucleation. The methods may be performed at low temperatures less than about 400° C. using cobalt-containing precursors. Methods may also involve using a remote plasma source to generate the nitrogen-based plasma. Methods also involve annealing the substrate.

Abstract: Methods of depositing tungsten into high aspect ratio features using a dep-etch-dep process integrating various deposition techniques with alternating pulses of surface modification and removal during etch are provided herein.

Abstract: Described are cleaning methods for removing contaminants from an electrical contact interface of a partially fabricated semiconductor substrate. The methods may include introducing a halogen-containing species into a processing chamber, and forming an adsorption-limited layer, which includes halogen from the halogen-containing species, atop the electrical contact interface and/or the contaminants thereon. The methods may further include thereafter removing un-adsorbed halogen-containing species from the processing chamber and activating a reaction between the halogen of the adsorption-limited layer and the contaminants present on the electrical contact interface. The reaction may then result in the removal of at least a portion of the contaminants from the electrical contact interface. In some embodiments, the halogen adsorbed onto the surface and reacted may be fluorine. Also described herein are apparatuses having controllers for implementing such electrical contact interface cleaning techniques.

Abstract: Provided herein are methods of depositing void-free cobalt into features with high aspect ratios. Methods involve (a) partially filling a feature with cobalt, (b) exposing the feature to a plasma generated from nitrogen-containing gas to selectively inhibit cobalt nucleation on surfaces near or at the top of the feature, optionally repeating (a) and (b), and depositing bulk cobalt into the feature by chemical vapor deposition. Methods may also involve exposing a feature including a barrier layer to a plasma generated from nitrogen-containing gas to selectively inhibit cobalt nucleation. The methods may be performed at low temperatures less than about 400° C. using cobalt-containing precursors. Methods may also involve using a remote plasma source to generate the nitrogen-based plasma. Methods also involve annealing the substrate.

Abstract: Described are cleaning methods for removing contaminants from an electrical contact interface of a partially fabricated semiconductor substrate. The methods may include introducing a halogen-containing species into a processing chamber, and forming an adsorption-limited layer, which includes halogen from the halogen-containing species, atop the electrical contact interface and/or the contaminants thereon. The methods may further include thereafter removing un-adsorbed halogen-containing species from the processing chamber and activating a reaction between the halogen of the adsorption-limited layer and the contaminants present on the electrical contact interface. The reaction may then result in the removal of at least a portion of the contaminants from the electrical contact interface. In some embodiments, the halogen adsorbed onto the surface and reacted may be fluorine. Also described herein are apparatuses having controllers for implementing such electrical contact interface cleaning techniques.

Abstract: A method for removing native oxides from a substrate surface is provided. In one embodiment, the method comprises positioning a substrate having an oxide layer into a processing chamber, exposing the substrate to a gas mixture while forming a volatile film on the substrate and maintaining the substrate at a temperature below 65° C., heating the substrate to a temperature of at least about 75° C. to sublimate the volatile film and remove the oxide layer, and depositing a first layer on the substrate after heating the substrate.

Abstract: A multi-chamber processing system includes a transfer chamber, a first processing chamber outfitted to perform CVD, a second processing chamber, and a robot positioned to transfer substrates between the transfer chamber, the first processing chamber, and the second processing chamber. The second processing chamber may include one or a combination of a first electrode and a second electrode comprising a plasma cavity formed therein.