Abstract: A method of forming a titanium silicide nitride (TiSiN) layer is described. A titanium nitride (TiN) layer is deposited on a substrate, the process chamber is purged to remove reaction by-products therefrom and than the titanium nitride (TiN) layer is exposed to a silicon-containing gas to form the titanium suicide nitride (TiSiN) layer. Alternatively, the substrate may be exposed to the silicon-containing gas in a process chamber different from the one used for the titanium nitride (TiN) layer deposition.

Abstract: A simplified bi-directional shift register and a single-latch circuit for implementing the bi-directional shift register thereof which obviates the use of a conventional dual-latch (i.e., master/slave) configuration in the bi-directional shift register design is described. The single-latch circuit includes an input circuit portion and a latching circuit portion. The input circuit portion receives input signals including the output data from previous and next single-latch circuits in the shift register and right shift and left shift control signals. Dependent on the input signals, the input circuit portion drives an input node coupled to the latching circuit portion with a data value to be shifted which corresponds to data from one of the previous and next single-latch circuits.

Abstract: A double data rate (DDR) synchronous dynamic RAM (SDRAM) includes delay lock loop circuitry which is designed so as to significantly reduce the locking period associated with achieving the lock state of the delay lock loop. The delay lock loop circuit includes a first adjustable delay unit circuit for delaying the external clock so as to provide the DDR operation and includes a feedback loop having a shift register controlled by a phase detector which is used to set an optimum delay value. The delay value is then used to control the first delay unit circuit and determine the amount of delay time it provides.

Abstract: A photovoltaic generator comprising a substrate; an insulating layer provided on the substrate; first impurity diffusion zones formed on the insulating layer; second impurity diffusion zones deep enough to reach the insulating layer and of an opposite polarity to that of the first impurity diffusion zones the second impurity diffusion zones and the first impurity diffusion zones being alternately positioned on the surface of the substrate to form substantially vertical pn junctions; third impurity diffusion zones provided on the surface of the first impurity diffusion zones and the second impurity diffusion zones opposite to the insulating layer and of the same polarity as that of the second impurity diffusion zones, one end of each of the third impurity diffusion zones connecting, to the adjacent one of the second impurity diffusion zones while the other end connecting to the adjacent one of the first impurity diffusion zones; fourth impurity diffusion zones formed on the surface of the adjacent one of the f