Patents by Inventor Steven P. Ostrander

Steven P. Ostrander has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11228124
    Abstract: In some embodiments, connecting a component to a substrate by adhesion to an oxidized solder surface includes: forming one or more conductive solder connections between the component and one or more conductive portions of the substrate; adhering the component to an oxidized surface of a solder portion applied to the substrate.
    Type: Grant
    Filed: January 4, 2021
    Date of Patent: January 18, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mark K. Hoffmeyer, Steven P. Ostrander, Thomas Weiss, Thomas E. Lombardi
  • Patent number: 11211262
    Abstract: An electronic apparatus that includes a first semiconductor chip mounted on a substrate; a second semiconductor chip mounted on the substrate; a spacer attached to the substrate and situated between the first and second semiconductor chips; a lid mounted on the substrate and enclosing the first and second semiconductor chips and the spacer, the spacer having an adhesive material adhesively attached to the lid; and underfill material underneath the first and second semiconductor chips, underneath the spacer and between the spacer and the first and second semiconductor chips.
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: December 28, 2021
    Assignee: International Business Machines Corporation
    Inventors: Tuhin Sinha, Steven P. Ostrander, Bhupender Singh, Sylvain Ouimet
  • Publication number: 20210233824
    Abstract: An integrated circuit (IC) package, and a method for fabricating an IC package is described. A set of semiconductor chips, a set of corner guard structures and a chip carrier are provided. The set of semiconductor chips and the set of corner guard structure placed and bonded to a first surface of the chip carrier. The set of semiconductor chips are in electrical contact with the chip carrier. Respective corner guard structures are placed proximate to the corners of respective semiconductor chips. The coefficient of thermal expansion (CTE) of the set of corner guard structures is selected to ameliorate chip-package interaction (CPI) related failures due to differences between a CTE of the set of semiconductor chips and a CTE of the chip carrier.
    Type: Application
    Filed: January 23, 2020
    Publication date: July 29, 2021
    Inventors: Shidong Li, Kamal K. Sikka, Charles L. Arvin, Steven P. Ostrander
  • Publication number: 20210225665
    Abstract: An electronic apparatus that includes a first semiconductor chip mounted on a substrate; a second semiconductor chip mounted on the substrate; a spacer attached to the substrate and situated between the first and second semiconductor chips; a lid mounted on the substrate and enclosing the first and second semiconductor chips and the spacer, the spacer having an adhesive material adhesively attached to the lid; and underfill material underneath the first and second semiconductor chips, underneath the spacer and between the spacer and the first and second semiconductor chips.
    Type: Application
    Filed: January 16, 2020
    Publication date: July 22, 2021
    Inventors: TUHIN SINHA, Steven P. Ostrander, Bhupender Singh, Sylvain Ouimet
  • Patent number: 10777482
    Abstract: A multipart lid is provided. The multipart lid may include a formed upper lid designed for maximum heat dissipation, a coined lower lid joined to the formed upper lid, where the coined lower lid comprises a coefficient of thermal expansion (CTE) substantially equal to a CTE of a first semiconductor component. A structure is provided. The structure may include a substrate, a first semiconductor component electrically connected and mounted on the substrate, one or more discrete components electrically connected and mounted on the substrate, a substrate mounted multipart lid covering both the semiconductor component and the one or more discrete components, where the multipart lid comprises a heat dissipating upper lid and a lower lid, where a coefficient of thermal expansion (CTE) of the lower lid substantially matches a CTE of the first semiconductor component.
    Type: Grant
    Filed: May 7, 2019
    Date of Patent: September 15, 2020
    Assignee: ELPIS TECHNOLOGIES INC.
    Inventors: Charles L. Arvin, Steven P. Ostrander, Krishna R. Tunga
  • Publication number: 20190259683
    Abstract: A multipart lid is provided. The multipart lid may include a formed upper lid designed for maximum heat dissipation, a coined lower lid joined to the formed upper lid, where the coined lower lid comprises a coefficient of thermal expansion (CTE) substantially equal to a CTE of a first semiconductor component. A structure is provided. The structure may include a substrate, a first semiconductor component electrically connected and mounted on the substrate, one or more discrete components electrically connected and mounted on the substrate, a substrate mounted multipart lid covering both the semiconductor component and the one or more discrete components, where the multipart lid comprises a heat dissipating upper lid and a lower lid, where a coefficient of thermal expansion (CTE) of the lower lid substantially matches a CTE of the first semiconductor component.
    Type: Application
    Filed: May 7, 2019
    Publication date: August 22, 2019
    Inventors: CHARLES L. ARVIN, STEVEN P. OSTRANDER, KRISHNA R. TUNGA
  • Patent number: 10325830
    Abstract: A multipart lid is provided. The multipart lid may include a formed upper lid designed for maximum heat dissipation, a coined lower lid joined to the formed upper lid, where the coined lower lid comprises a coefficient of thermal expansion (CTE) substantially equal to a CTE of a first semiconductor component. A structure is provided. The structure may include a substrate, a first semiconductor component electrically connected and mounted on the substrate, one or more discrete components electrically connected and mounted on the substrate, a substrate mounted multipart lid covering both the semiconductor component and the one or more discrete components, where the multipart lid comprises a heat dissipating upper lid and a lower lid, where a coefficient of thermal expansion (CTE) of the lower lid substantially matches a CTE of the first semiconductor component.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: June 18, 2019
    Assignee: International Business Machines Corporation
    Inventors: Charles L. Arvin, Steven P. Ostrander, Krishna R. Tunga
  • Publication number: 20190164864
    Abstract: A multipart lid is provided. The multipart lid may include a formed upper lid designed for maximum heat dissipation, a coined lower lid joined to the formed upper lid, where the coined lower lid comprises a coefficient of thermal expansion (CTE) substantially equal to a CTE of a first semiconductor component. A structure is provided. The structure may include a substrate, a first semiconductor component electrically connected and mounted on the substrate, one or more discrete components electrically connected and mounted on the substrate, a substrate mounted multipart lid covering both the semiconductor component and the one or more discrete components, where the multipart lid comprises a heat dissipating upper lid and a lower lid, where a coefficient of thermal expansion (CTE) of the lower lid substantially matches a CTE of the first semiconductor component.
    Type: Application
    Filed: November 30, 2017
    Publication date: May 30, 2019
    Inventors: CHARLES L. ARVIN, STEVEN P. OSTRANDER, KRISHNA R. TUNGA
  • Patent number: 9947598
    Abstract: A methodology and associated wafer level assembly of testing crackstop structure designs. The wafer level semiconductor assembly includes: a substrate structure shaped to define a set of horizontal directions; a metallization layer located on top of the substrate structure, with the metallization layer including a crackstop structure formed therein in accordance with a crackstop structure design; and a tensioned layer located on top of the metallization layer, with the tensioned layer being made of material having internal tensile forces oriented in the horizontal directions. The tensile forces promote horizontal direction crack propagation in the metallization layer so that the crackstop structure design can be tested more rigorously and reliably before deciding on the crackstop design structure to put into mass production (which mass produced product would typically not include the tensioned layer).
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: April 17, 2018
    Assignee: International Business Machines Corporation
    Inventors: Krishna R. Tunga, Karen P. McLaughlin, Charles L. Arvin, Brian R. Sundlof, Steven P. Ostrander, Christopher D. Muzzy, Thomas A. Wassick
  • Patent number: 9601423
    Abstract: A laminate includes a buildup layer having a top and a bottom and a solder mask contacting the top. The laminate also includes a circuit element disposed on the top of the buildup layer and at least partially covered by the solder mask, the circuit element including a first via formed therein that allows for a power signal provided to an underside of the circuit element to be provided to a first connection on a top of the circuit element.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: March 21, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Charles L. Arvin, Jon A. Casey, Brian M. Erwin, Steven P. Ostrander, Brian W. Quinlan
  • Patent number: 9543253
    Abstract: A method including providing a laminate substrate, characterizing the laminate substrate for warpage characteristics, determining a horizontal plane distortion based on the warpage characteristics, and placing the laminate substrate into a fixture with an adjustment to correct the horizontal plane distortion, the adjustment being located in a center of the laminate substrate, wherein the adjustment contacts the laminate substrate. The method may further include fluxing the laminate substrate, placing a chip onto the laminate substrate, and placing the fixture into a reflow furnace to join the chip and the laminate substrate.
    Type: Grant
    Filed: January 16, 2015
    Date of Patent: January 10, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Edmund Blackshear, Thomas E. Lombardi, Donald A. Merte, Steven P. Ostrander, Thomas Weiss, Jiantao Zheng
  • Patent number: 9366591
    Abstract: An apparatus for determining a magnitude of a compressive load applied to a piston including a compliant film disposed between first and second elements is provided. The apparatus includes a first part movable with the first element in a movement direction along which the magnitude of the compressive load is to be determined, a second part movable with the second element in the movement direction and a sensor to measure a distance between the first and second parts in the movement direction, the measured distance being related to a deformation of the compliant film as the compressive load is applied.
    Type: Grant
    Filed: July 24, 2014
    Date of Patent: June 14, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Paul F. Bodenweber, Virendra R. Jadhav, Steven P. Ostrander, Kamal K. Sikka, Jiantao Zheng, Jeffrey A. Zitz
  • Patent number: 9272498
    Abstract: Precast curable thermal interface adhesives facilitating the easy and repeatable separation and remaining of electronic components at thermal interfaces thereof, and a method for implementing the foregoing repeatable separation and remating at the thermal interfaces of components through the use of such adhesives.
    Type: Grant
    Filed: July 11, 2012
    Date of Patent: March 1, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Evan George Colgan, Paul W. Coteus, Michael Anthony Gaynes, Kenneth Charles Marston, Steven P. Ostrander
  • Patent number: 9219051
    Abstract: A clamping apparatus and method for applying a force to a workpiece during processing includes a base defining a work area. The work area is configured to receive a joined structure including a substrate and a die. A component is positionable in the work area and over the joined structure. An adjustable releasable structure is positionable over the component and the joined structure and includes a resilient mechanism having an inner member for contacting the component to apply an inner downward force to the component. The resilient mechanism also includes outer members for applying an outer downward force to opposing distal edge areas of the substrate. An external downward force is applied to the adjustable releasable structure, such that the inner and outer members apply the inner and outer downward forces to the component and the opposing distal edge areas of the substrate, respectively, during processing of the joined structure.
    Type: Grant
    Filed: June 5, 2013
    Date of Patent: December 22, 2015
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Stephanie Allard, Martin Beaumier, Jean-Francois Drapeau, Jean Labonte, Steven P. Ostrander, Sylvain Ouimet
  • Patent number: 9059240
    Abstract: A fixture for shaping a laminate substrate includes a trap ring, a base plate and a center button. The base plate includes a recess adapted to receive the laminate substrate. The center button is disposed in an opening in the base plate. The center button may be adjusted to shape the laminate substrate.
    Type: Grant
    Filed: June 5, 2012
    Date of Patent: June 16, 2015
    Assignee: International Business Machines Corporation
    Inventors: Edmund D. Blackshear, Thomas E. Lombardi, Donald A. Merte, Steven P. Ostrander, Thomas Weiss, Jiantao Zheng
  • Patent number: 9048245
    Abstract: A method including providing a fixture comprising a trap ring, a base plate having a recess adapted to receive a laminate substrate, the base plate including an opening and an adjustable height center button disposed in the opening, the opening being located within the recess and located in a center of the laminate substrate, characterizing the laminate substrate for warpage characteristics by using one of room temperature techniques and elevated temperature techniques, determining a horizontal plane distortion based on the warpage characteristics, and placing the laminate substrate into the fixture with an adjustment to correct the horizontal plane distortion, the adjustment is provided by the adjustable height center button, wherein the adjustable height center button contacts the laminate substrate. The method further includes fluxing the laminate substrate, placing a chip onto the laminate substrate, and placing the fixture into a reflow furnace to join the chip and the laminate substrate.
    Type: Grant
    Filed: June 5, 2012
    Date of Patent: June 2, 2015
    Assignee: International Business Machines Corporation
    Inventors: Edmund Blackshear, Thomas E. Lombardi, Donald A. Merte, Steven P. Ostrander, Thomas Weiss, Jiantao Zheng
  • Publication number: 20150136838
    Abstract: A method including providing a laminate substrate, characterizing the laminate substrate for warpage characteristics, determining a horizontal plane distortion based on the warpage characteristics, and placing the laminate substrate into a fixture with an adjustment to correct the horizontal plane distortion, the adjustment being located in a center of the laminate substrate, wherein the adjustment contacts the laminate substrate. The method may further include fluxing the laminate substrate, placing a chip onto the laminate substrate, and placing the fixture into a reflow furnace to join the chip and the laminate substrate.
    Type: Application
    Filed: January 16, 2015
    Publication date: May 21, 2015
    Inventors: Edmund Blackshear, Thomas E. Lombardi, Donald A. Merte, Steven P. Ostrander, Thomas Weiss, Jiantao Zheng
  • Publication number: 20140359996
    Abstract: A clamping apparatus and method for applying a force to a workpiece during processing includes a base defining a work area. The work area is configured to receive a joined structure including a substrate and a die. A component is positionable in the work area and over the joined structure. An adjustable releasable structure is positionable over the component and the joined structure and includes a resilient mechanism having an inner member for contacting the component to apply an inner downward force to the component. The resilient mechanism also includes outer members for applying an outer downward force to opposing distal edge areas of the substrate. An external downward force is applied to the adjustable releasable structure, such that the inner and outer members apply the inner and outer downward forces to the component and the opposing distal edge areas of the substrate, respectively, during processing of the joined structure.
    Type: Application
    Filed: June 5, 2013
    Publication date: December 11, 2014
    Inventors: Stephanie Allard, Martin Beaumier, Jean-Francois Drapeau, Jean Labonte, Steven P. Ostrander, Sylvain Ouimet
  • Patent number: 8906809
    Abstract: A multi-chip electronic package and methods of manufacture are provided. The structure includes a lid encapsulating at least one chip mounted on a chip carrier; at least one seal shim fixed between the lid and the chip carrier, the at least one seal shim forming a gap between pistons of the lid and respective ones of the chips; and thermal interface material within the gap and contacting the pistons of the lid and respective ones of the chips.
    Type: Grant
    Filed: June 7, 2012
    Date of Patent: December 9, 2014
    Assignee: International Business Machines Corporation
    Inventors: Martin M. Beaumier, Steven P. Ostrander, Kamal K. Sikka, Hilton T. Toy, Jeffrey A. Zitz
  • Patent number: 8900927
    Abstract: A multi-chip electronic package and methods of manufacture are provided. The method includes contacting pistons of a lid with respective ones of chips on a chip carrier. The method further includes separating the lid and the chip carrier and placing at least one seal shim on one of the lid and chip carrier. The at least one seal shim has a thickness that results in a gap between the pistons with the respective ones of the chips on the chip carrier. The method further includes dispensing thermal interface material within the gap and in contact with the chips. The method further includes sealing the lid to the chip carrier with the at least one seal shim between the lid and the chip carrier.
    Type: Grant
    Filed: August 16, 2010
    Date of Patent: December 2, 2014
    Assignee: International Business Machines Corporation
    Inventors: Martin M. Beaumier, Steven P. Ostrander, Kamal K. Sikka, Hilton T. Toy, Jeffrey A. Zitz