Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.

Abstract: Devices that include a substrate; a source region and a drain region formed within the substrate and having a channel region provided therebetween; a first insulating layer formed over the channel region; a first floating gate formed over the first insulating layer, the first floating gate configured to respond to an analyte in a target material; and a second gate formed over the first floating gate, the second gate capacatively coupled but not electrically connected to the first floating gate.

Abstract: Provided is a composite metal-wide-bandgap semiconductor tip for scanning tunneling microscopy and/or scanning, tunneling lithography, a method of forming, and a method for using the composite metal-wide-bandgap semiconductor tip.

Abstract: A 2-D sensor array includes a semiconductor substrate and a plurality of pixels disposed on the semiconductor substrate. Each pixel includes a coupling region and a junction region, and a slab waveguide structure disposed on the semiconductor substrate and extending from the coupling region to the region. The slab waveguide includes a confinement layer disposed between a first cladding layer and a second cladding layer. The first cladding and the second cladding each have a refractive index that is lower than a refractive index of the confinement layer. Each pixel also includes a coupling structure disposed in the coupling region and within the slab waveguide. The coupling structure includes two materials having different indices of refraction arranged as a grating defined by a grating period. The junction region comprises a p-n junction in communication with electrical contacts for biasing and collection of carriers resulting from absorption of incident radiation.

Abstract: In accordance with the disclosure, a method of forming a nanochannel is provided. The method includes depositing a photosensitive film stack over a substrate; forming a pattern on the film stack using interferometric lithography; depositing a plurality of silica nanoparticles to form a structure over the pattern; removing the pattern while retaining the structure formed by the plurality of silica nanoparticles, wherein the structure comprises one or more enclosed nanochannels, wherein each of the one or more nanochannels comprise one or more sidewalls and a roof; and partially sealing the roof of one or more nanochannels, wherein the roof comprises no more than one unsealed nanochannel per squared micron.

Abstract: Methods and apparatus for long read, label-free, optical nanopore long chain molecule sequencing. In general, the present disclosure describes a novel sequencing technology based on the integration of nanochannels to deliver single long-chain molecules with widely spaced (>wavelength), ˜1-nm aperture “tortuous” nanopores that slow translocation sufficiently to provide massively parallel, single base resolution using optical techniques. A novel, directed self-assembly nanofabrication scheme using simple colloidal nanoparticles is used to form the nanopore arrays atop nanochannels that unfold the long chain molecules. At the surface of the nanoparticle array, strongly localized electromagnetic fields in engineered plasmonic/polaritonic structures allow for single base resolution using optical techniques.

Abstract: A method of forming a semiconductor structure includes providing a substrate comprising a first material portion and a single crystal silicon layer on the first material portion. The substrate further comprises a major front surface, a major backside surface opposing the major front surface, and a plurality of grooves positioned in the major front surface. A buffer layer is deposited in one or more of the plurality of grooves. A semiconductor material is epitaxially grown over the buffer layer and in the one or more plurality of grooves, the epitaxially grown semiconductor material comprising a hexagonal crystalline phase layer and a cubic crystalline phase structure disposed over the hexagonal crystalline phase.

Abstract: Nanowires that may be utilized in microscopy, for example atomic force microscopy (AFM), as part of an AFM probe, as well as for other uses, are disclosed. The nanowires may be formed from a Group III nitride such as an epitaxial layer that may be or include gallium nitride, indium nitride, aluminum nitride, and an alloy of these materials. During use of the AFM probe to measure a topography of a test sample surface, the nanowire can activated and caused to lase and emit a light, thereby illuminating the surface with the light. In an implementation, the light can be collected by the AFM probe itself, for example through an optical fiber to which the nanowire is attached.

Abstract: A transistor comprises a substrate comprising a Group III/V compound semiconductor material having a cubic crystalline phase structure positioned on a hexagonal crystalline phase layer having a first region and a second region, the cubic crystalline phase structure being positioned between the first region and the second region of the hexagonal crystalline phase layer. A source region and a drain region are both positioned in the Group III/V compound semiconductor material. A channel region is in the Group III/V compound semiconductor material. A gate is over the channel region. An optional backside contact can also be formed. A source contact and electrode are positioned to provide electrical contact to the source region. A drain contact and electrode are positioned to provide electrical contact to the drain region. Methods of forming transistors are also disclosed.

Abstract: Provided is a spectral sensor array, including: a planar waveguide on a substrate; a chirped input coupling grating, wherein the chirped input coupling grating comprises a transverse chirp to provide a spectrally selective coupling of incident light into the planar waveguide; an output coupling grating; and an array of photodetectors arranged to receive the light coupled out of the waveguide.

Abstract: Provided is a method for growing a nanowire, including: providing a substrate with a base portion having a first surface and at least one support structure extending above or below the first surface; forming a dielectric coating on the at least one support structure; forming a photoresist coating over the substrate; forming a metal coating over at least a portion of the dielectric coating; removing a portion of the dielectric coating to expose a surface of the at least one support structure; removing a portion of the at least one support structure to form a nanowire growth surface; growing at least one nanowire on the nanowire growth surface of a corresponding one of the at least one support structure, wherein the nanowire comprises a root end attached to the growth surface and an opposing, free end extending from the root end; and elastically bending the at least one nanowire.

Abstract: A method of forming a semiconductor structure includes providing a substrate comprising a first material portion and a single crystal silicon layer on the first material portion. The substrate further comprises a major front surface, a major backside surface opposing the major front surface, and a plurality of grooves positioned in the major front surface. A buffer layer is deposited in one or more of the plurality of grooves. A semiconductor material is epitaxially grown over the buffer layer and in the one or more plurality of grooves, the epitaxially grown semiconductor material comprising a hexagonal crystalline phase layer and a cubic crystalline phase structure disposed over the hexagonal crystalline phase.

Abstract: A tunable laser device includes a laser structure and a plurality of individually addressable, separated contact stripes disposed on the laser structure. The laser structure includes a substrate, an active portion disposed on the substrate, and a chirped distributed feedback (DFB) grating disposed on the active portion. The active portion includes at least top and bottom contact layers and a gain medium.

Abstract: A 2-D sensor array includes a semiconductor substrate and a plurality of pixels disposed on the semiconductor substrate. Each pixel includes a coupling region and a junction region, and a slab waveguide structure disposed on the semiconductor substrate and extending from the coupling region to the region. The slab waveguide includes a confinement layer disposed between a first cladding layer and a second cladding layer. The first cladding and the second cladding each have a refractive index that is lower than a refractive index of the confinement layer. Each pixel also includes a coupling structure disposed in the coupling region and within the slab waveguide. The coupling structure includes two materials having different indices of refraction arranged as a grating defined by a grating period. The junction region comprises a p-n junction in communication with electrical contacts for biasing and collection of carriers resulting from absorption of incident radiation.

Abstract: The present disclosure relates to an electromagnetic energy detector. The detector can include a substrate having a first refractive index; a metal layer; an absorber layer having a second refractive index and disposed between the substrate and the metal layer; a coupling structure to convert incident radiation to a surface plasma wave; additional conducting layers to provide for electrical contact to the electromagnetic energy detector, each conducting layer characterized by a conductivity and a refractive index; and a surface plasma wave (“SPW”) mode-confining layer having a third refractive index that is higher than the second refractive index disposed between the substrate and the metal layer.

Abstract: Methods and apparatus for long read, label-free, optical nanopore long chain molecule sequencing. In general, the present disclosure describes a novel sequencing technology based on the integration of nanochannels to deliver single long-chain molecules with widely spaced (>wavelength), ˜1-nm aperture “tortuous” nanopores that slow translocation sufficiently to provide massively parallel, single base resolution using optical techniques. A novel, directed self-assembly nanofabrication scheme using simple colloidal nanoparticles is used to form the nanopore arrays atop nanochannels that unfold the long chain molecules. At the surface of the nanoparticle array, strongly localized electromagnetic fields in engineered plasmonic/polaritonic structures allow for single base resolution using optical techniques.

Abstract: A transistor comprises a substrate comprising a Group III/V compound semiconductor material having a cubic crystalline phase structure positioned on a hexagonal crystalline phase layer having a first region and a second region, the cubic crystalline phase structure being positioned between the first region and the second region of the hexagonal crystalline phase layer. A source region and a drain region are both positioned in the Group III/V compound semiconductor material. A channel region is in the Group III/V compound semiconductor material. A gate is over the channel region. An optional backside contact can also be formed. A source contact and electrode are positioned to provide electrical contact to the source region. A drain contact and electrode are positioned to provide electrical contact to the drain region. Methods of forming transistors are also disclosed.

Abstract: A method for making a heteroepitaxial layer. The method comprises providing a semiconductor substrate. A seed area delineated with a selective growth mask is formed on the semiconductor substrate. The seed area comprises a first material and has a linear surface dimension of less than 100 nm. A heteroepitaxial layer is grown on the seed area, the heteroepitaxial layer comprising a second material that is different from the first material. Devices made by the method are also disclosed.

Abstract: Exemplary embodiments provide materials and methods of forming high-quality semiconductor devices using lattice-mismatched materials. In one embodiment, a composite film including one or more substantially-single-particle-thick nanoparticle layers can be deposited over a substrate as a nanoscale selective growth mask for epitaxially growing lattice-mismatched materials over the substrate.

Abstract: In accordance with the disclosure, a method of forming a nanochannel is provided. The method includes depositing a photosensitive film stack over a substrate; forming a pattern on the film stack using interferometric lithography; depositing a plurality of silica nanoparticles to form a structure over the pattern; removing the pattern while retaining the structure formed by the plurality of silica nanoparticles, wherein the structure comprises one or more enclosed nanochannels, wherein each of the one or more nanochannels comprise one or more sidewalls and a roof; and partially sealing the roof of one or more nanochannels, wherein the roof comprises no more than one unsealed nanochannel per squared micron.