Patents by Inventor Steven T. Mayer

Steven T. Mayer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8513124
    Abstract: Disclosed are methods of depositing a copper seed layer to be used for subsequent electroplating a bulk-layer of copper thereon. A copper seed layer may be deposited with different processes, including CVD, PVD, and electroplating. With electroplating methods for depositing a copper seed layer, disclosed are methods for depositing a copper alloy seed layer, methods for depositing a copper seed layer on the semi-noble metal layer with a non-corrosive electrolyte, methods of treating the semi-noble metal layer that the copper seed layer is deposited on, and methods for promoting a more uniform copper seed layer deposition across a semiconductor wafer.
    Type: Grant
    Filed: May 21, 2010
    Date of Patent: August 20, 2013
    Assignee: Novellus Systems, Inc.
    Inventors: Thomas A. Ponnuswamy, John H. Sukamto, Jonathan D. Reid, Steven T. Mayer
  • Publication number: 20130207030
    Abstract: Exposed copper regions on a semiconductor substrate can be etched by a wet etching solution comprising (i) one or more complexing agents selected from the group consisting of bidentate, tridentate, and quadridentate complexing agents; and (ii) an oxidizer, at a pH of between about 5 and 12. In many embodiments, the etching is substantially isotropic and occurs without visible formation of insoluble species on the surface of copper. The etching is useful in a number of processes in semiconductor fabrication, including for partial or complete removal of copper overburden, for planarization of copper surfaces, and for forming recesses in copper-filled damascene features. Examples of suitable etching solutions include solutions comprising a diamine (e.g., ethylenediamine) and/or a triamine (e.g., diethylenetriamine) as bidentate and tridentate complexing agents respectively and hydrogen peroxide as an oxidizer.
    Type: Application
    Filed: December 21, 2012
    Publication date: August 15, 2013
    Inventors: Steven T. MAYER, Eric WEBB, David W. PORTER
  • Patent number: 8500983
    Abstract: A plating protocol is employed to control plating of metal onto a wafer comprising a conductive seed layer. Initially, the protocol employs cathodic protection as the wafer is immersed in the plating solution. In certain embodiments, the current density of the wafer is constant during immersion. In a specific example, potentiostatic control is employed to produce a current density in the range of about 1.5 to 20 mA/cm2. The immersion step is followed by a high current pulse step. During bottom up fill inside the features of the wafer, a constant current or a current with a micropulse may be used. This protocol may protect the seed from corrosion while enhancing nucleation during the initial stages of plating.
    Type: Grant
    Filed: May 24, 2010
    Date of Patent: August 6, 2013
    Assignee: Novellus Systems, Inc.
    Inventors: Thomas A. Ponnuswamy, Bryan Pennington, Clifford Berry, Bryan L. Buckalew, Steven T. Mayer
  • Patent number: 8500985
    Abstract: Selectively accelerated or selectively inhibited metal deposition is performed to form metal structures of an electronic device. A desired pattern of an accelerator or of an inhibitor is applied to the substrate; for example, by stamping the substrate with a patterned stamp or spraying a solution using an inkjet printer. In other embodiments, a global layer of accelerator or inhibitor is applied to a substrate and selectively modified in a desired pattern. Thereafter, selective metal deposition is performed.
    Type: Grant
    Filed: July 13, 2007
    Date of Patent: August 6, 2013
    Assignee: Novellus Systems, Inc.
    Inventors: Steven T. Mayer, John Stephen Drewery, Eric G. Webb
  • Patent number: 8481432
    Abstract: An etching process for selectively etching exposed metal surfaces of a substrate and forming a conductive capping layer over the metal surfaces is described. In some embodiments, the etching process involves oxidation of the exposed metal to form a metal oxide that is subsequently removed from the surface of the substrate. The exposed metal may be oxidized by using solutions containing oxidizing agents such as peroxides or by using oxidizing gases such as those containing oxygen or ozone. The metal oxide produced is then removed using suitable metal oxide etching agents such as glycine. The oxidation and etching may occur in the same solution. In other embodiments, the exposed metal is directly etched without forming a metal oxide. Suitable direct metal etching agents include any number of acidic solutions. The process allows for controlled oxidation and/or etching with reduced pitting.
    Type: Grant
    Filed: May 26, 2011
    Date of Patent: July 9, 2013
    Assignee: Novellus Systems, Inc.
    Inventors: Steven T. Mayer, Daniel A. Koos, Eric Webb
  • Publication number: 20130171833
    Abstract: Disclosed are pre-wetting apparatus designs and methods. In some embodiments, a pre-wetting apparatus includes a degasser, a process chamber, and a controller. The process chamber includes a wafer holder configured to hold a wafer substrate, a vacuum port configured to allow formation of a subatmospheric pressure in the process chamber, and a fluid inlet coupled to the degasser and configured to deliver a degassed pre-wetting fluid onto the wafer substrate at a velocity of at least about 7 meters per second whereby particles on the wafer substrate are dislodged and at a flow rate whereby dislodged particles are removed from the wafer substrate. The controller includes program instructions for forming a wetting layer on the wafer substrate in the process chamber by contacting the wafer substrate with the degassed pre-wetting fluid admitted through the fluid inlet at a flow rate of at least about 0.4 liters per minute.
    Type: Application
    Filed: February 25, 2013
    Publication date: July 4, 2013
    Inventors: Bryan L. BUCKALEW, Steven T. MAYER, Thomas A. PONNUSWAMY, Robert RASH, Brian BLACKMAN, Doug HIGLEY
  • Patent number: 8475637
    Abstract: Embodiments related to increasing a uniformity of an electroplated film are disclosed. For example, one disclosed embodiment provides an electroplating apparatus comprising a plating chamber, a work piece holder, a cathode contact configured to electrically contact a work piece, and an anode contact configured to electrically contact an anode disposed in the plating chamber. A diffusing barrier is disposed between the cathode contact and the anode contact to provide a uniform electrolyte flow to the work piece, and electrolyte delivery and return paths are provided for delivering electrolyte to and away from the plating chamber. Additionally, a vented electrolyte manifold is disposed in the electrolyte delivery path immediately upstream of the plating chamber, the vented electrolyte manifold comprising one or more electrolyte delivery openings that open to the plating chamber and one or more vents that open to a location other than the plating chamber.
    Type: Grant
    Filed: December 17, 2008
    Date of Patent: July 2, 2013
    Assignee: Novellus Systems, Inc.
    Inventors: Jingbin Feng, Zhian He, Robert Rash, Steven T. Mayer
  • Publication number: 20130161203
    Abstract: Provided herein are methods and apparatus for determining leveler concentration in an electroplating solution. The approach allows the concentration of leveler to be detected and measured, even at very low leveler concentrations. According to the various embodiments, the methods involve providing an electrode with a metal surface, exposing the electrode to a pre-acceleration solution with at least one accelerator, allowing the surface of the electrode to become saturated with accelerator, measuring an electrochemical response while plating the electrode in a solution, and determining the concentration of leveler in the solution by comparing the measured electrochemical response to a model relating leveler concentration to known electrochemical responses. According to other embodiments, the apparatus includes an electrode, a measuring apparatus or an electrochemical cell configured to measure an electrochemical response, and a controller designed to carry out the method outlined above.
    Type: Application
    Filed: December 11, 2012
    Publication date: June 27, 2013
    Inventor: Steven T. MAYER
  • Patent number: 8470191
    Abstract: Plating accelerator is applied selectively to a substantially-unfilled wide (e.g., low-aspect-ratio feature cavity. Then, plating of metal is conducted to fill the wide feature cavity and to form an embossed structure in which the height of a wide-feature metal protrusion over the metal-filled wide-feature cavity is higher than the height of metal over field regions. Most of the overburden metal is removed using non-contact techniques, such as chemical wet etching. Metal above the wide feature cavity protects the metal-filled wide-feature interconnect against dishing, and improved planarization techniques avoid erosion of the metal interconnect and dielectric insulating layer. In some embodiments, plating of metal onto a substrate is conducted to fill narrow (e.g., high-aspect-ratio feature cavities) in the dielectric layer before selective application of plating accelerator and filling of the wide feature cavity.
    Type: Grant
    Filed: August 6, 2007
    Date of Patent: June 25, 2013
    Assignee: Novellus Systems, Inc.
    Inventors: Steven T. Mayer, Mark L. Rea, Richard S. Hill, Avishai Kepten, R. Marshall Stowell, Eric G. Webb
  • Patent number: 8450210
    Abstract: Methods and apparatus are provided for processing semiconductor wafers sequentially. Sequential processes employ multi-station processing modules, where particular encompassing wafer processes are divided into sub-processes, each optimized for increasing wafer to wafer uniformity, result quality, and overall wafer throughput. In one example, a copper electroplating module includes separate stations for wetting, initiation, seed layer repair, fill, overburden, reclaim, and rinse.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: May 28, 2013
    Assignee: Novellus Systems, Inc.
    Inventors: Evan E. Patton, Theodore Cacouris, Eliot Broadbent, Steven T. Mayer
  • Patent number: 8419964
    Abstract: Chemical etching methods and associated modules for performing the removal of metal from the edge bevel region of a semiconductor wafer are described. The methods and systems provide the thin layer of pre-rinsing liquid before applying etchant at the edge bevel region of the wafer. The etchant is less diluted and diffuses faster through a thinned layer of rinsing liquid. An edge bevel removal embodiment involving that is particularly effective at reducing process time, narrowing the metal taper and allowing for subsequent chemical mechanical polishing, is disclosed.
    Type: Grant
    Filed: August 27, 2008
    Date of Patent: April 16, 2013
    Assignee: Novellus Systems, Inc.
    Inventors: Kousik Ganesan, Shanthinath Ghongadi, Tariq Majid, Aaron Labrie, Steven T. Mayer
  • Patent number: 8415261
    Abstract: Methods of forming a capping layer on conductive lines in a semiconductor device may be characterized by the following operations: (a) providing a semiconductor substrate comprising a dielectric layer having (i) exposed conductive lines (e.g., copper lines) disposed therein, and (ii) an exposed barrier layer disposed thereon; and (b) depositing a capping layer material on at least the exposed conductive lines of the semiconductor substrate. In certain embodiments, the method may also involve removing at least a portion of a conductive layer (e.g., overburden) disposed over the barrier layer and conductive lines to expose the barrier layer.
    Type: Grant
    Filed: October 11, 2011
    Date of Patent: April 9, 2013
    Assignee: Novellus Systems, Inc.
    Inventors: Jonathan D. Reid, Eric G. Webb, Edmund B. Minshall, Avishai Kepten, R. Marshall Stowell, Steven T. Mayer
  • Patent number: 8372258
    Abstract: The working electrode in the flow channel of a flow-through electrolytic detection cell is preconditioned by flowing a preconditioning electroplating solution with preconditioner species through the flow channel while applying a negative potential. Flow of liquid through the flow channel is rapidly switched from preconditioning solution to a target solution containing an organic target solute to be measured. The transient response of the system resulting from exposure of the working electrode to organic target solute is detected by measuring current density during an initial transient time period. An unknown concentration of target solute is determined by comparing the transient response with one or more transient responses characteristic of known concentrations. A preferred measuring system is operable to switch flow from preconditioning solution to target solution in about 200 milliseconds or less.
    Type: Grant
    Filed: August 3, 2009
    Date of Patent: February 12, 2013
    Assignee: Novellus Systems, Inc.
    Inventors: Mark J. Willey, Lian Guo, Steven T. Mayer
  • Patent number: 8372757
    Abstract: Exposed copper regions on a semiconductor substrate can be etched by a wet etching solution comprising (i) one or more complexing agents selected from the group consisting of bidentate, tridentate, and quadridentate complexing agents; and (ii) an oxidizer, at a pH of between about 5 and 12. In many embodiments, the etching is substantially isotropic and occurs without visible formation of insoluble species on the surface of copper. The etching is useful in a number of processes in semiconductor fabrication, including for partial or complete removal of copper overburden, for planarization of copper surfaces, and for forming recesses in copper-filled damascene features. Examples of suitable etching solutions include solutions comprising a diamine (e.g., ethylenediamine) and/or a triamine (e.g., diethylenetriamine) as bidentate and tridentate complexing agents respectively and hydrogen peroxide as an oxidizer.
    Type: Grant
    Filed: August 4, 2009
    Date of Patent: February 12, 2013
    Assignee: Novellus Systems, Inc.
    Inventors: Steven T. Mayer, Eric Webb, David W. Porter
  • Publication number: 20120279864
    Abstract: Several techniques are described for reducing or mitigating the formation of seams and/or voids in electroplating the interior regions of microscopic recessed features. Cathodic polarization is used to mitigate the deleterious effects of introducing a substrate plated with a seed layer into an electroplating solution. Also described are diffusion-controlled electroplating techniques to provide for bottom-up filling of trenches and vias, avoiding thereby sidewalls growing together to create seams/voids. A preliminary plating step is also described that plates a thin film of conductor on the interior surfaces of features leading to adequate electrical conductivity to the feature bottom, facilitating bottom-up filling.
    Type: Application
    Filed: October 31, 2011
    Publication date: November 8, 2012
    Inventors: Steven T. Mayer, Vijay Bhaskaran, Evan E. Patton, Robert L. Jackson, Jonathan Reid
  • Publication number: 20120258408
    Abstract: Methods of electroplating metal on a substrate while controlling azimuthal uniformity, include, in one aspect, providing the substrate to the electroplating apparatus configured for rotating the substrate during electroplating, and electroplating the metal on the substrate while rotating the substrate relative to a shield such that a selected portion of the substrate at a selected azimuthal position dwells in a shielded area for a different amount of time than a second portion of the substrate having the same average arc length and the same average radial position and residing at a different angular (azimuthal) position. For example, a semiconductor wafer substrate can be rotated during electroplating slower or faster, when the selected portion of the substrate passes through the shielded area.
    Type: Application
    Filed: April 3, 2012
    Publication date: October 11, 2012
    Inventors: Steven T. MAYER, David W. PORTER, Bryan L. BUCKALEW, Robert RASH
  • Patent number: 8268154
    Abstract: Methods and apparatus are provided for planar metal plating on a workpiece having a surface with recessed regions and exposed surface regions; comprising the steps of: causing a plating accelerator to become attached to said surface including the recessed and exposed surface regions; selectively removing the plating accelerator from the exposed surface regions without performing substantial metal plating on the surface; and after removal of plating accelerator is at least partially complete, plating metal onto the surface, whereby the plating accelerator remaining attached to the surface increases the rate of metal plating in the recessed regions relative to the rate of metal plating in the exposed surface regions.
    Type: Grant
    Filed: August 20, 2010
    Date of Patent: September 18, 2012
    Assignee: Novellus Systems, Inc.
    Inventors: Steven T. Mayer, John S. Drewery, Richard S. Hill, Timothy M. Archer, Avishai Kepten
  • Patent number: 8262871
    Abstract: An apparatus for electroplating a layer of metal onto a work piece surface includes a membrane separating the chamber of the apparatus into a catholyte chamber and an anolyte chamber. In the catholyte chamber is a catholyte manifold region that includes a catholyte manifold and at least one flow distribution tube. The catholyte manifold and at least one flow distribution tube serve to mix and direct catholyte flow in the catholyte chamber. The provided configuration effectively reduces failure and improves the operational ranges of the apparatus.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: September 11, 2012
    Assignee: Novellus Systems, Inc.
    Inventors: Steven T. Mayer, Shantinath Ghongadi, Kousik Ganesan, Zhian He, Jingbin Feng
  • Patent number: 8257781
    Abstract: A main reservoir holds cool reactant liquid. A reaction vessel for treating a substrate is connected to the main reservoir by a feed conduit. A heater is configured to heat reactant liquid in the feed conduit before the liquid enters the reaction vessel. Preferably, the heater is a microwave heater. A recycle conduit connects the reaction vessel with the main reservoir. Preferably, a recycle cooler cools reactant liquid in the recycle conduit before the liquid returns to the main reservoir. Preferably, an accumulation vessel is integrated in the feed conduit for accumulating, heating, conditioning and monitoring reactant liquid before it enters the reaction vessel. Preferably, a recycle accumulator vessel is integrated in the recycle conduit to accommodate reactant liquid as it empties out of the reaction vessel.
    Type: Grant
    Filed: August 11, 2005
    Date of Patent: September 4, 2012
    Assignee: Novellus Systems, Inc.
    Inventors: Eric G. Webb, Steven T. Mayer, David Mark Dinneen, Edmund B. Minshall, Christopher M. Bartlett, R. Marshall Stowell, Mark T. Winslow, Avishai Kepten, Jingbin Feng, Norman D. Kaplan, Richard K. Lyons, John B. Alexy
  • Publication number: 20120181170
    Abstract: Methods, apparatuses, and various apparatus components, such as base plates, lipseals, and contact ring assemblies are provided for reducing contamination of the contact area in the apparatuses. Contamination may happen during removal of semiconductor wafers from apparatuses after the electroplating process. In certain embodiments, a base plate with a hydrophobic coating, such as polyamide-imide (PAI) and sometimes polytetrafluoroethylene (PTFE), are used. Further, contact tips of the contact ring assembly may be positioned further away from the sealing lip of the lipseal. In certain embodiments, a portion of the contact ring assembly and/or the lipseal also include hydrophobic coatings.
    Type: Application
    Filed: March 28, 2012
    Publication date: July 19, 2012
    Inventors: Vinay Prabhakar, Bryan L. Buckalew, Kousik Ganesan, Shantinath Ghongadi, Zhian He, Steven T. Mayer, Robert Rash, Jonathan D. Reid, Yuichi Takada, James R. Zibrida