Patents by Inventor Su Wei
Su Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11205827Abstract: Provided is a rapid over-the-air (OTA) production line test platform, including a device under test (DUT), an antenna array and two reflecting plates. The DUT has a beamforming function. The antenna array is arranged opposite to the DUT, and emits beams with beamforming. Two reflecting plates are disposed opposite to each other, and are arranged between the DUT and the antenna array. The beam OTA test of the DUT is carried out by propagation of the beams between the antenna array, the DUT and the two reflecting plates. Accordingly, the test time can be greatly shortened and the cost of test can be effectively reduced. In addition to the above-mentioned rapid OTA production line test platform, platforms for performing the OTA production line test by using horn antenna arrays together with bending waveguides and using a 3D elliptic curve are also provided.Type: GrantFiled: August 14, 2020Date of Patent: December 21, 2021Assignee: TMY Technology Inc.Inventors: Su-Wei Chang, Chueh-Jen Lin, Wen-Tsai Tsai, Shun-Chung Kuo, Yang Tai, Wei-Yang Chen, Chien-Tse Fang, Po-Chia Huang, Jiun-Wei Wu, Yu-Cheng Lin, Shao-Chun Hsu
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Patent number: 11163717Abstract: An apparatus is provided that includes a set of registers, and an interface of a computing block. The computing block includes one of a physical layer block or a media access control layer block. The interface includes one or more pins to transmit asynchronous signals, one or more pins to receive asynchronous signals, and a set of pins to communicate particular signals to access the set of registers, where a set of control and status signals of a defined interface are mapped to respective bits of the set of registers.Type: GrantFiled: July 6, 2020Date of Patent: November 2, 2021Assignee: Intel CorporationInventors: Michelle Jen, Dan Froelich, Debendra Das Sharma, Bruce Tennant, Quinn Devine, Su Wei Lim
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Publication number: 20210294492Abstract: An electronic device, a fingerprint sensing control method and a fingerprint scanning control method are provided. A sensing region of a display panel is divided into a plurality of fingerprint zones. The electronic device determines at least one target fingerprint zone from the fingerprint zones according to a touched area. The electronic device scans the at least one target fingerprint zone to control the at least one target fingerprint zone for performing fingerprint sensing. The electronic device performs an accelerated scanning operation. The accelerated scanning operation includes: setting a scanning speed corresponding to at least one target scanning group coupled to at least the touched area to a first speed; and setting a scanning speed corresponding to one or more scanning groups other than the at least one target scanning group to a second speed higher than the first speed.Type: ApplicationFiled: June 3, 2021Publication date: September 23, 2021Applicant: Novatek Microelectronics Corp.Inventors: Shih-Cheng Chen, Cho-Hsuan Jhang, Chih-Peng Hsia, Shiang-Fei Wang, Su-Wei Lien
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Patent number: 11105305Abstract: In some examples, a fuel injector rail assembly may include a fuel rail including a tubular body, with a fuel outlet passage formed through a wall of the tubular body. An injector cup may be connected to the tubular body and may include an injector chamber configured to receive a fuel injector. A first fuel passage formed in the injector cup may include a first diameter, and the first fuel passage may be connected to the fuel outlet passage of the tubular body. Additionally, a second fuel passage may be formed in the injector cup between the first fuel passage and the injector chamber. The second fuel passage may have a second diameter that is smaller than the first diameter of the first fuel passage.Type: GrantFiled: April 22, 2020Date of Patent: August 31, 2021Assignee: HITACHI ASTEMO AMERICAS, INC.Inventors: Anthony Boone, Prashanth Avireddi, Malcolm Mizuba, Su-Wei Sung, Minoru Hashida
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Patent number: 11093080Abstract: An electronic device and a fingerprint sensing control method thereof are provided. A sensing region of a display panel is divided into a plurality of fingerprint zones. The electronic device determines at least one target fingerprint zone from the fingerprint zones according to a touched area. The electronic device scans the at least one target fingerprint zone for performing fingerprint sensing. The electronic device performs an accelerated reading operation. The accelerated reading operation includes: reading at least one sensing signal from the at least one target fingerprint zone; and skipping reading at least one of the fingerprint zones other than the at least one target fingerprint zone among the fingerprint zones.Type: GrantFiled: December 24, 2019Date of Patent: August 17, 2021Assignee: Novatek Microelectronics Corp.Inventors: Shih-Cheng Chen, Cho-Hsuan Jhang, Chih-Peng Hsia, Shiang-Fei Wang, Su-Wei Lien
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Method, apparatus, and system for power management on a CPU die via clock request messaging protocol
Patent number: 11016549Abstract: Aspects of the embodiments are directed to systems, methods, and apparatuses for controlling power management states using a clock request message across a 3.3 volt GPIO pin. Systems can include a CPU root port to transmit to a platform controller hub (PCH) compliant with a PCIe protocol, a first clock request message, the first clock request message comprising a first bit set to assert a clock request transmit (CLKREQ TX assert) on a 3.3 volt general purpose input/output (GPIO) pin local to the PCH; detect that a connected device is entering into a power management state; and transmit, from the CPU root port, to the PCH, a second clock request message, the second clock request message comprising the first bit set to deassert the clock request transmit (CLKREQ TX deassert) and a second bit to assert a clock request protocol (CLKREQ#) on a 3.3 volt GPIO pin.Type: GrantFiled: January 12, 2018Date of Patent: May 25, 2021Assignee: Intel CorporationInventors: Poh Thiam Teoh, Mikal C. Hunsaker, Su Wei Lim, Gim Chong Lee, Hooi Kar Loo, Shashitheren Kerisnan, Siang Lin Tan, Ming Chew Lee, Ngeok Kuan Wai, Li Len Lim -
Publication number: 20210081640Abstract: The present invention provides a control method for an optical fingerprint sensor and a touch controller. The optical fingerprint sensor includes a plurality of pixels, and each of the pixels has a first control signal line and a second control signal line. Each of the pixels is further coupled to a first voltage source line, a second voltage source line and a sensing line. The control method includes the step of applying an anti-loading driving (ALD) signal on at least one of the first control signal line, the second control signal line, the first voltage source line, the second voltage source line and the sensing line when the touch controller is in a touch operation period.Type: ApplicationFiled: December 1, 2020Publication date: March 18, 2021Inventors: Tsen-Wei Chang, Chih-Peng Hsia, Wei-Lun Shih, Hong-Chu Chen, Su-Wei Lien, Sheng-Wen Hsiao, Liang-Chi Cheng
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Publication number: 20210056067Abstract: An apparatus is provided that includes a set of registers, and an interface of a computing block. The computing block includes one of a physical layer block or a media access control layer block. The interface includes one or more pins to transmit asynchronous signals, one or more pins to receive asynchronous signals, and a set of pins to communicate particular signals to access the set of registers, where a set of control and status signals of a defined interface are mapped to respective bits of the set of registers.Type: ApplicationFiled: July 6, 2020Publication date: February 25, 2021Applicant: Intel CorporationInventors: Michelle Jen, Dan Froelich, Debendra Das Sharma, Bruce Tennant, Quinn Devine, Su Wei Lim
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Publication number: 20210050643Abstract: A transition structure for millimeter wave is provided. The transition structure includes a first layer signal element coupled to an end of a first transmission line and a plurality of first layer ground elements surrounding the end of the first transmission line equidistantly from the end of the first transmission line and disposed along two opposite sides of a strip body of the first transmission line equidistantly from the strip body of the first transmission line. The transition structure further includes an intermediate layer signal element coupled to the first layer signal element and a plurality of intermediate layer ground elements surrounding the intermediate layer signal element quasi-coaxially. A multilayer transition structure including a multilayer structure and the transition structure is also provided. Therefore, the problem of operating frequency caused by the thickness of the multilayer structure can be overcome, thereby increasing the resonance frequency of the multilayer structure.Type: ApplicationFiled: August 13, 2020Publication date: February 18, 2021Inventors: Su-Wei Chang, Chueh-Jen Lin, Wen-Tsai Tsai, Tzu-Chieh Hung, Yang Tai, Chien-Tse Fang, Po-Chia Huang, Tzu-Wen Chiang, Shao-Chun Hsu, Yu-Cheng Lin, Wei-Yang Chen
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Publication number: 20210050923Abstract: Provided is a rapid over-the-air (OTA) production line test platform, including a device under test (DUT), an antenna array and two reflecting plates. The DUT has a beamforming function. The antenna array is arranged opposite to the DUT, and emits beams with beamforming. Two reflecting plates are disposed opposite to each other, and are arranged between the DUT and the antenna array. The beam OTA test of the DUT is carried out by propagation of the beams between the antenna array, the DUT and the two reflecting plates. Accordingly, the test time can be greatly shortened and the cost of test can be effectively reduced. In addition to the above-mentioned rapid OTA production line test platform, platforms for performing the OTA production line test by using horn antenna arrays together with bending waveguides and using a 3D elliptic curve are also provided.Type: ApplicationFiled: August 14, 2020Publication date: February 18, 2021Inventors: Su-Wei Chang, Chueh-Jen Lin, Wen-Tsai Tsai, Shun-Chung Kuo, Yang Tai, Wei-Yang Chen, Chien-Tse Fang, Po-Chia Huang, Jiun-Wei Wu, Yu-Cheng Lin
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Publication number: 20210050674Abstract: An antennas-in-package (AiP) verification board is provided, which includes a carrier board configured for disposing an antenna array or an electronic circuit; and a plurality of SMPM connectors. The plurality of SMPM connectors are arranged in an array on the carrier board and electrically connected with the antenna array or the electronic circuit of the carrier board for testing the characteristics of the antenna array on the carrier board or the characteristics of the electronic circuit on the carrier board. The AiP verification board is fixed on a beamforming test platform. In addition to the aforementioned AiP verification board, an AiP verification board including a plurality of adaptor structures and an AiP verification board including a plurality of connectors and a plurality of adaptor structures are also provided.Type: ApplicationFiled: August 14, 2020Publication date: February 18, 2021Inventors: Su-Wei Chang, Chueh-Jen Lin, Wen-Tsai Tsai, Tzu-Chieh Hung, Yang Tai, Chien-Tse Fang, Po-Chia Huang, Te-Liang Sun, Ying-Yen Lu
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Publication number: 20200409899Abstract: Systems, methods, and devices can include a first die comprising a first arbitration and multiplexing logic, a first protocol stack associated with a first interconnect protocol, and a second protocol stack associated with a second interconnect protocol. A second die comprising a second arbitration and multiplexing logic. A multilane link connects the first die to the second die. The second arbitration and multiplexing logic can send a request to the first arbitration and multiplexing logic to change a first virtual link state associated with the first protocol stack. The first arbitration and multiplexing logic can receive, from across the multilane link, the request from the first die indicating a request to change the first virtual link state; determine that the first interconnect protocol is ready to change a physical link state; and change the first virtual link state according to the received request while maintaining a second virtual link state.Type: ApplicationFiled: September 9, 2020Publication date: December 31, 2020Applicant: Intel CorporationInventors: Joon Teik Hor, Ting Lok Song, Mahesh Wagh, Su Wei Lim
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Publication number: 20200342196Abstract: The present invention provides a control method for an optical fingerprint sensor. The optical fingerprint sensor includes a plurality of pixels, and each of the pixels has a first control signal line and a second control signal line. Each of the pixels is further coupled to a first voltage source line, a second voltage source line and a sensing line. The control method includes a plurality of steps, and the steps are applying a first anti-loading driving (ALD) signal on the second control signal line, and applying a second ALD signal on at least one of the first control signal line, the first voltage source line, the second voltage source line and the sensing line.Type: ApplicationFiled: June 20, 2020Publication date: October 29, 2020Inventors: Tsen-Wei Chang, Chih-Peng Hsia, Wei-Lun Shih, Hong-Chu Chen, Su-Wei Lien, Sheng-Wen Hsiao, Liang-Chi Cheng
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Publication number: 20200332750Abstract: In some examples, a fuel injector rail assembly may include a fuel rail including a tubular body, with a fuel outlet passage formed through a wall of the tubular body. An injector cup may be connected to the tubular body and may include an injector chamber configured to receive a fuel injector. A first fuel passage formed in the injector cup may include a first diameter, and the first fuel passage may be connected to the fuel outlet passage of the tubular body. Additionally, a second fuel passage may be formed in the injector cup between the first fuel passage and the injector chamber. The second fuel passage may have a second diameter that is smaller than the first diameter of the first fuel passage.Type: ApplicationFiled: April 22, 2020Publication date: October 22, 2020Inventors: Anthony BOONE, Prashanth AVIREDDI, Malcolm MIZUBA, Su-Wei SUNG, Minoru HASHIDA
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Patent number: 10776302Abstract: Systems, methods, and devices can include a first die comprising a first arbitration and multiplexing logic, a first protocol stack associated with a first interconnect protocol, and a second protocol stack associated with a second interconnect protocol. A second die comprising a second arbitration and multiplexing logic. A multilane link connects the first die to the second die. The second arbitration and multiplexing logic can send a request to the first arbitration and multiplexing logic to change a first virtual link state associated with the first protocol stack. The first arbitration and multiplexing logic can receive, from across the multilane link, the request from the first die indicating a request to change the first virtual link state; determine that the first interconnect protocol is ready to change a physical link state; and change the first virtual link state according to the received request while maintaining a second virtual link state.Type: GrantFiled: April 2, 2019Date of Patent: September 15, 2020Assignee: Intel CorporationInventors: Joon Teik Hor, Ting Lok Song, Mahesh Wagh, Su Wei Lim
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Patent number: 10706003Abstract: An apparatus is provided that includes a set of registers, and an interface of a computing block. The computing block includes one of a physical layer block or a media access control layer block. The interface includes one or more pins to transmit asynchronous signals, one or more pins to receive asynchronous signals, and a set of pins to communicate particular signals to access the set of registers, where a set of control and status signals of a defined interface are mapped to respective bits of the set of registers.Type: GrantFiled: February 4, 2019Date of Patent: July 7, 2020Assignee: Intel CorporationInventors: Michelle Jen, Daniel Froelich, Debendra Das Sharma, Bruce Tennant, Quinn Devine, Su Wei Lim
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Publication number: 20200210065Abstract: An electronic device and a fingerprint sensing control method thereof are provided. A sensing region of a display panel is divided into a plurality of fingerprint zones. The electronic device determines at least one target fingerprint zone from the fingerprint zones according to a touched area. The electronic device scans the at least one target fingerprint zone for performing fingerprint sensing. The electronic device performs an accelerated reading operation. The accelerated reading operation includes: reading at least one sensing signal from the at least one target fingerprint zone; and skipping reading at least one of the fingerprint zones other than the at least one target fingerprint zone among the fingerprint zones.Type: ApplicationFiled: December 24, 2019Publication date: July 2, 2020Applicant: Novatek Microelectronics Corp.Inventors: Shih-Cheng Chen, Cho-Hsuan Jhang, Chih-Peng Hsia, Shiang-Fei Wang, Su-Wei Lien
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Publication number: 20200210668Abstract: An electronic device and a fingerprint sensing control method thereof are provided. The electronic device includes a touch control circuit and a fingerprint sensing control circuit. The touch control circuit is coupled to the display panel. The touch control circuit performs touch detection on the display panel to obtain a finger press area corresponding to the finger on the display panel. The fingerprint sensing control circuit is coupled to the touch control circuit to obtain a finger press area. The fingerprint sensing control circuit is coupled to the display panel to perform a fingerprint sensing control on a display panel. The fingerprint sensing control circuit scans the finger press area on the display panel in a first direction during a first period and scans the finger press area in a second direction different from the first direction during a second period after the first period.Type: ApplicationFiled: December 25, 2019Publication date: July 2, 2020Applicant: Novatek Microelectronics Corp.Inventors: Cho-Hsuan Jhang, Shih-Cheng Chen, Su-Wei Lien, Chih-Peng Hsia, Shiang-Fei Wang
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Publication number: 20190347218Abstract: In one embodiment, an apparatus includes an arbitration circuit with virtual link state machines to virtualize link states associated with multiple communication protocol stacks. The apparatus further includes a physical circuit coupled to the arbitration circuit and to interface with a physical link, where the physical circuit, in response to a retraining of the physical link, is to cause a plurality of the virtual link state machines to synchronize with corresponding virtual link state machines associated with a second side of the physical link, and where at least one of the communication protocol stacks is to remain in a low power state during the retraining and the synchronization. Other embodiments are described and claimed.Type: ApplicationFiled: May 30, 2019Publication date: November 14, 2019Inventors: Joon Teik Hor, Ting Lok Song, Mahesh Wagh, Su Wei Lim
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Publication number: 20190303338Abstract: An apparatus is provided that includes a set of registers, and an interface of a computing block. The computing block includes one of a physical layer block or a media access control layer block. The interface includes one or more pins to transmit asynchronous signals, one or more pins to receive asynchronous signals, and a set of pins to communicate particular signals to access the set of registers, where a set of control and status signals of a defined interface are mapped to respective bits of the set of registers.Type: ApplicationFiled: February 4, 2019Publication date: October 3, 2019Applicant: Intel CorporationInventors: Michelle Jen, Daniel Froelich, Debendra Das Sharma, Bruce Tennant, Quinn Devine, Su Wei Lim