Patents by Inventor Subhashish Mukherjee

Subhashish Mukherjee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10819396
    Abstract: In described examples, a first die includes a primary LC tank oscillator having a natural frequency of oscillation to induce a forced oscillation in a secondary LC tank oscillator of a separate second die via a magnetic coupling between the primary LC tank oscillator and the secondary LC tank oscillator.
    Type: Grant
    Filed: January 27, 2020
    Date of Patent: October 27, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Subhashish Mukherjee, Venugopal Gopinathan
  • Patent number: 10804845
    Abstract: For communication across a capacitively coupled channel, an example circuit includes a first plate substantially parallel to a substrate, forming a first capacitance intermediate the first plate and the substrate. A second plate is substantially parallel to the substrate and the first plate, the first plate intermediate the substrate and the second plate. A third plate is substantially parallel to the substrate, forming a second capacitance intermediate the third plate and the substrate. A fourth plate is substantially parallel to the substrate and the third plate, the third plate intermediate the substrate and the fourth plate. An inductor is connected to the first plate and the third plate, the inductor to, in combination with the first capacitance and the second capacitance, form an LC amplifier.
    Type: Grant
    Filed: October 14, 2019
    Date of Patent: October 13, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Subhashish Mukherjee, Kumar Anurag Shrivastava, Sreeram Subramanyam Nasum
  • Publication number: 20200313945
    Abstract: Methods and apparatus for performing a high speed phase demodulation scheme using a low bandwidth phase-lock loop are disclosed. An example apparatus includes a low bandwidth phase lock loop to lock to a data signal at a first phase, the data signal capable of oscillating at the first phase or a second phase; and output a first output signal at the first phase and a second output signal at the second phase, the first output signal or the second output signal being utilized in a feedback loop of the low bandwidth phase lock loop. The example apparatus further includes a fast phase change detection circuit coupled to the low bandwidth phase lock loop to determine whether the data signal is oscillating at the first phase or the second phase.
    Type: Application
    Filed: June 12, 2020
    Publication date: October 1, 2020
    Inventors: Subhashish Mukherjee, Abhijit Anant Patki, Madhulatha Bonu, Kumar Anurag Shrivastava
  • Publication number: 20200266131
    Abstract: A coupling device provides galvanic isolation using a leadframe that is configured to support two integrated circuit chips in a coplanar manner. Each chip contains an inductive coupling coil. The lead frame includes a set of bond pads for attaching bond wires to couple to the two integrated circuit chips. Two separated die attach pads support the two chips. Each die attach pad is configured to support one of the two integrated circuit chips with a plurality of cantilevered fingers.
    Type: Application
    Filed: May 5, 2020
    Publication date: August 20, 2020
    Inventors: Benjamin Michael Sutton, Sreenivasan K. Koduri, Subhashish Mukherjee
  • Patent number: 10728068
    Abstract: Methods and apparatus for performing a high speed phase demodulation scheme using a low bandwidth phase-lock loop are disclosed. An example apparatus includes a low bandwidth phase lock loop to lock to a data signal at a first phase, the data signal capable of oscillating at the first phase or a second phase; and output a first output signal at the first phase and a second output signal at the second phase, the first output signal or the second output signal being utilized in a feedback loop of the low bandwidth phase lock loop. The example apparatus further includes a fast phase change detection circuit coupled to the low bandwidth phase lock loop to determine whether the data signal is oscillating at the first phase or the second phase.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: July 28, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Subhashish Mukherjee, Abhijit Anant Patki, Madhulatha Bonu, Kumar Anurag Shrivastava
  • Patent number: 10720946
    Abstract: A radio frequency transmitter includes a digital-to-analog converter (DAC), a load circuit, and a modulator circuit. The load circuit is coupled to an output of the DAC. The modulator circuit is coupled to the DAC and the load circuit. The modulator circuit includes a driver circuit configured to provide a bias voltage to the load circuit, and an amplifier configured to receive an output of the DAC biased by an output of the load circuit.
    Type: Grant
    Filed: March 22, 2019
    Date of Patent: July 21, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jagdish Chand, Subhashish Mukherjee
  • Publication number: 20200162130
    Abstract: In described examples, a first die includes a primary LC tank oscillator having a natural frequency of oscillation to induce a forced oscillation in a secondary LC tank oscillator of a separate second die via a magnetic coupling between the primary LC tank oscillator and the secondary LC tank oscillator.
    Type: Application
    Filed: January 27, 2020
    Publication date: May 21, 2020
    Inventors: Subhashish Mukherjee, Venugopal Gopinathan
  • Publication number: 20200161184
    Abstract: An example integrated circuit die includes: lower level conductor layers, lower level insulator layers between the lower level conductor layers, lower level vias extending vertically through the lower level insulator layers, upper level conductor layers overlying the lower level conductor layers, upper level insulator layers between and surrounding the upper level conductor layers, upper level vias; at least two scribe seals arranged to form a vertical barrier extending vertically from the semiconductor substrate to a passivation layer at an upper surface of the integrated circuit die; and at least one opening extending vertically through one of the at least two scribe seals and extending through: the upper level conductor layers, the upper level via layers, the lower level conductor layers, and the lower level via layers.
    Type: Application
    Filed: January 27, 2020
    Publication date: May 21, 2020
    Inventors: Subhashish Mukherjee, Raja Selvaraj, Venugopal Gopinathan
  • Patent number: 10643929
    Abstract: A coupling device provides galvanic isolation using a leadframe that is configured to support two integrated circuit chips in a coplanar manner. Each chip contains an inductive coupling coil. The lead frame includes a set of bond pads for attaching bond wires to couple to the two integrated circuit chips. Two separated die attach pads support the two chips. Each die attach pad is configured to support one of the two integrated circuit chips with a plurality of cantilevered fingers.
    Type: Grant
    Filed: May 12, 2014
    Date of Patent: May 5, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Benjamin Michael Sutton, Sreenivasan K Koduri, Subhashish Mukherjee
  • Patent number: 10627430
    Abstract: A reduced-stage feedback-based envelope detector includes, for example, an input rectifier for rectifying a received modulated input signal and an amplifier for receiving the rectified modulated input signal at an input node. The amplifier compares the rectified modulated input signal with a reference signal, filters the rectified modulated input signal at the input node, and generates an envelope detection signal in response to the comparison and the filtering of the rectified modulated input signal. In an embodiment, the gain of the amplifier is independently determined from the bandwidth of the amplifier.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: April 21, 2020
    Inventors: Subhashish Mukherjee, Anoop Narayan Bhat
  • Publication number: 20200067453
    Abstract: Methods and apparatus generate an oscillating output signal having a voltage swing greater than a voltage swing across nodes of active devices. An example oscillator includes a tank to generate an oscillating output signal in response receiving an edge of an enable signal; a feedback generator including a first gain stage forming a first feedback loop with the tank, the first feedback loop providing a first charge to maintain the oscillating output signal and a second gain stage forming a second feedback loop with the tank, the second feedback loop providing a second charge to maintain the oscillating output signal, the first and second charges combining with the oscillating output signal to generate a high voltage swing; and an attenuator connected between the tank and the feedback generator to isolate the tank from active components of the feedback generator.
    Type: Application
    Filed: October 31, 2019
    Publication date: February 27, 2020
    Inventors: Subhashish Mukherjee, Kumar Anurag Shrivastava, Madhulatha Bonu
  • Publication number: 20200044605
    Abstract: For communication across a capacitively coupled channel, an example circuit includes a first plate substantially parallel to a substrate, forming a first capacitance intermediate the first plate and the substrate. A second plate is substantially parallel to the substrate and the first plate, the first plate intermediate the substrate and the second plate. A third plate is substantially parallel to the substrate, forming a second capacitance intermediate the third plate and the substrate. A fourth plate is substantially parallel to the substrate and the third plate, the third plate intermediate the substrate and the fourth plate. An inductor is connected to the first plate and the third plate, the inductor to, in combination with the first capacitance and the second capacitance, form an LC amplifier.
    Type: Application
    Filed: October 14, 2019
    Publication date: February 6, 2020
    Inventors: Subhashish Mukherjee, Kumar Anurag Shrivastava, Sreeram Subramanyam Nasum
  • Patent number: 10546780
    Abstract: An example integrated circuit die includes: a plurality of lower level conductor layers, a plurality of lower level insulator layers between the plurality of lower level conductor layers, a plurality of lower level vias extending vertically through the lower level insulator layers, a plurality of upper level conductor layers overlying the lower level conductor layers, a plurality of upper level insulator layers between and surrounding the upper level conductor layers, a plurality of upper level vias; at least two scribe seals arranged to form a vertical barrier extending vertically from the semiconductor substrate to a passivation layer at an upper surface of the integrated circuit die; and at least one opening extending vertically through one of the at least two scribe seals and extending through: the upper level conductor layers, the upper level via layers, the lower level conductor layers, and the lower level via layers.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: January 28, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Subhashish Mukherjee, Raja Selvaraj, Venugopal Gopinathan
  • Patent number: 10547352
    Abstract: In described examples, a first die includes a primary LC tank oscillator having a natural frequency of oscillation to induce a forced oscillation in a secondary LC tank oscillator of a separate second die via a magnetic coupling between the primary LC tank oscillator and the secondary LC tank oscillator.
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: January 28, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Subhashish Mukherjee, Venugopal Gopinathan
  • Publication number: 20190379412
    Abstract: A radio frequency transmitter includes a digital-to-analog converter (DAC), a load circuit, and a modulator circuit. The load circuit is coupled to an output of the DAC. The modulator circuit is coupled to the DAC and the load circuit. The modulator circuit includes a driver circuit configured to provide a bias voltage to the load circuit, and an amplifier configured to receive an output of the DAC biased by an output of the load circuit.
    Type: Application
    Filed: March 22, 2019
    Publication date: December 12, 2019
    Inventors: Jagdish CHAND, Subhashish MUKHERJEE
  • Patent number: 10483909
    Abstract: Methods and apparatus are disclosed to generate an oscillating output signal having a voltage swing greater than a voltage swing across nodes of active devices. An example oscillator includes a tank to generate an oscillating output signal in response receiving an edge of an enable signal; a feedback generator including a first gain stage forming a first feedback loop with the tank, the first feedback loop providing a first charge to maintain the oscillating output signal and a second gain stage forming a second feedback loop with the tank, the second feedback loop providing a second charge to maintain the oscillating output signal, the first and second charges combining with the oscillating output signal to generate a high voltage swing; and an attenuator connected between the tank and the feedback generator to isolate the tank from active components of the feedback generator.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: November 19, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Subhashish Mukherjee, Kumar Anurag Shrivastava, Madhulatha Bonu
  • Patent number: 10447202
    Abstract: Apparatus for communication across a capacitively coupled channel are disclosed herein. An example circuit includes a first plate substantially parallel to a substrate, thereby forming a first capacitance intermediate the first plate and the substrate. A second plate is substantially parallel to the substrate and the first plate, the first plate intermediate the substrate and the second plate. A third plate is substantially parallel to the substrate, thereby forming a second capacitance intermediate the third plate and the substrate. A fourth plate is substantially parallel to the substrate and the third plate, the third plate intermediate the substrate and the fourth plate. An inductor is connected to the first plate and the third plate, the inductor to, in combination with the first capacitance and the second capacitance, form an LC amplifier.
    Type: Grant
    Filed: February 8, 2017
    Date of Patent: October 15, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Subhashish Mukherjee, Kumar Anurag Shrivastava, Sreeram Subramanyam Nasum
  • Patent number: 10382078
    Abstract: At least some embodiments are directed to a receiver system that comprises a first oscillation module configured to provide oscillating signals of differing frequencies and a second oscillation module configured to provide other oscillating signals of the differing frequencies. The second oscillation module is configured to produce less noise than the first oscillation module. A controller is coupled to the first and second oscillation modules and configured to selectively activate and deactivate each of the first and second oscillation modules based on signal strengths of primary signals received via a wireless medium and based on signal strengths of interference signals received via the wireless medium.
    Type: Grant
    Filed: April 13, 2017
    Date of Patent: August 13, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Subhashish Mukherjee, Yogesh Darwhekar, Nagaraj V. Dixit, Raghu Ganesan
  • Patent number: 10284238
    Abstract: A radio frequency transmitter includes a digital-to-analog converter (DAC), a load circuit, and a modulator circuit. The load circuit is coupled to an output of the DAC. The modulator circuit is coupled to the DAC and the load circuit. The modulator circuit includes a driver circuit configured to provide a bias voltage to the load circuit, and an amplifier configured to receive an output of the DAC biased by an output of the load circuit.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: May 7, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jagdish Chand, Subhashish Mukherjee
  • Patent number: 10236826
    Abstract: A down converter, including first and second biasing circuits, mixer, and transformer coupled to receive amplifier output signal. The first and second biasing circuits each include a biasing transistor and a first and second node, respectively. Mixer includes first and second transistors coupled to first node and third and fourth transistors coupled to second node. The second and fourth transistors are coupled to a third node. The first and third transistors are coupled to a fourth node. Mixer also includes a first resistor coupled to the fourth node and a supply voltage node and a second resistor coupled to the third node and a supply voltage node. Transformer includes a primary winding coupled to receive the amplifier output signal and to a supply voltage and a secondary winding coupled to mixer and first biasing circuit at first node and coupled to mixer and second biasing circuit at second node.
    Type: Grant
    Filed: June 6, 2018
    Date of Patent: March 19, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Yogesh Darwhekar, Apoorva Bhatia, Subhashish Mukherjee