Patents by Inventor Suhwan Kim

Suhwan Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250105826
    Abstract: A voltage mode relaxation oscillator includes a bandgap reference (BGR) circuit configured to generate a BGR voltage that does not depend on temperature and a BGR current that depends on temperature; a control voltage generating circuit configured to generate a control voltage that does not depend on temperature based on the BGR voltage; a reference current generating circuit configured to generate a reference current that does not depend on temperate based on the BGR current; and an oscillator circuit configured to generate a clock signal that does not depend on temperature based on the control voltage and the reference current.
    Type: Application
    Filed: August 27, 2024
    Publication date: March 27, 2025
    Applicant: Seoul National University R&DB Foundation
    Inventors: Jaekwang YUN, Suhwan KIM
  • Publication number: 20250088156
    Abstract: An instrumentation amplifier includes an input chopping circuit configured to convert differential input voltages into differential chopping input voltages according to a chopping signal; a compensation voltage input circuit configured to generate differential compensation voltages according to differential compensation signals; a compensation chopping circuit configured to generated signals by performing chopping operation on the differential compensation voltages according to the chopping signal and to provide the signals to the compensation voltage input circuit; an amplifier circuit configured to generate differential output voltages from the differential chopping input voltages and the differential compensation voltages; a modulation circuit configured to modulate the differential output voltages; an output chopping circuit configured to generate a bitstream signal by converting phase of an output of the modulation circuit according to the chopping signal; and a filter circuit configured to filter the bi
    Type: Application
    Filed: August 8, 2024
    Publication date: March 13, 2025
    Applicant: Seoul National University R&DB Foundation
    Inventors: Junyoung PARK, Suhwan KIM
  • Patent number: 12191476
    Abstract: A solid polymer electrolyte and a method for preparing the solid polymer electrolyte are disclosed. More particularly, a solid polymer electrolyte including a multifunctional acrylate-based polymer, a C1 to C10 polyalkylene oxide, a flame-retardant polymer, a lithium salt, and a non-aqueous solvent, wherein the multifunctional acrylate-based polymer is cross-linked with the polyalkylene oxide to form semi-interpenetrating polymer networks (semi-IPN), and the flame-retardant polymer is present blended with the semi-interpenetrating polymer networks of the multifunctional acrylate-based polymer and the polyalkylene oxide, which shows high solid content and flame-retardant characteristics, and a method for preparing the same.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: January 7, 2025
    Assignee: LG ENERGY SOLUTION, LTD.
    Inventors: Daeil Kim, Jonghyun Chae, Suhwan Kim, Sung Chul Lim, Jihoon Ahn
  • Patent number: 12191831
    Abstract: An amplifying device includes a main amplifier; a first feedback circuit coupled between an input terminal of the main amplifier and an output terminal of the main amplifier; an input coupling circuit coupled between the input terminal of the main amplifier and a first node; and an amplifying feedback circuit coupled between the output terminal of the main amplifier and the first node, wherein the first feedback circuit and the amplifying feedback circuit are negative feedback circuits.
    Type: Grant
    Filed: February 3, 2022
    Date of Patent: January 7, 2025
    Assignee: Seoul National University R&DB Foundation
    Inventors: Junyoung Park, Suhwan Kim
  • Patent number: 12189028
    Abstract: A semiconductor device includes a signal conversion circuit configured to convert a sensing current provided from a sensing element into a sensing voltage; an analog-to-digital converter (ADC) configured to convert the sensing voltage to a digital value; and a driving circuit configured to drive a light emitting element, wherein the ADC generates a digital value corresponding to proximity to an object by performing a primary operation comparing a ramp signal varying with time and the sensing voltage while the light emitting element is not driven and a secondary operation comparing the ramp signal and the sensing voltage while the light emitting element is driven.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: January 7, 2025
    Assignee: Seoul National University R&DB Foundation
    Inventors: Hyunjong Kim, Cyuyeol Rhee, Suhwan Kim
  • Publication number: 20240429816
    Abstract: Some embodiments include an apparatus having a first node to receive a connection from a gate of a first transistor of a voltage converter; a second node to receive a connection from a gate of a second transistor of the voltage converter; a third node to receive a connection from a node between the first and second transistors; a capacitor including a first plate coupled to the third node; a first driver including an output node coupled to the first node, a first voltage node coupled to the first plate of the capacitor, and a second voltage node coupled to a second plate of the capacitor; a second driver including an output node coupled to the second node; and a circuit including third transistors coupled in series between the second voltage node and a third voltage node.
    Type: Application
    Filed: June 26, 2023
    Publication date: December 26, 2024
    Inventors: Nachiket Desai, Suhwan Kim
  • Publication number: 20240421591
    Abstract: Techniques and mechanisms for a DC-DC voltage converter to mitigate a risk of damage to circuitry due to electrostatic discharge (ESD). In an embodiment, a protection circuit of the DC-DC voltage converter comprises a pull-up circuit and a pull-down circuit which are coupled in series between a first interconnect and a second interconnect, which are to receive a first supply voltage and a second supply voltage, respectively. A voltage divider comprises capacitors which are coupled in series with each other between the first interconnect and the second interconnect. Control circuitry is coupled with the voltage divider, and is further coupled to automatically configure a first operational mode based on an ESD event. During the first mode, the pull-up circuit is disabled and the pull-down circuit is enabled. In another embodiment, a resistor-capacitor (RC) circuit automatically transitions the protection circuit from the first mode.
    Type: Application
    Filed: June 13, 2023
    Publication date: December 19, 2024
    Applicant: Intel Corporation
    Inventors: Harshit Dhakad, Yossi Shoshany, Sergey Sofer, Suhwan Kim, Krzysztof Domanski
  • Publication number: 20240370188
    Abstract: A method of operating a storage device which communicates with a host device includes allocating a plurality of unit zone regions each having a unit zone size, each of the plurality of unit zone regions being mapped to at least one corresponding memory blocks among a plurality of memory blocks in the storage device and supporting a sequential write in compliance with a zoned namespace (ZNS) standard, receiving a first request indicating an allocation operation of a first zoned namespace in compliance with the ZNS standard from the host device, determining a first mapping ratio by dividing a first zone size of the first zoned namespace by the unit zone size, based on the first request, and storing the first mapping ratio in a zone metadata table of the storage device.
    Type: Application
    Filed: December 15, 2023
    Publication date: November 7, 2024
    Inventors: Suhwan Kim, Eunji Kang, Hyunkoo Kim, Dongki Kim, Sihoon Choi
  • Patent number: 12085595
    Abstract: A read-out circuit includes an operational amplifier configured to receive input voltage via a positive input terminal; a feedback capacitor connected between an output terminal of the operational amplifier and a negative input terminal of the operational amplifier; a sensor charging/discharging circuit configured to charge or to discharge a sensor capacitor included in a sensor during a first time; and a switching circuit configured to connect the sensor capacitor and the operational amplifier during a second time after the sensor capacitor is charged or discharged.
    Type: Grant
    Filed: October 13, 2022
    Date of Patent: September 10, 2024
    Assignees: Gwanak Analog CO., LTD, Seoul National University R&DB Foundation
    Inventors: Minsung Kim, Suhwan Kim, Hyunjoong Lee
  • Publication number: 20240223417
    Abstract: An equalizer includes an amplifying adder configured to generate an output signal by operating differential input signals and a signal generated by applying an equalization coefficient to a post data signal; and a comparator configured to generate a current data signal by sampling the output signal according to a clock signal, wherein the amplifying adder has a maximum gain when a difference of the differential input signals is within a predetermined range.
    Type: Application
    Filed: July 12, 2023
    Publication date: July 4, 2024
    Applicant: Seoul National University R&DB Foundation
    Inventors: Jaeyoon KIM, Hyunkyu PARK, Suhwan KIM
  • Publication number: 20240209495
    Abstract: A deposition system, includes: a reaction chamber; a first gas supply unit supplying a first precursor in a liquid state stored in a first main tank to the reaction chamber in a gaseous state; a reactant supply unit supplying a reactant to the reaction chamber; and an exhaust unit discharging an exhaust material, wherein the first gas supply unit includes a first sub tank, a first liquid mass flow controller, and a first vaporizer, the first precursor is supplied to the reaction chamber by passing through the first sub tank, the first liquid mass flow controller, and the first vaporizer, a first automatic refill system operates to periodically fill the first sub tank with the liquid first precursor stored in the first main tank, and the exhaust unit comprises a processing chamber, a pump, and a scrubber to which a plasma pretreatment system is applied.
    Type: Application
    Filed: January 29, 2024
    Publication date: June 27, 2024
    Inventors: Suhwan Kim, Hyunjun Kim, Younglim Park, Dongkwan Baek, Hyungsuk Jung
  • Patent number: 11892327
    Abstract: A read-out circuit includes an operational amplifier configured to receive an input voltage through a positive input terminal; a feedback capacitor connected between an output terminal of the operational amplifier and a negative input terminal of the operational amplifier; a sensor charging and discharging circuit configured to charge or discharge a sensor during a first time; a switching circuit connecting the sensor and the operational amplifier during a second time after the sensor is charged or discharged; and a duty control circuit configured to determine a duty ratio of the first time and the second time according to a capacitance of the sensor.
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: February 6, 2024
    Assignee: Seoul National University R&DB Foundation
    Inventors: Minsung Kim, Hyunjoong Lee, Suhwan Kim
  • Patent number: 11881554
    Abstract: A polymer electrolyte is provided, which includes a polymer including an ethylene oxide unit; and a lithium salt, wherein the terminal of the polymer is substituted with one to four functional groups selected from the group consisting of a nitrogen compound functional group and phosphorus compound functional group, and the terminal of the polymer and the one to four functional groups are linked by one selected from the group consisting of a C2 to C20 alkylene linker, a C2 to C20 ether linker, and a C2 to C20 amine linker. A method for preparing the same is also provided.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: January 23, 2024
    Assignees: LG ENERGY SOLUTION, LTD., POSTECH ACADEMY-INDUSTRY FOUNDATION
    Inventors: Daeil Kim, Moon Jeong Park, Jonghyun Chae, Ha Young Jung, Suhwan Kim, Sung Chul Lim, Jihoon Ahn
  • Patent number: 11881860
    Abstract: A phase mixing circuit for a multi-phase signal includes a jitter cancellation circuit configured to mix phases of a signal input to a first node and a signal input to a second node to produce signals at a third node and a fourth node; and a delay adjustment circuit configured to adjust delays of the signals output from the third node and the fourth node to produce signals at a fifth node and a sixth node.
    Type: Grant
    Filed: November 17, 2022
    Date of Patent: January 23, 2024
    Assignees: SK hynix Inc., Seoul National University R&DB Foundation
    Inventors: Shin-Hyun Jeong, Yongun Jeong, Suhwan Kim
  • Publication number: 20230403000
    Abstract: A phase mixing circuit for a multi-phase signal includes a jitter cancellation circuit configured to mix phases of a signal input to a first node and a signal input to a second node to produce signals at a third node and a fourth node; and a delay adjustment circuit configured to adjust delays of the signals output from the third node and the fourth node to produce signals at a fifth node and a sixth node.
    Type: Application
    Filed: November 17, 2022
    Publication date: December 14, 2023
    Inventors: Shin-Hyun JEONG, Yongun Jeong, Suhwan Kim
  • Patent number: 11774294
    Abstract: An amplifier includes an amplification circuit including an input circuit receiving an input signal and configured to output an output signal by amplifying the input signal; and an offset cancelling circuit configured to cancel offset by controlling the input circuit according to activation control signal and offset control signal, wherein the offset cancelling circuit cancels the offset according to the offset control signal after the activation control signal is activated.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: October 3, 2023
    Assignee: Gwanak Analog CO., LTD.
    Inventor: Suhwan Kim
  • Patent number: 11747371
    Abstract: A current sensing topology uses an amplifier with capacitively coupled inputs in feedback to sense the input offset of the amplifier, which can be compensated for during measurement. The amplifier with capacitively coupled inputs in feedback is used to: operate the amplifier in a region where the input common-mode specifications are relaxed, so that the feedback loop gain and/or bandwidth is higher; operate the sensor from the converter input voltage by employing high-PSRR (power supply rejection ratio) regulators to create a local, clean supply voltage, causing less disruption to the power grid in the switch area; sample the difference between the input voltage and the controller supply, and recreate that between the drain voltages of the power and replica switches; and compensate for power delivery network related (PDN-related) changes in the input voltage during current sensing.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: September 5, 2023
    Assignee: Intel Corporation
    Inventors: Nachiket Desai, Harish Krishnamurthy, Suhwan Kim, Fabrice Paillet
  • Publication number: 20230236765
    Abstract: Disclosed is a method of operating a storage controller which communicates with a host and a non-volatile memory device. The method includes receiving a first state transition request for a device open from the host, performing a first active zone refresh operation of the non-volatile memory device in response to the first state transition request such that a zone, which has an active state before an immediately previous power-off is processed to a sequentially writable state in one block, receiving, by a first buffer memory, first target data to be stored in a first block of a first zone among the plurality of zones from the host depending on a first write request, receiving a first power-off request from the host, during processing the first write request, and storing the first target data in a first power loss protection (PLP) block of the non-volatile memory device.
    Type: Application
    Filed: October 21, 2022
    Publication date: July 27, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Minsik SON, Hyunkoo KIM, Junseok PARK, Suhwan KIM
  • Publication number: 20230216409
    Abstract: A single inductor multiple output DC-to-DC converter may be configured as a buck-boost converter. The converter may include an inductor, a plurality of switches coupled to the inductor to control energizing and deenergizing phases of the inductor, and a plurality of output rails. Each of the plurality of output rails may include at least one switch, which is configured to connect the output rail to the inductor of the buck-boost converter. Depending on the energizing and deenergizing patterns of the inductor, and the state of the one or more switches, the various output rails may be supplied with a plurality of different output voltages and / or output currents. Any of a plurality of regulating strategies may be utilized to further control the output voltages and / or the output currents.
    Type: Application
    Filed: June 26, 2020
    Publication date: July 6, 2023
    Inventors: Ashoke RAVI, Ofir DEGANI, Harish KRISHNAMURTHY, Shahar WOLF, Sally AMIN, Suhwan KIM
  • Patent number: 11695034
    Abstract: A capacitor structure may include a lower electrode on a substrate, a dielectric layer on the substrate, and an upper electrode on the dielectric layer. The lower electrode may include a metal nitride having a chemical formula of M1Ny (M1 is a first metal, and y is a positive real number). The dielectric layer may include a metal oxide and nitrogen (N), the metal oxide having a chemical formula of M2Ox (M2 is a second metal, and x is a positive real number). A maximum value of a detection amount of nitrogen (N) in the dielectric layer may be greater than a maximum value of a detection amount of nitrogen (N) in the lower electrode.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: July 4, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seongyul Park, Jaewan Chang, Suhwan Kim, Hyunjun Kim