Patents by Inventor Suhwan Kim

Suhwan Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11539366
    Abstract: A capacitive transmitter includes a control circuit configured to generate a data signal by delaying input data and to generate a control signal according to the input data and a delayed signal thereof; a capacitor connected between a first node and a transmission node; a driving circuit configured to receive the data signal and to provide an output signal corresponding to the data signal to the first node; and a bias setting circuit configured to set a transmission voltage at the transmission node according to the control signal.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: December 27, 2022
    Assignees: SK hynix Inc., Seoul National University R&DB Foundation
    Inventors: Sangyoon Lee, Jaekwang Yun, Suhwan Kim
  • Publication number: 20220390259
    Abstract: A read-out circuit includes an operational amplifier configured to receive an input voltage through a positive input terminal; a feedback capacitor connected between an output terminal of the operational amplifier and a negative input terminal of the operational amplifier; a sensor charging and discharging circuit configured to charge or discharge a sensor during a first time; a switching circuit connecting the sensor and the operational amplifier during a second time after the sensor is charged or discharged; and a duty control circuit configured to determine a duty ratio of the first time and the second time according to a capacitance of the sensor.
    Type: Application
    Filed: May 31, 2022
    Publication date: December 8, 2022
    Applicant: Seoul National University R&DB Foundation
    Inventors: Minsung KIM, Hyunjoong LEE, Suhwan KIM
  • Publication number: 20220326378
    Abstract: A semiconductor device includes a signal conversion circuit configured to convert a sensing current provided from a sensing element into a sensing voltage; an analog-to-digital converter (ADC) configured to convert the sensing voltage to a digital value; and a driving circuit configured to drive a light emitting element, wherein the ADC generates a digital value corresponding to proximity to an object by performing a primary operation comparing a ramp signal varying with time and the sensing voltage while the light emitting element is not driven and a secondary operation comparing the ramp signal and the sensing voltage while the light emitting element is driven.
    Type: Application
    Filed: April 11, 2022
    Publication date: October 13, 2022
    Applicant: Seoul National University R&DB Foundation
    Inventors: Hyunjong KIM, Cyuyeol RHEE, Suhwan KIM
  • Patent number: 11444278
    Abstract: A positive electrode material for lithium secondary batteries capable of easily doping vanadium oxide with molybdenum, and a method of manufacturing the same are disclosed. The method of manufacturing a positive electrode material for lithium secondary batteries includes (a) reacting vanadium oxide with a water-soluble molybdenum-based compound in the presence of a solvent; and (b) thermally treating the reaction product of (a).
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: September 13, 2022
    Assignee: LG ENERGY SOLUTION, LTD.
    Inventors: Sung Chul Lim, Jonghyun Chae, Suhwan Kim
  • Publication number: 20220254873
    Abstract: A capacitor structure may include a lower electrode on a substrate, a dielectric layer on the substrate, and an upper electrode on the dielectric layer. The lower electrode may include a metal nitride having a chemical formula of M1Ny (M1 is a first metal, and y is a positive real number). The dielectric layer may include a metal oxide and nitrogen (N), the metal oxide having a chemical formula of M2Ox (M2 is a second metal, and x is a positive real number). A maximum value of a detection amount of nitrogen (N) in the dielectric layer may be greater than a maximum value of a detection amount of nitrogen (N) in the lower electrode.
    Type: Application
    Filed: April 27, 2022
    Publication date: August 11, 2022
    Inventors: Seongyul Park, Jaewan Chang, Suhwan Kim, Hyunjun Kim
  • Publication number: 20220255517
    Abstract: An amplifying device includes a main amplifier; a first feedback circuit coupled between an input terminal of the main amplifier and an output terminal of the main amplifier; an input coupling circuit coupled between the input terminal of the main amplifier and a first node; and an amplifying feedback circuit coupled between the output terminal of the main amplifier and the first node, wherein the first feedback circuit and the amplifying feedback circuit are negative feedback circuits.
    Type: Application
    Filed: February 3, 2022
    Publication date: August 11, 2022
    Applicant: Seoul National University R&DB Foundation
    Inventors: Junyoung PARK, Suhwan KIM
  • Patent number: 11411491
    Abstract: Voltage dividing circuitry is provided for use in a voltage converter for converting at least one input Direct Current, DC voltage to a plurality of output DC voltages. The voltage dividing circuitry including a voltage input port to receive an input DC voltage and an inductor having an input-side switch node and an output-side switch node. The output side switch node is connectable to one of a plurality of voltage output ports to supply a converted value of the input DC voltage as an output DC voltage. The flying capacitor interface has a plurality of switching elements and at least one flying capacitor, the flying capacitor interface to divide the input DC voltage to provide a predetermined fixed ratio of the input DC voltage at the input-side switch node of the inductor. A voltage converter and a power management integrated circuit having the voltage dividing circuitry are also provided.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: August 9, 2022
    Assignee: Intel Corporation
    Inventors: Vivek De, Krishnan Ravichandran, Harish Krishnamurthy, Khondker Ahmed, Sriram Vangal, Vaibhav Vaidya, Turbo Majumder, Christopher Schaef, Suhwan Kim, Xiaosen Liu, Nachiket Desai
  • Patent number: 11348995
    Abstract: A capacitor structure may include a lower electrode on a substrate, a dielectric layer on the substrate, and an upper electrode on the dielectric layer. The lower electrode may include a metal nitride having a chemical formula of M1Ny (M1 is a first metal, and y is a positive real number). The dielectric layer may include a metal oxide and nitrogen (N), the metal oxide having a chemical formula of M2Ox (M2 is a second metal, and x is a positive real number). A maximum value of a detection amount of nitrogen (N) in the dielectric layer may be greater than a maximum value of a detection amount of nitrogen (N) in the lower electrode.
    Type: Grant
    Filed: September 23, 2020
    Date of Patent: May 31, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seongyul Park, Jaewan Chang, Suhwan Kim, Hyunjun Kim
  • Patent number: 11336270
    Abstract: A digital self-start controller, which is functional without fuse and/or trim information. The self-start controller protects a DC-DC converter against large inrush currents and voltage overshoots, while being capable of following a variable VID (voltage identification) reference ramp imposed by the system. The self-start controller uses a relaxation oscillator to set the switching frequency of the DC-DC converter. The oscillator can be initialized using either a clock or current reference to be close to a desired operating frequency. The output of the DC-DC converter is coupled weakly to the oscillator to set the duty cycle for closed loop operation. The controller is naturally biased such that the output supply voltage is always slightly higher than a set point, eliminating the need for any process, voltage, and/or temperature (PVT) imposed trims.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: May 17, 2022
    Assignee: Intel Corporation
    Inventors: Nachiket Desai, Suhwan Kim, Harish Krishnamurthy, Christopher Schaef
  • Patent number: 11316520
    Abstract: A transmitter includes a driving circuitry configured to drive a channel coupled to an output node by controlling an output impedance of a pull-up path, an output impedance of a pull-down path, or both, according to one or more multi-bit data signals, a pull-up control signal, and a pull-down control signal; a driving control circuit configured to generate the pull-up control signal and the pull-down control signal according to one or more calibration signals and the multi-bit data signals or according to the calibration signals and one or more duplicate multi-bit data signals, the duplicate multi-bit data signals duplicating the multi-bit data signals; and a look-up table storing values of the calibration signals.
    Type: Grant
    Filed: February 1, 2021
    Date of Patent: April 26, 2022
    Assignees: SK hynix Inc., Seoul National University R&DB Foundation
    Inventors: Changho Hyun, Suhwan Kim
  • Patent number: 11271549
    Abstract: A semiconductor device includes a circuit including an input coupled to a first node; and a first signal control circuit configured to determine a voltage of the first node in a low power mode, wherein the first signal control circuit sets a voltage of the first node to a first value in an n-th occurrence of the low power mode and a second value different from the first value in an m-th occurrence of the low power mode, and wherein n and m are two different natural numbers.
    Type: Grant
    Filed: November 13, 2020
    Date of Patent: March 8, 2022
    Assignees: SK hynix Inc., Seoul National University R&DB Foundation
    Inventors: Shin Hyun Jeong, Suhwan Kim, Gi Moon Hong, Ji Hyo Kang, Jae Hyeok Yang, Dae Han Kwon, Dong Hyun Kim
  • Publication number: 20220065901
    Abstract: A current sensing topology uses an amplifier with capacitively coupled inputs in feedback to sense the input offset of the amplifier, which can be compensated for during measurement. The amplifier with capacitively coupled inputs in feedback is used to: operate the amplifier in a region where the input common-mode specifications are relaxed, so that the feedback loop gain and/or bandwidth is higher; operate the sensor from the converter input voltage by employing high-PSRR (power supply rejection ratio) regulators to create a local, clean supply voltage, causing less disruption to the power grid in the switch area; sample the difference between the input voltage and the controller supply, and recreate that between the drain voltages of the power and replica switches; and compensate for power delivery network related (PDN-related) changes in the input voltage during current sensing.
    Type: Application
    Filed: August 28, 2020
    Publication date: March 3, 2022
    Applicant: Intel Corporation
    Inventors: Nachiket Desai, Harish Krishnamurthy, Suhwan Kim, Fabrice Paillet
  • Publication number: 20220069703
    Abstract: A digital control scheme controls an integrator of a PID filter to implement non-linear control of saturating the duty cycle during which the proportional and derivative terms of the PID filter are set to 0 while the integrator and its internal states (previous values or memory) is set to a duty cycle that is the sum of the current nominal duty cycle plus a deltaD. The deltaD is the maximum duty cycle increment that is used to regulate a voltage regulator from ICCmin to ICCmax and is a configuration register that can be set post silicon. An FSM moves from a non-linear all ON state to an open loop duty cycle which maintains the output voltage slightly higher than the required Vref. After a certain period in this open loop, the FSM then ramps down the open loop duty cycle value until the output voltage is close to the Vref.
    Type: Application
    Filed: September 1, 2020
    Publication date: March 3, 2022
    Applicant: Intel Corporation
    Inventors: Harish Krishnamurthy, Sheldon Weng, Nachiket Desai, Suhwan Kim, Fabrice Paillet
  • Publication number: 20220069810
    Abstract: A digital self-start controller, which is functional without fuse and/or trim information. The self-start controller protects a DC-DC converter against large inrush currents and voltage overshoots, while being capable of following a variable VID (voltage identification) reference ramp imposed by the system. The self-start controller uses a relaxation oscillator to set the switching frequency of the DC-DC converter. The oscillator can be initialized using either a clock or current reference to be close to a desired operating frequency. The output of the DC-DC converter is coupled weakly to the oscillator to set the duty cycle for closed loop operation. The controller is naturally biased such that the output supply voltage is always slightly higher than a set point, eliminating the need for any process, voltage, and/or temperature (PVT) imposed trims.
    Type: Application
    Filed: August 28, 2020
    Publication date: March 3, 2022
    Applicant: Intel Corporation
    Inventors: Nachiket Desai, Suhwan Kim, Harish Krishnamurthy, Christopher Schaef
  • Publication number: 20220033962
    Abstract: A deposition system, includes: a reaction chamber; a first gas supply unit supplying a first precursor in a liquid state stored in a first main tank to the reaction chamber in a gaseous state; a reactant supply unit supplying a reactant to the reaction chamber; and an exhaust unit discharging an exhaust material, wherein the first gas supply unit includes a first sub tank, a first liquid mass flow controller, and a first vaporizer, the first precursor is supplied to the reaction chamber by passing through the first sub tank, the first liquid mass flow controller, and the first vaporizer, a first automatic refill system operates to periodically fill the first sub tank with the liquid first precursor stored in the first main tank, and the exhaust unit comprises a processing chamber, a pump, and a scrubber to which a plasma pretreatment system is applied.
    Type: Application
    Filed: March 9, 2021
    Publication date: February 3, 2022
    Inventors: Suhwan Kim, Hyunjun Kim, Younglim Park, Dongkwan Baek, Hyungsuk Jung
  • Patent number: 11219653
    Abstract: The specification relates to a composition for enhancing immunity, comprising a ginseng berry polysaccharide as an active ingredient. The composition can increase the expression of cytokines such as IL-6, IL-12, and TNF-? by using ingredients derived from natural products. In addition, the composition can exhibit excellent immunity enhancement effects because of the unique components and structure of a ginseng berry polysaccharide.
    Type: Grant
    Filed: January 26, 2018
    Date of Patent: January 11, 2022
    Assignees: AMOREPACIFIC CORPORATION, KYONGGI UNIVERSITY INDUSTRY & ACADEMIA COOPERATION FOUNDATION 1
    Inventors: Suhwan Kim, Juewon Kim, Chan-woong Park, Dae Bang Seo, Donghyun Cho, Kwang Soon Shin, Dae Young Lee
  • Patent number: 11205962
    Abstract: An apparatus is described which includes a delay-line with reasonably matched delay cells and some logic to ascertain both a correct number of DC-DC converters and interleaving angles or phase offsets. The apparatus measures an operating frequency in real-time in multiples of the individual delay cells of the delay-line. The smaller the period, the higher the load coupled to the DC-DC converters and, therefore the greater the number of DC-DC converters are needed to service the load. The period determines the load and can be used to determine the number of DC-DC converters needed and thereby accomplishing autonomous phase enabling/shedding.
    Type: Grant
    Filed: May 10, 2019
    Date of Patent: December 21, 2021
    Assignee: Intel Corporation
    Inventors: Nachiket Desai, Harish Krishnamurthy, Suhwan Kim
  • Publication number: 20210367598
    Abstract: A transmitter includes a driving circuitry configured to drive a channel coupled to an output node by controlling an output impedance of a pull-up path, an output impedance of a pull-down path, or both, according to one or more multi-bit data signals, a pull-up control signal, and a pull-down control signal; a driving control circuit configured to generate the pull-up control signal and the pull-down control signal according to one or more calibration signals and the multi-bit data signals or according to the calibration signals and one or more duplicate multi-bit data signals, the duplicate multi-bit data signals duplicating the multi-bit data signals; and a look-up table storing values of the calibration signals.
    Type: Application
    Filed: February 1, 2021
    Publication date: November 25, 2021
    Inventors: Changho HYUN, Suhwan KIM
  • Publication number: 20210328579
    Abstract: A semiconductor device includes a circuit including an input coupled to a first node; and a first signal control circuit configured to determine a voltage of the first node in a low power mode, wherein the first signal control circuit sets a voltage of the first node to a first value in an n-th occurrence of the low power mode and a second value different from the first value in an m-th occurrence of the low power mode, and wherein n and m are two different natural numbers.
    Type: Application
    Filed: November 13, 2020
    Publication date: October 21, 2021
    Inventors: Shin Hyun JEONG, Suhwan KIM, Gi Moon HONG, Ji Hyo KANG, Jae Hyeok YANG, Dae Han KWON, Dong Hyun KIM
  • Patent number: 11133821
    Abstract: A delta-sigma modulator generates a bit stream signal from an analog signal by operating according to a modulation period including a sampling period and a filtering period and includes a digital-to-analog converter (DAC) configured to generate a charge signal according to one of a first reference voltage and a second reference voltage according to the bit stream signal during the sampling period and to output a signal generated according to the charge signal and the other of the first reference voltage and the second reference voltage; a loop filter configured to charge a sampling signal corresponding to the analog signal during the sampling period and to filter an output from the DAC and a signal generated according to the sampling signal during the filtering period; and a quantizer configured to generate the bit stream signal according to an output from the loop filter in the modulation period.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: September 28, 2021
    Assignees: Gwanak Analog CO., LTD., Seoul National University R&DB Foundation
    Inventors: Suhwan Kim, Minsung Kim, Jaehoon Jun