Patents by Inventor Suk-in Oh

Suk-in Oh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11837577
    Abstract: A system-in-package module includes a substrate, an application specific integrated circuit (ASIC) chip on the substrate, first wafer level package (WLP) memories on the substrate spaced apart from the ASIC chip in a first direction parallel to an upper surface of the substrate, and second WLP memories on the substrate spaced apart from the ASIC chip in a direction opposite to the first direction.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: December 5, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ae-Nee Jang, Kyung Suk Oh, Eunseok Song, Seung-Yong Cha
  • Patent number: 11785713
    Abstract: A flexible cable jumper structure and manufacturing method thereof. The flexible cable jumper device of the present disclosure includes a cover layer, a first metal layer stacked on the cover layer and having a circuit pattern formed thereon, a first dielectric layer stacked on the first metal layer, a first adhesive layer applied on the first dielectric layer, a second metal layer stacked on the first dielectric layer to which the first adhesive layer is applied and having a circuit pattern formed thereon, a heat-resistant layer stacked on the second metal layer, and a terminal layer formed in one region of the heat-resistant layer and electrically connected to the first metal layer and the second metal layer.
    Type: Grant
    Filed: January 13, 2020
    Date of Patent: October 10, 2023
    Assignee: AMOGREENTECH CO., LTD.
    Inventors: Jeong-Sang Yu, Young-Suk Oh, Taek-Min Kim
  • Patent number: 11783879
    Abstract: A memory device comprising a programmable command-and-address (CA) interface and/or a programmable data interface is described. In an operational mode, two or more CA interfaces may be active. In another operational mode, at least one, but not all, CA interfaces may be active. In an operational mode, all of the data interfaces may be active. In another operational mode, at least one, but not all, data interfaces may be active. The memory device can include circuitry to select: an operational mode; a sub-mode within an operational mode; one or more CA interfaces as the active CA interface(s); a main CA interface from multiple active CA interfaces; and/or one or more data interfaces as the active data interfaces. The circuitry may perform these selection(s) based on one or more bits in one or more registers and/or one or more signals received on one or more pins.
    Type: Grant
    Filed: November 19, 2021
    Date of Patent: October 10, 2023
    Assignee: Rambus Inc.
    Inventors: Ian Shaeffer, Lawrence Lai, Fan Ho, David A. Secker, Wayne S. Richardson, Akash Bansal, Brian S. Leibowitz, Kyung Suk Oh
  • Patent number: 11756850
    Abstract: A chip on film package includes: a flexible base film having a first surface and a second surface opposite to each other, and having a chip mounting region on the first surface; a plurality of wirings extending in a first direction toward the chip mounting region; a semiconductor chip mounted in the chip mounting region on the first surface of the base film and electrically connected to the wirings; a pair of first heat dissipation members on the first surface of the base film and spaced apart from the semiconductor chip, and extending in a second direction perpendicular to the first direction; and a second heat dissipation member on the first surface of the base film and covering the semiconductor chip and the pair of first heat dissipation members.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: September 12, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung-Tae Hwang, Jae-Choon Kim, Kyung-Suk Oh, Woon-Bae Kim, Jae-Min Jung
  • Publication number: 20230283129
    Abstract: A motor for a laundry apparatus includes a stator and a rotor including a rotor frame which rotates outside the stator. The rotor frame includes a base frame having a circular shape and disposed with a distance from a coil, an extension frame which fixes a magnet, an air inlet which suctions air, and a blade protruding to a set height from the base frame, and the blade is positioned outside a region in which the coil is disposed. According to the present disclosure, the heat dissipation performance of the motor can be improved while maintaining the strength of the rotor frame, and motor output can be improved by sufficiently securing a winding space of the coil.
    Type: Application
    Filed: January 31, 2023
    Publication date: September 7, 2023
    Inventors: Sunho KIM, Kyeong-Hwan KIM, Seung-Suk OH
  • Publication number: 20230269896
    Abstract: Proposed are a hybrid flexible cover window and a method of manufacturing the same. The hybrid flexible cover window includes a flat portion formed on a flat area of a flexible display and a folding portion which is formed in succession to the flat portion and formed in a folding area of the flexible display. The hybrid flexible cover window includes a substrate, a transparent polyimide layer formed on the glass substrate, and an adhesive buffer layer formed between the glass substrate and the TPI layer, in which the TPI layer has a UV cut-off wavelength of less than 380 nm.
    Type: Application
    Filed: February 8, 2023
    Publication date: August 24, 2023
    Applicant: UTI INC.
    Inventors: Kukhyun SUNWOO, Tea Joo HA, Hee Jun AHN, Seok Pil JIN, Jae Suk OH, Joo Seok LEE
  • Publication number: 20230260983
    Abstract: A semiconductor package includes a package substrate, a power module on a first surface of the package substrate, a connector on the first surface of the package substrate, the connector being horizontally spaced apart from the power module, a first semiconductor chip on a second surface of the package substrate opposite to the first surface, and a first heat radiator on the second surface of the package substrate, the first heat radiator covering the first semiconductor chip. The first semiconductor chip vertically overlaps the power module, and the first semiconductor chip is electrically connected through the package substrate to the power module.
    Type: Application
    Filed: November 28, 2022
    Publication date: August 17, 2023
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Manho LEE, Keung Beum KIM, Kyung Suk OH
  • Publication number: 20230257314
    Abstract: The present invention provides a plasma-resistant ceramic member, which includes a substrate and a ceramic coating layer formed on the substrate, in which the ceramic coating layer includes a lower layer consisting of an oxide formed on the substrate, and a surface layer in which an oxide composition component constituting the surface of the ceramic coating layer is surface-modified with a composition containing one or more anions selected from the group consisting of F? and Cl?, wherein the surface layer is a layer in which a raw material containing one or more anions selected from the group consisting of F? and Cl? is vaporized by heating and adsorbed to the surface of the ceramic coating layer, and thus modified with a composition containing one or more anions selected from the group consisting of F? and Cl?, and a method of manufacturing the same.
    Type: Application
    Filed: November 3, 2022
    Publication date: August 17, 2023
    Applicant: KOREA INSTITUTE OF CERAMIC ENGINEERING AND TECHNOLOGY
    Inventors: Sung min LEE, Yoon Suk OH, Hyeong Jun KIM, Gyusang OH
  • Publication number: 20230245975
    Abstract: A semiconductor package includes a redistribution layer having a first surface and a second surface opposite to each other, the redistribution layer including a plurality of first redistribution pads on the first surface, a semiconductor chip on the second surface of the redistribution layer, an active surface of the semiconductor chip facing the redistribution layer, a plurality of conductive structures on the second surface of the redistribution layer, the plurality of conductive structures being spaced apart from the semiconductor chip, and a plurality of external connection terminals on and coupled to the conductive structures, the plurality of first redistribution pads have a pitch smaller than a pitch of the plurality of external connection terminals.
    Type: Application
    Filed: April 12, 2023
    Publication date: August 3, 2023
    Inventors: Hae-Jung YU, Kyung Suk OH
  • Publication number: 20230238356
    Abstract: Integrated circuit packages with multiple integrated circuit dies are provided. A multichip package may include at least two integrated circuit dies that communicate using an embedded multi-die interconnect bridge (EMIB) in a substrate of the multi-chip package. The EMIB may receive power at contact pads formed at a back side of the EMIB that are coupled to a back side conductor on which the EMIB is mounted. The back side conductor may be separated into multiple regions that are electrically isolated from one another and that each receive a different power supply voltage signal or data signal from a printed circuit board. These power supply voltage signals and data signals may be provided to the two integrated circuit dies through internal microvias or through-silicon vias formed in the EMIB.
    Type: Application
    Filed: March 30, 2023
    Publication date: July 27, 2023
    Inventors: Hui LIU, Kyung Suk OH
  • Publication number: 20230215701
    Abstract: The present invention relates to a method of forming a plasma resistant oxyfluoride coating layer, including: mounting a substrate on a substrate holder provided in a chamber; causing an electron beam scanned from an electron gun to be incident on an oxide evaporation source accommodated in a first crucible, and heating, melting, and vaporizing the oxide evaporation source as the electron beam is incident on the oxide evaporation source; vaporizing a fluoride accommodated in a second crucible; and advancing an evaporation gas generated from the oxide evaporation source and a fluorine-containing gas generated from the fluoride toward the substrate, and reacting the evaporation gas generated from the oxide evaporation source and the fluorine-containing gas generated from the fluoride to deposit an oxyfluoride on the substrate.
    Type: Application
    Filed: November 1, 2022
    Publication date: July 6, 2023
    Inventors: Sung min LEE, Yoon Suk OH
  • Patent number: 11692259
    Abstract: Provided are a hot-dip zinc plated steel material and a method for preparing same, the hot-dip zinc plated steel material comprising: base iron comprising 0.01-1.6 wt % of Si and 1.2-3.1 wt % of Mn; a Zn—Al—Mg alloy plating layer; and an Al-rich layer formed on the interface of the base iron and Zn—Al—Mg alloy plating layer, wherein the rate of occupied surface area of the Al-rich layer is 70% or higher (including 100%).
    Type: Grant
    Filed: March 15, 2022
    Date of Patent: July 4, 2023
    Assignee: POSCO
    Inventors: Il-Ryoung Sohn, Dae-Young Kang, Jong-Sang Kim, Tae-Chul Kim, Min-Suk Oh
  • Patent number: 11688441
    Abstract: A memory device includes a set of inputs, and a first register that includes a first register field to store a value for enabling application of one of a plurality of command/address (CA) on-die termination (ODT) impedance values to first inputs that receive the CA signals; a second register field to store a value for enabling application of one of a plurality of chip select (CS) ODT impedance values to a second input that receives the CS signal; and a third register field to store a value for enabling application of a clock (CK) ODT impedance value to third inputs that receive the CK signal. The memory device also includes second and third registers to store values for selecting one of the plurality of CA ODT impedance values and one of the plurality of CS ODT impedance values for application to the first inputs and second input, respectively.
    Type: Grant
    Filed: September 27, 2022
    Date of Patent: June 27, 2023
    Assignee: RAMBUS INC.
    Inventors: Ian Shaeffer, Kyung Suk Oh
  • Publication number: 20230194975
    Abstract: An optical proximity correction system and an operating method are provided. Provided is an optical proximity correction system comprising, a plurality of patch blocks which include a plurality of patches including a segment information table, a plurality of slave devices which receive the segment information table from the plurality of patch blocks to generate a minimum patch table, and a master device which receives the minimum patch table from the plurality of slave devices, generates a segment average calculation table, and performs an optical proximity correction on the patches recorded in the segment average calculation table.
    Type: Application
    Filed: July 26, 2022
    Publication date: June 22, 2023
    Inventors: Hee-Jun LEE, Sang Wook KIM, Heung Suk OH, Jee Eun JUNG
  • Patent number: 11681430
    Abstract: An electronic device includes a display for detecting touch input, and at least one processor for recognizing a type of an auxiliary input device placed on the display. A method for utilizing the electronic device includes detecting via a touch screen a type of an auxiliary input device placed on a display based on a configuration of at least one or more conductors on the auxiliary input device, detecting an input event generated by the auxiliary input device, and executing via a processor at least one function of an executing program corresponding to the detected input event.
    Type: Grant
    Filed: November 17, 2021
    Date of Patent: June 20, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bo-Kun Choi, Jun-Suk Oh
  • Publication number: 20230168213
    Abstract: This application relates to an optical sensor element. In one aspect, the optical sensor element includes a graphite column including one or more graphite rods. The optical sensor element may also include one or more first graphene layers partly or entirely covering each of both ends of the graphite column. The optical sensor element may further include one or more second graphene layers partly or entirely covering the outer circumferential surface of the graphite column. This application also relates to an optical sensor for measuring the concentration of a greenhouse gas and the optical sensor includes the optical sensor element.
    Type: Application
    Filed: April 13, 2022
    Publication date: June 1, 2023
    Inventors: Young Suk OH, Su Ryon SHIN, Hyun Young JUNG, Sang Won JOO, Hae Young LEE, Chang Kee LEE, Yeon Hee KIM, Chu Yong CHUNG
  • Patent number: 11664348
    Abstract: A semiconductor package includes a substrate, a first semiconductor chip on the substrate, a second semiconductor chip on the first semiconductor chip and a connection structure. The second semiconductor chip includes a first segment that protrudes outwardly beyond one side of the first semiconductor chip and a second connection pad on a bottom surface of the first segment of the second semiconductor chip. The connection structure includes a first structure between the substrate and the first segment of the second semiconductor chip and a first columnar conductor penetrating the first structure to be in contact with the substrate and being disposed between the second connection pad and the substrate, thereby electrically connecting the second semiconductor chip to the substrate.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: May 30, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyung Suk Oh, Do-Hyun Kim, Sunwon Kang
  • Publication number: 20230136651
    Abstract: According to one embodiment of the present invention, there is provided a catalyst compound, which comprises a compound of Chemical Formula 1 below and catalyzes the process of oxidizing 5-hydroxymethylfurfural (HMF) to 2,5-furandicarboxylic acid (FDCA): NiCoxPy??[Chemical Formula 1] (wherein x and y are the molar ratio for Ni contained in the catalyst compound, 0<x<1, 0<y<1).
    Type: Application
    Filed: June 15, 2022
    Publication date: May 4, 2023
    Inventors: Dong Ki LEE, Jai Hyun KOH, Dahye WON, Ung LEE, Hyung-Suk OH, Byoung Koun MIN, JongIn WOO, Byeong Cheul MOON
  • Patent number: 11639074
    Abstract: A rim cover assembly having a waterproof structure according to an embodiment of the present invention includes a rim of which an outer wheel is surrounded by a tire, wherein a shaft passes through and is connected to a center of the rim, a cover coupled to the rim to seal an interior of the rim, tire separation prevention steps formed on the rim and the cover to prevent separation of the tire, and a bolt coupling portion which couples the cover and the rim, wherein the tire separation prevention steps include a first tire separation prevention step, which is integrally formed with the rim and protrudes from one side of the rim and a second tire separation prevention step integrally formed with the cover coupled to the other side of the rim, and the bolt coupling portion may be formed in the second tire separation prevention step.
    Type: Grant
    Filed: April 23, 2020
    Date of Patent: May 2, 2023
    Assignee: LG ELECTRONICS INC.
    Inventors: Seung-Suk Oh, Jaekwang Nam
  • Patent number: 11637070
    Abstract: A semiconductor package includes a redistribution layer having a first surface and a second surface opposite to each other, the redistribution layer including a plurality of first redistribution pads on the first surface, a semiconductor chip on the second surface of the redistribution layer, an active surface of the semiconductor chip facing the redistribution layer, a plurality of conductive structures on the second surface of the redistribution layer, the plurality of conductive structures being spaced apart from the semiconductor chip, and a plurality of external connection terminals on and coupled to the conductive structures, the plurality of first redistribution pads have a pitch smaller than a pitch of the plurality of external connection terminals.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: April 25, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hae-Jung Yu, Kyung Suk Oh