Abstract: A method for making an integrated circuit substrate having embedded back-side access conductors and vias provides a high-density mounting and interconnect structure for integrated circuits that is compatible with etched, plated or printed pre-manufactured substrate components. A circuit board or film having a pre-plated, etched or printed circuit, for example a rigid substrate having a Ball Grid Array (BGA) ball-attach pattern, is laser perforated to produce blind vias and/or conductive patterns that provide contact through to conductors of the prefabricated circuit board or film. Existing circuit board and substrate technology is thereby made compatible with laser-embedding technologies, providing the low-cost advantages of existing etching, plating and printing technologies along with a high conductor density associated with laser-embedded circuit technologies.

Abstract: An integrated circuit substrate having embedded wire conductors provides high-density interconnect structure for integrated circuits. Wires are shaped to form a conductive pattern and placed atop a dielectric substrate layer. Additional dielectric is electro-deposited over the wires to form an insulating layer that encapsulates the wires. One or more power planes may be embedded within the substrate and wires within the conductive pattern may be laser-welded to vertical wire stubs previously attached to a power plane. Vias may be formed by mechanically or laser drilling (or plasma or chemical etching) through any power planes and screening a copper paste into the drilled holes to form conductive paths through the holes. Via conductors may then be exposed by a plasma operation that removes dielectric, leaving the ends of the via conductors exposed. Wires within the conductive pattern may then be laser-welded to the via conductor ends.

Abstract: A solderable injection-molded integrated circuit substrate provides a mounting and interconnect structure for integrated circuits. Circuit traces within channels on the substrate provide interconnects that are isolated by the channel sides and solderable mounting contacts for Ball Grid Array (BGA) or wire-bondable integrated circuit dies. The substrate is injection-molded and then electroplated or seed plated and an etchant-resistive material is applied. The substrate is exposed to an etchant, removing the plated material from undesired locations and leaving the plated material in contact areas and trace areas within the channels. An integrated circuit die is then wire-bonded or solder ball attached to the substrate.

Abstract: An integrated circuit having multiple power/ground connections to a single external terminal and method for manufacturing an integrated circuit provides an integrated circuit having a reduced number of external power/ground terminals. The multiple connections may be made by conductive circuit paths on one side of the substrate and a terminal pad on the same side of the substrate, with the conductive circuit paths leading from die terminals terminating at the terminal pad, or a via may be formed either directly above the terminal pad or contacting its circumference to provide a connection through from the opposite side of the substrate. Multiple vias may be formed above the terminal pad and within its circumference to provide connection of multiple die terminals to the terminal pad.

Abstract: A semiconductor package and a method and a substrate for making the package are disclosed. The substrate of an exemplary package includes metal circuit patterns covered by a layer of an insulative nonphotoimageable solder mask material. A plurality of apertures are formed by laser ablation through the nonphotoimageable solder mask layer so as to expose a selected region of at least some of the circuit patterns. A bond wire is electrically connected between a semiconductor chip connected to the substrate and the respective circuit patterns through the laser-formed aperture over the circuit pattern.

Abstract: The present invention relates to a bond enhancement process for promoting strong, stable adhesive bonds between surfaces of copper foil and adjacent resin impregnated substrates or superimposed metallic sublayers. According to the process of the invention, a black oxide-coated copper surface is treated with an aqueous reducing solution containing sodium metabisulfite and sodium sulfide to convert the black oxide coating to a roughened metallic copper coating. The roughened metallic copper-coated surface is then passivated and laminated to a resin impregnated substrate. The bond enhancement process is especially useful in multilayer printed circuit fabrication and in the treatment of copper circuit lines and areas which are disconnected from each other, that is, which do not have electrically conductive continuity.