Abstract: A system and method for automatically controlling power save operation of a portable communication system utilizing historical usage information. Various aspects of the present invention may comprise monitoring usage of a portable communication system. A usage monitor module may perform such monitoring. Usage information for the portable communication system may be accumulated. Such usage information may, for example, be stored in a usage information database. A power-save operating profile may be determined based, at least in part, on the accumulated usage information. An operating profile development module may, for example, determine such a power-save operating profile. The portable communication system may be automatically operated in accordance with the determined power-save operating profile. An operation control module may control such automatic operation of the portable communication system.

Abstract: An embodiment of the present invention includes an amplifier on an integrated circuit, with the amplifier having positive and negative inputs, and positive and negative outputs. A first feedback capacitor is on the integrated circuit between the positive input and the negative output. A second feedback capacitor is on the integrated circuit between the negative input and the positive output. A package encloses the integrated circuit. A third capacitor is between the positive and negative inputs. A feedback factor of the amplifier circuit approaches unity. In example embodiments, the first and second capacitors are between 3 and 10 pF. The third capacitor is between 3 and 10 pF.

Abstract: A system and method for automatically controlling operation of a portable communication device based on a communication acceptance/rejection profile. Various aspects of the present invention may comprise receiving communication acceptance profile information. An interface module of a portable communication device may, for example, receive such information. Information describing a pending communication may be received. A receiver module of a portable communication device may, for example, receive such information. The communication acceptance profile information and the information describing the pending communication may be analyzed to determine whether to accept the pending communication. A communication acceptance determination module may, for example, perform such analysis. If it is determined that the communication should be accepted, then the communication may be received. A receiver module may perform such receiving.

Abstract: A system and method for providing multi-tiered power save operation in a portable communication device. A portable communication device may be operated in a first power-save mode. A power-save module of the portable communication device may, for example, provide for operation in such a first power-save mode. It may be determined to operate the portable communication device in a second power-save mode that is different than the first power-save mode. A power-save management module may, for example, make such a determination. The portable communication device may then be operated in the second power-save mode. The power-save module may, for example, provide for operation in such a second power-save mode.

Abstract: A system and method for providing a low power warning in a portable communication device based on predicted device utilization. Various aspects of the present invention may comprise monitoring power utilization for a portable communication device. A power utilization profile may be determined based, at least in part, on the results of the power utilization monitoring. Power availability for the portable communication device may be determined. Future power need for the portable communication device may be predicted based, at least in part, on the determined power utilization profile. The predicted future power need and the determined power availability may be analyzed to determine whether to generate a warning indicating a potential future power shortage. If it is determined that a potential future power shortage warning should be generated, such a warning may be generated. Such a warning may, for example, be generated in accordance with user specifications.

Abstract: A circuit and method utilizing a power control data bus for implementing power control. Various aspects of the present invention provide an electrical circuit that comprises a power supply circuit that outputs electrical power. The electrical circuit may also comprise an integrated circuit that receives electrical power from the power supply circuit. The electrical circuit may also comprise a power control data bus, which communicatively couples a power control data bus interface of the power supply circuit and a power control data bus interface of the integrated circuit. The power control data bus may, for example, carry power control data between the integrated circuit and the power supply circuit. Various aspects of the present invention also provide a method that comprises communicating power control data over a power control data bus and utilizing the power control data to control characteristics of electrical power provided to an integrated circuit or module.

Abstract: A system and method for storing power utilization information in an integrated circuit and utilizing such information. Various aspects of the present invention provide an integrated circuit that comprises a first module, which stores power utilization information for at least a portion of the integrated circuit. A second module of the integrated circuit may communicate the power utilization information with an electrical device external to the integrated circuit. Various aspects of the present invention provide a method for storing power utilization information in an integrated circuit. For example, a performance characteristic and/or a power supply characteristic may be monitored as the integrated circuit is utilized. Power utilization information may be determined from the monitored characteristic(s), and the power utilization information may be stored in the integrated circuit.

Abstract: An integrated circuit comprising multiple independent power supply zones at substantially the same voltage level and a method for utilizing such power supply zones. An integrated circuit may comprise a first module and may, for example, comprise a second module. A first power supply bus may communicate first electrical power to the first module, where the first electrical power is characterized by a first set of power characteristics comprising a first voltage level. A second power supply bus may communicate second power to the second module, where the second power is characterized by a second set of power characteristics comprising a second voltage level that is substantially similar to the first voltage level. The second set of power characteristics may, for example, be substantially different than the first set of power characteristics. The second power supply bus may also, for example, communicate the second electrical power to the first module.

Abstract: A system and method for providing, in an integrated power supply circuit, signals corresponding to multiple power supply outputs. Various aspects of the present invention may comprise an integrated circuit. The integrated circuit may comprise a first module that outputs a first signal corresponding to electrical power that is characterized by a first set of power characteristics. The first set of power characteristics may, for example, comprise a first voltage level. The integrated circuit may also comprise a second module that outputs a second signal corresponding to electrical power that is characterized by a second set of power characteristics. The second set of power characteristics may, for example, comprise a second voltage level. The second voltage level may, for example, be substantially similar to the first voltage level, and the first set of power characteristics may, for example, be substantially different than the second set of power characteristics.

Abstract: A system and method for implementing a multi-voltage multi-battery power management integrated circuit. Various aspects of the present invention provide a power management integrated circuit. The power management IC may comprise a first regulator module that receives a first battery power signal from a first battery characterized by a first battery voltage and outputs a first regulated power signal, based at least in part on the first battery power signal. The power management IC may also comprise a second regulator module that receives a second battery power signal from a second battery characterized by a second battery voltage and outputs a second regulated power signal, based at least in part on the second battery power signal. The second battery voltage may, for example, be substantially different than the first battery voltage. The power first and second regulated power signals may, for example, correspond to substantially different power supply voltages.

Abstract: Provided are a method and system for removing an offset direct current (DC) component from an input waveform. The method includes multiplying the input waveform with a demodulation waveform to produce a first differential current signal. An absolute value representation of the demodulation waveform is multiplied with a reference DC offset value to produce a second differential current signal. The first and second differential current signals are then differenced.

Abstract: Provided are a method and system for demodulating a signal. The method includes receiving the signal along first and second signal paths within a demodulator having a common starting point. Impedance values along each of the paths are changed alternately in synchronism.

Abstract: Provided are a method and system for digitizing a sensor model output signal. The system includes a filter, a demodulator coupled to the filter, a DC offset cancellation mechanism coupled to the demodulator, and an analog to digital converter (ADC). The ADC is directly coupled to the demodulator and the DC offset cancellation mechanism.

Abstract: A circuit for clamping a TV signal includes an input capacitor coupled to the TV signal, an analog-to-digital converter that outputs a digital signal corresponding to TV signal, a comparator that compares the digital signal to a black level signal, and a high impedance driver that charges the input capacitor in response to an output of the comparator.

Abstract: An input buffer amplifier has a symmetrical centroidal layout. The input buffer amplifier includes two half differential amplifiers that have substantially identical layouts. Each half amplifier receives the input signal in-parallel, and the outputs of the differential half amplifiers are wire-ored together. The input buffer amplifier is symmetrical about both horizontal and vertical lines of symmetry. Furthermore, FET devices forming the half amplifiers are interlaced to create the horizontal line of symmetry. The overall horizontal and vertical symmetry of the input buffer amplifier improves the device matching between differential signal paths. In other words, the devices in the half amplifiers that process the positive and negative components of the differential signal are more closely matched. This reduces differential offsets and common mode offsets that can occur when devices are not matched properly.

Abstract: An input buffer amplifier has a symmetrical centroidal layout. The input buffer amplifier includes two half differential amplifiers that have substantially identical layouts. Each half amplifier receives the input signal in-parallel, and the outputs of the differential half amplifiers are wire-ored together. The input buffer amplifier is symmetrical about both horizontal and vertical lines of symmetry. Furthermore, FET devices forming the half amplifiers are interlaced to create the horizontal line of symmetry. The overall horizontal and vertical symmetry of the input buffer amplifier improves the device matching between differential signal paths. In other words, the devices in the half amplifiers that process the positive and negative components of the differential signal are more closely matched. This reduces differential offsets and common mode offsets that can occur when devices are not matched properly.

Abstract: A hybrid circuit that decouples gains for a transmit signal and a receive signal of a broadband modem that is coupled to a telephone line is provided. The hybrid circuit includes a multi-port transformer, a pair of line matching resistors, and a bridge circuit. The multi-port transformer includes a line coil electrically coupled to a telephone line, a linedriver coil magnetically coupled to the line coil and a receive coil that is also magnetically coupled to the line coil. In an alternate embodiment, a hybrid circuit is provided that includes a multi-port transformer in which the line coil, linedriver coil and receive coil include two coil segments. A broadband modem incorporating a hybrid circuit of the present invention is also provided.

Abstract: A method can allow a system to selectively control increasing of a bias source in a reference buffer or decreasing impedance looking into a output of the reference buffer for a temporary or selective time period, which can result in an increased overall efficiency of the system. The method can include at least the following steps. A first input signal is received at an input of a reference buffer. A second input signal is received from a load at an output of the reference buffer. A value of a bias source coupled to the output of the reference buffer is modulated, such that a spike of a signal at the output of the reference buffer caused by the second input signal is maintained below a threshold value. Alternatively, an impedance looking into the output of the reference buffer is modulated, such that a spike of a signal at the output of the reference buffer caused by the second input signal is maintained below a threshold value.

Abstract: A sample and hold circuit including a plurality of input signal sampling switches using native NMOS transistors in combination with switched bulk PMOS transistors. The input signal sampling switches input a differential input signal and output an intermediate differential signal. A plurality of capacitors are connected to the intermediate differential signal. A plurality of summing junction switches receive charge stored on the plurality of capacitors, and output a differential sampled and held charge to the summing junction. The plurality of input signal sampling switches include first, second, third, and fourth switches each having an input and an output. Inputs of the first and third switches are connected to a first voltage of the differential input voltage. Inputs of the second and fourth switches are connected to a second voltage of the differential input voltage. Outputs of the first and second switches are connected together and to an input of a first capacitor of the plurality of capacitors.

Abstract: A sigma-delta modulator includes a summing junction that receives an input signal. A plurality of integrators are arranged in series, the integrators output an integrated signal value to a multi-input quantizer. The multi-input quantizer has a plurality of comparators each with switched capacitor inputs. The multi-input quantizer outputs a quantized signal to a multi-bit feedback DAC that drives the summing junction.