Abstract: A gate driver includes a gate integrated circuit (“IC”) chip which receives at least two scanning start signals and at least four clock control signals, and outputs a plurality of gate-on voltages, where at least two clock control signals of the at least four clock control signals are generated based on one scanning start signal of the at least two scanning start signals, timings of the at least two scanning start signals are independent of each other, and timings of the at least two clock control signals based on the one scanning start signal are independent of each other.

Abstract: A driving device of a display apparatus includes: a gate driver, a gate on voltage modulator, and a signal controller. The gate driver includes a plurality of gate driving circuits, each of the gate driving circuits being configured to: generate a gate signal according to a gate control signal, and apply the gate signal to at least one gate line. The gate on voltage modulator is configured to: modulate a gate on voltage according to a modulation control signal, and generate a first modulated gate on voltage. The signal controller is configured to generate the modulation control signal and the gate control signal. At least one of the plurality of gate driving circuits includes an amplifier configured to: receive the first modulated gate on voltage, and output a second modulated gate on voltage including substantially the same waveform as the first modulated gate on voltage.

Abstract: A driving circuit according to an embodiment of the present invention includes an input terminal, unit circuits connected to the input terminal, and output terminals electrically connected to the input terminals. Each of the unit circuits is enabled in response to a control signal inputted via the input terminal.

Abstract: A display device includes an array substrate, a driving film and an adhesive member. The array substrate includes a first base substrate, a plurality of first signal pads formed on the first base substrate and a first dummy pad formed adjacent to the first signal pads. The driving film includes a base film, a plurality of output terminals formed on the base film and a first alignment mark formed adjacent to the output terminals. The adhesive member adheres the first signal pads to the output terminals, and adheres the first dummy pad to the first alignment mark.

Abstract: The data driving apparatus includes a gamma data storage unit storing p-bit gamma data, a conversion data storage unit storing q-bit gamma data corresponding to the p-bit gamma data, a gamma data conversion unit converting the p-bit gamma data into the q-bit gamma data based on the conversion data storage unit, and a gamma voltage generator generating gamma voltage from the q-bit gamma data, in which the conversion data storage unit is refreshed in a vertical blank period.

Abstract: A display device includes: a display area including a plurality of pixels, where each of the pixels includes m subpixels; and a plurality of data lines connected to the pixels, where 2n pixels of the pixels define an inversion reference group, where 2mn subpixels in the inversion reference group are applied with data voltages of a same polarity, and where each of n and m is a natural number.

Abstract: A liquid crystal display having data driving apparatus comprising first and second output switches, a charge sharing line, and first and second charge sharing switches. The first output switch switches an electrical connection between a first amplifier providing a positive gradation voltage and a first data line in response to a control signal. The second output switch switches an electrical connection between a second amplifier providing a negative gradation voltage and a second data line in response to the control signal. The first charge sharing switch switches an electrical connection between the first data line and the charge sharing line in response to the control signal. The second charge sharing switch switches an electrical connection between the second data line and the charge sharing line in response to the control signal.

Abstract: A display device includes gate lines; data lines; charge control lines each including a charge control voltage input pad; first and second thin film transistors (TFTs) each including control and input electrodes connected to the gate and data lines, respectively; a first liquid crystal capacitor connected to an output electrode of the first TFT; a second liquid crystal capacitor connected to an output electrode of the second TFT; a charge control TFT including a control electrode and an input electrode connected to one of the charge control lines and the second pixel electrode, respectively; and a charge-down capacitor connected to an output electrode of the charge control TFT. A duration time of a turn-on voltage pulse applied to the charge control TFT is different from a duration time of a turn-on voltage pulse applied to the first TFT transistor or the second TFT.

Abstract: Provided is a liquid crystal display including: a liquid crystal panel, a plurality of display signal lines disposed in the liquid crystal panel, a plurality of diodes including a first diode and a second diode. The first diode is connected to each of the display signal lines in a reverse direction and the second diode is connected to each of the display signal lines in a forward direction. The liquid crystal display further includes a plurality of first dummy pads and a plurality of second dummy pads disposed on IC chips which are mounted on a film which is connected to the display panel. A first dummy voltage line is connected to the first dummy pads, a second dummy voltage line is connected to the second dummy pads, and the first dummy pads and the second dummy pads are each adapted to receive a driving voltage.

Abstract: A signal generating circuit for a liquid crystal display (LCD) includes circuitry adapted to receive a gate clock signal and an output enable signal. The gate clock signal is a combination of a gate-on signal and a gate-off signal and the output enable signal is operable to adjust the width of the gate-on signal. The signal generating circuit adjusts the output enable signal such that a falling edge of the output enable signal overlaps a rising edge of the gate clock signal and thereby delays the gate clock signal for a selected amount of time.

Abstract: A gate driver includes a gate integrated circuit (“IC”) chip which receives at least two scanning start signals and at least four clock control signals, and outputs a plurality of gate-on voltages, where at least two clock control signals of the at least four clock control signals are generated based on one scanning start signal of the at least two scanning start signals, timings of the at least two scanning start signals are independent of each other, and timings of the at least two clock control signals based on the one scanning start signal are independent of each other.

Abstract: A power circuit for a liquid crystal display includes a voltage divider which generates a voltage-divided voltage between a first power source and a second power source, an operational amplifier which receives the voltage-divided voltage to output a driving voltage, a first switch connected between the first power source and a common node, and a second switch connected between the second power source and the common node. The first switch provides a first current path between the first power source and the common node in response to the driving voltage, and the second switch provides a second current path between the second power source and the common node in response to the driving voltage.

Abstract: A display device includes an array substrate, a driving film and an adhesive member. The array substrate includes a first base substrate, a plurality of first signal pads formed on the first base substrate and a first dummy pad formed adjacent to the first signal pads. The driving film includes a base film, a plurality of output terminals formed on the base film and a first alignment mark formed adjacent to the output terminals. The adhesive member adheres the first signal pads to the output terminals, and adheres the first dummy pad to the first alignment mark.

Abstract: A liquid crystal display includes a plurality of pixels, a plurality of data lines connected to the plurality of pixels, and a data driver connected to the plurality of data lines, where the data driver supplies data voltage to the plurality of data lines, where the data driver includes a data latch which outputs input image data in response to image data corresponding to the plurality of pixels, wherein the data latch rearranges a sequence of the image data, and a digital-to-analog converting unit which includes a positive digital-to-analog converter which generates a positive data voltage in response to the input image data, and a negative digital-to-analog converter which generates a negative data voltage in response to the input image data.

Abstract: In a display apparatus, a display panel includes touch sensors that make contact with a common electrode by an external pressure to output a common voltage, and a sensing driver receives the common voltage from the touch sensors to generate a sensing signal. A controller receives the sensing signal from the sensing driver and calculates position information to which the external pressure is applied based on the sensing signal. The sensing driver includes a switching circuit that receives a switching signal from the controller to switch the common voltage. Thus, the display apparatus prevents the common voltage from being input during a period where a voltage level of the common voltage is abnormally high, thereby preventing a logic circuit of the sensing driver from being damaged.

Abstract: A gate drive portion for a display device including multiple pixels having first and second sub-pixels includes a first shift register generating a first output signal in response to a first gate clock signal, a second shift register generating a second output signal in response to a second gate clock signal, a level shifter coupled to the first and second shift registers and amplifying the first and second output signals, and an output buffer coupled to the level shifter and generating first and second gate signals. The first gate signal is generated in synchronization with the first gate clock signal and the second gate signal is generated in synchronization with the second gate clock signal. Accordingly, the charging time of the first and second sub-pixels may be improved by separately driving the odd-numbered and even-numbered sub-pixels and the visibility of the LCD device may also be improved.

Abstract: A liquid crystal display device having improved visibility is disclosed. The liquid crystal display, in accordance with an embodiment, includes a liquid crystal panel including a plurality of display blocks, each display block including a plurality of gate lines, a plurality of data lines, and a plurality of pixels coupled to the corresponding gate lines and data lines; a timing controller providing an integration signal including data and a charge share control signal; and a plurality of data-driving chips corresponding to the plurality of display blocks, each of the data-driving chips being coupled to the timing controller in a point-to-point relation, receiving the integration signal, and short-circuiting the plurality of data lines in the corresponding display blocks with one another during charge-share periods, wherein at least two of the plurality of data-driving chips adjust the charge-share periods to be different from each other.

Abstract: A display device includes a signal controller processing an input image signal and an input control signal and outputting an image signal and a control signal. A gray voltage generator generates reference gray voltages. The control signal includes a selection signal. A data driver generates gray voltages based on the reference gray voltage, selects a gray voltage corresponding to the image signal among the generated gray voltages, and applies the selected gray voltage to a pixel as a first data voltage. The data driver applies a black data voltage corresponding to a black image to the pixel according to the selection signal.

Abstract: A signal transfer member for a liquid crystal display (LCD) apparatus includes a power line for receiving power from an external source and for driving a semiconductor chip disposed on the transfer member or the display apparatus. The power line is bent so as to incorporate a serpentine structure, which enables the length of the power line to be easily adjusted and results in the line being longer than a power line formed with a relatively straight structure. Accordingly, the length of the power line can be adjusted to take into account the respective impedances of the chip and the external source so as to suppress electromagnetic waves in the power line. This prevents the creation of noise, distortion of signals, damage to the semiconductor chip, and disconnection of the input interconnection thereof that are caused by the electromagnetic waves, so that product yields are thereby improved.

Abstract: A driving circuit according to an embodiment of the present invention includes an input terminal, unit circuits connected to the input terminal, and output terminals electrically connected to the input terminals. Each of the unit circuits is enabled in response to a control signal inputted via the input terminal.