Patents by Inventor Sundar Ramamurthy
Sundar Ramamurthy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20080090309Abstract: A method for rapid thermal annealing is disclosed. As the substrate is inserted into an annealing chamber, it begins to heat due to the heat radiating from chamber components that were heated when a previous substrate was annealed. Thus, the leading edge of the substrate may be at an elevated temperature while the trailing edge of the substrate may be at room temperature while the substrate is inserted causing a temperature gradient is present across the substrate. Once the substrate is completely inserted into the annealing chamber, the temperature gradient may still be present. By compensating for the temperature gradient across the substrate, the substrate may be annealed uniformly.Type: ApplicationFiled: May 20, 2007Publication date: April 17, 2008Inventors: JOSEPH RANISH, Balasubramanian Ramachandran, Ravi Jallepally, Sundar Ramamurthy, Vedapuram Achutharaman, Brian Haas, Aaron Hunter, Wolfgang Aderhold
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Patent number: 7241345Abstract: The cylinder includes a core and a coating covering most of the core. The core is made from a heat-resistant or insulating material. The core has inner and outer side walls and opposing first and second ends. The outer side wall is further away from a central longitudinal axis of the cylinder than the inner wall. The first end is configured to contact an edge ring that supports a semiconductor substrate. The coating is substantially opaque to infrared radiation, and covers all external surfaces of the core except for the first end. The core is preferably made from quartz or ceramics, while the coating is preferably made from a polysilicon.Type: GrantFiled: June 16, 2003Date of Patent: July 10, 2007Assignee: Applied Materials, Inc.Inventors: Sundar Ramamurthy, Vedapuram Achutharaman, Ho T. Fang
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Publication number: 20070104470Abstract: Apparatus and methods of thermally treating a wafer or other substrate, such as rapid thermal processing (RTP) apparatus and methods are disclosed. An array of radiant lamps directs radiation to the back side of a wafer to heat the wafer. In one or more embodiments, the front side of the wafer on which the patterned integrated circuits are being formed faces a radiant reflector. In one or more embodiments, the wafer is thermally monitored for temperature and reflectivity from the side of the reflector.Type: ApplicationFiled: December 14, 2006Publication date: May 10, 2007Inventors: Wolfgang Aderhold, Sundar Ramamurthy, Aaron Hunter
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Publication number: 20070026693Abstract: A method and apparatus for oxidizing materials used in semiconductor integrated circuits, for example, for oxidizing silicon to form a dielectric gate. An ozonator is capable of producing a stream of least 70% ozone. The ozone passes into an RTP chamber through a water-cooled injector projecting into the chamber. Other gases such as hydrogen to increase oxidation rate, diluent gas such as nitrogen or O2, enter the chamber through another inlet. The chamber is maintained at a low pressure below 20 Toir and the substrate is advantageously maintained at a temperature less than 800° C. Alternatively, the oxidation may be performed in an LPCVD chamber including a pedestal heater and a showerhead gas injector in opposition to the pedestal.Type: ApplicationFiled: September 8, 2006Publication date: February 1, 2007Applicant: APPLIED MATERIALS, INC.Inventors: Yoshitaka YOKOTA, Sundar RAMAMURTHY, Vedapuram ACHUTHARAMAN, Cory CZARNIK, Mehran BEHDJAT, Christopher OLSEN
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Publication number: 20060240680Abstract: A semiconductor wafer processing system including a factory interface operating at atmospheric pressure and mounting plural wafer cassettes and plural wafer processing chambers connected to the factory interface through respective slit valves. A robot in the factory interface can transfer wafers between the cassettes and the processing chambers. At least one of the processing chambers can operate at reduced pressure The processing chamber may be a rapid thermal processing chamber including an array of lamps irradiating a processing volume through a window. The lamphead is vacuum pumped to a pressure approximating that in the processing volume. A multi-step process may be performed with different pressures. The invention also includes a wafer access port of a thermal processing chamber which can flow an inert gas in outside of the slit valve to thereby form a gas curtain outside of the opened slit to prevent the out flow of toxic processing gases.Type: ApplicationFiled: April 25, 2005Publication date: October 26, 2006Inventors: Yoshitaka Yokota, Kirk Moritz, Kai Ma, Wen Chang, Anastasios Parasiris, Rohit Sharma, Agus Tjandra, Vedapuram Achutharaman, Sundar Ramamurthy, Randhir Thakur
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Patent number: 7127367Abstract: Method and apparatus for obtaining a tailored heat transfer profile in a chamber housing a microprocessor manufacturing process, including estimating heat transfer properties of the chamber; estimating heat absorptive properties of a wafer; adjusting the physical characteristics of the chamber to correct the heat transfer properties; and utilizing the chamber for manufacturing microprocessors.Type: GrantFiled: September 24, 2004Date of Patent: October 24, 2006Assignee: Applied Materials, Inc.Inventors: Balasubramanian Ramachandran, Joseph Michael Ranish, Ravi Jallepally, Sundar Ramamurthy, Raman Achutharaman, Brian Haas, Aaron Hunter
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Publication number: 20060228818Abstract: A retuning process particularly useful with an Ar/H2 smoothing anneal by rapid thermal processing (RTP) of a silicon-on-insulator (SOI) wafer performed after cleavage. The smoothing anneal or other process is optimized including a radial temperature profile accounting for the edge ring and exclusion zone and the vertically structured SOI stack or other wafer gross structure. The optimized smoothing conditions are used to oxidize a bare silicon wafer and a reference thickness profile obtained from it is archived. After extended processing of complexly patterned production wafers, another bare wafer is oxidized and its monitor profile is compared to the reference profile, and the production process is adjusted accordingly. In another aspect, a jet of cooling gas is preferentially directed to the edge ring and peripheral portions of the supported SOI wafer to cool them relative to the inner wafer portions.Type: ApplicationFiled: March 14, 2006Publication date: October 12, 2006Applicant: Applied Materials, Inc.Inventors: Juan Chacin, Sairaju Tallavajula, Sundar Ramamurthy
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Publication number: 20060223315Abstract: A method and apparatus for oxidizing materials used in semiconductor integrated circuits, for example, for oxidizing silicon to form a dielectric gate. An ozonator is capable of producing a stream of least 70% ozone. The ozone passes into an RTP chamber through a water-cooled injector projecting into the chamber. Other gases such as hydrogen to increase oxidation rate, diluent gas such as nitrogen or O2, enter the chamber through another inlet. The chamber is maintained at a low pressure below 20 Torr and the substrate is advantageously maintained at a temperature less than 800° C. Alternatively, the oxidation may be performed in an LPCVD chamber including a pedestal heater and a showerhead gas injector in opposition to the pedestal.Type: ApplicationFiled: April 5, 2005Publication date: October 5, 2006Inventors: Yoshitaka Yokota, Sundar Ramamurthy, Vedapuram Achutharaman, Cory Czarnik, Mehran Behdjat, Christopher Olsen
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Patent number: 7041931Abstract: In a system for thermal processing of a semiconductor substrate, a reflector plate has a stepped surface facing the substrate during heating and cooling of the substrate. The raised surface of the reflector plate has reduced reflectivity, providing advantages during, among other things, cooling of the substrate. The reflector plate also includes a number of recesses to which one or more pyrometers are coupled. These recesses have a highly reflective surface, providing advantages in the performance of the pyrometers.Type: GrantFiled: October 24, 2002Date of Patent: May 9, 2006Assignee: Applied Materials, Inc.Inventors: Dean Jennings, Joseph M. Ranish, Brian Haas, Ajit Balakrishna, Sundar Ramamurthy, Aaron Hunter, Mark Yam
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Publication number: 20060066193Abstract: A thermal processing chamber includes a substrate support rotating about a center axis and a lamphead of plural lamps in an array having a predetermined difference in radiance pattern between them. The radiance pattern includes a variation in diffuseness or collimation. In one embodiment, the center lines of all of the lamps are disposed away from the center axis. The array can be an hexagonal array, in which the center axis is located at a predetermined position between neighboring lamps.Type: ApplicationFiled: August 2, 2005Publication date: March 30, 2006Inventors: Joseph Ranish, Corina Tanasa, Sundar Ramamurthy, Claudia Lai, Ravi Jallepally, Ramachandran Balasubramanian, Aaron Hunter, Agus Tjandra, Norman Tam
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Publication number: 20060018639Abstract: A method and apparatus for rapid thermal annealing comprising a plurality of lamps affixed to a lid of the chamber that provide at least one wavelength of light, a laser source extending into the chamber, a substrate support positioned within a base of the chamber, an edge ring affixed to the substrate support, and a gas distribution assembly in communication with the lid and the base of the chamber. A method and apparatus for rapid thermal annealing comprising a plurality of lamps comprising regional control of the lamps and a cooling gas distribution system affixed to a lid of the chamber, a heated substrate support with magnetic levitation extending through a base of the chamber, an edge ring affixed to the substrate support, and a gas distribution assembly in communication with the lid and the base of the chamber.Type: ApplicationFiled: July 22, 2005Publication date: January 26, 2006Inventors: Sundar Ramamurthy, Andreas Hegedus, Randhir Thakur
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Publication number: 20050191044Abstract: A apparatus and method of thermally treating a wafer or other substrate, such as rapid thermal processing (RTP). An array of radiant lamps directs radiation to the back side of a wafer to heat the wafer. The front side of the wafer on which the patterned integrated circuits are being formed faces a radiant reflector. The wafer is thermally monitored for temperature and reflectivity from the side of the reflector. When the lamps are above the wafer, an edge ring supports the wafer in its edge exclusion zone. Alternatively, a reactor includes upwardly directed lamps and a reflector above and facing the front side of the wafer.Type: ApplicationFiled: February 27, 2004Publication date: September 1, 2005Inventors: Wolfgang Aderhold, Sundar Ramamurthy, Aaron Hunter
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Patent number: 6897131Abstract: Lamp based spike annealing was improved to address the aggressive requirements of <100 nm Ultra Shallow Junction (USJ) technologies. Improvements focused on enhancing cool down rates, and thereby improving spike sharpness. Boron ion implanted substrates with varying ion-implanted energy and dose were then annealed to characterize the improvements in spike annealing. A greater than 10% improvement in sheet resistance and junction depth was realized on substrates that were annealed with the improved spike profile. The improved spike anneal had the same comparable uniformity to the standard spike anneal.Type: GrantFiled: September 22, 2003Date of Patent: May 24, 2005Assignee: Applied Materials, Inc.Inventors: Balasubramanian Ramachandran, Ravi Jallepally, Ryan C. Boas, Sundar Ramamurthy, Amir Al-Bayati, Houda Graoui, Joseph M. Spear
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Publication number: 20050102108Abstract: Method and apparatus for obtaining a tailored heat transfer profile in a chamber housing a microprocessor manufacturing process, including estimating heat transfer properties of the chamber; estimating heat absorptive properties of a wafer; adjusting the physical characteristics of the chamber to correct the heat transfer properties; and utilizing the chamber for manufacturing microprocessors.Type: ApplicationFiled: September 24, 2004Publication date: May 12, 2005Inventors: Balasubramanian Ramachandran, Joseph Ranish, Ravi Jallepally, Sundar Ramamurthy, Raman Achutharaman, Brian Haas, Aaron Hunter
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Patent number: 6888104Abstract: A substrate support ring has a band having an inner perimeter that at least partially surrounds a periphery of the substrate. The band has a radiation absorption surface. A lip extends radially inwardly from the inner perimeter of the band to support the substrate. The band and lip can be formed from silicon carbide, and the radiation absorption surface can be an oxidized layer of silicon carbide. In one version, the band and lip have a combined thermal mass Tm, and the radiation absorption surface has an absorptivity A and a surface area Sa, such that the ratio (A×Sa)/Tm is from about 4×10?5 m2K/J to about 9×10?4 m2K/J.Type: GrantFiled: February 5, 2004Date of Patent: May 3, 2005Assignee: Applied Materials, Inc.Inventors: Joseph M. Ranish, Aaron Muir Hunter, Balasubramanian Ramachandran, Jallepally Ravi, Sundar Ramamurthy, Vedapuram S. Achutharaman, Khurshed Sorabji
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Publication number: 20040250772Abstract: The cylinder includes a core and a coating covering most of the core. The core is made from a heat-resistant or insulating material. The core has inner and outer side walls and opposing first and second ends. The outer side wall is further away from a central longitudinal axis of the cylinder than the inner wall. The first end is configured to contact an edge ring that supports a semiconductor substrate. The coating is substantially opaque to infrared radiation, and covers all external surfaces of the core except for the first end. The core is preferably made from quartz or ceramics, while the coating is preferably made from a polysilicon.Type: ApplicationFiled: June 16, 2003Publication date: December 16, 2004Inventors: Sundar Ramamurthy, Vedapuram Achutharaman, Ho T. Fang
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Patent number: 6803546Abstract: A thermal processing method is described in which a temperature response of a substrate may be controlled during a heat-up phase or a cool-down phase, or during both phases. This reduces the thermal budget of the substrate and improves the quality and performance of devices formed on the substrate. In particular, by controlling the rate of heat transfer between the substrate and a thermal reservoir (e.g., a water-cooled reflector plate assembly), the temperature response of the substrate may be controlled during the thermal process. The rate of heat transfer may be changed by changing the thermal conductivity between the substrate and the thermal reservoir, by changing the emissivity of a surface of the thermal reservoir, or by changing the distance between the substrate and the thermal reservoir.Type: GrantFiled: July 6, 2000Date of Patent: October 12, 2004Assignee: Applied Materials, Inc.Inventors: Ryan C Boas, Ajit Balakrishna, Benjamin Bierman, Brian L Haas, Dean Jennings, Wolfgang Aderhold, Sundar Ramamurthy, Abhilash Mayur
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Publication number: 20040126999Abstract: Lamp based spike annealing was improved to address the aggressive requirements of <100 nm Ultra Shallow Junction (USJ) technologies. Improvements focused on enhancing cool down rates, and thereby improving spike sharpness. Boron ion implanted substrates with varying ion-implanted energy and dose were then annealed to characterize the improvements in spike annealing. A greater than 10% improvement in sheet resistance and junction depth was realized on substrates that were annealed with the improved spike profile. The improved spike anneal had the same comparable uniformity to the standard spike anneal.Type: ApplicationFiled: September 22, 2003Publication date: July 1, 2004Applicant: APPLIED MATERIALS, INC.Inventors: Balasubramanian Ramachandran, Ravi Jallepally, Ryan C. Boas, Sundar Ramamurthy, Amir Al-Bayati, Houda Graoui, Joseph M. Spear
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Publication number: 20040079746Abstract: In a system for thermal processing of a semiconductor substrate, a reflector plate has a stepped surface facing the substrate during heating and cooling of the substrate. The raised surface of the reflector plate has reduced reflectivity, providing advantages during, among other things, cooling of the substrate. The reflector plate also includes a number of recesses to which one or more pyrometers are coupled. These recesses have a highly reflective surface, providing advantages in the performance of the pyrometers.Type: ApplicationFiled: October 24, 2002Publication date: April 29, 2004Applicant: Applied Materials, Inc.Inventors: Dean Jennings, Joseph M. Ranish, Brian Haas, Ajit Balakrishna, Sundar Ramamurthy, Aaron Hunter, Mark Yam