Abstract: A semiconductor device includes a substrate, first and second semiconductor strips, a dummy fin structure, first and second channel layers, a gate structure, and crystalline and amorphous hard mask layers. The first and second semiconductor strips extend upwardly from the substrate and each has a length extending along a first direction. The dummy fin structure is laterally between the first and second semiconductor strips. The first and second channel layers extend in the first direction above the first and second semiconductor strips and are arranged in a second direction substantially perpendicular to the substrate. The crystalline hard mask layer extends upwardly from the dummy fin structure and has an U-shaped cross section. The amorphous hard mask layer is in the crystalline hard mask layer. The amorphous hard mask layer has an U-shaped cross section conformal to the U-shaped cross section of the crystalline hard mask layer.

Abstract: A semiconductor device includes a pair of fin structures on a semiconductor substrate, each including a vertically stacked plurality of channel layers, a dielectric fin extending in parallel to and between the fin structures, and a gate structure on and extending perpendicularly to the fin structures, the gate structure engaging with the plurality of channel layers. The dielectric fin includes a fin bottom and a fin top over the fin bottom. The fin bottom has a top surface extending above a bottom surface of a topmost channel layer. The fin top includes a core and a shell, the core having a first dielectric material, the shell surrounding the core and having a second dielectric material different from the first dielectric material.

Abstract: A method includes patterning a trench and depositing a first insulating material along sidewalls and a bottom surface of the trench using a conformal deposition process. Depositing the first insulating material includes forming a first seam between a first portion of the first insulating material on a first sidewall of the trench and a second portion of the first insulating material on a second sidewall of the trench. The method further includes etching the first insulating material below a top of the trench and depositing a second insulating material over the first insulating material and in the trench using a conformal deposition process. Depositing the second insulating material comprises forming a second seam between a first portion of the second insulating material on the first sidewall of the trench and a second portion of the second insulating material on a second sidewall of the trench.

Abstract: Semiconductor structures and methods of forming the same are provided. A method according to the present disclosure includes forming a stack of epitaxial layers over a substrate, forming a first fin-like structure and a second fin-like structure from the stack, forming an isolation feature between the first fin-like structure and the second fin-like structure, forming a cladding layer over the first fin-like structure and the second fin-like structure, conformally depositing a first dielectric layer over the cladding layer, depositing a second dielectric layer over the first dielectric layer, planarizing the first dielectric layer and the second dielectric layer until the cladding layer are exposed, performing an etch process to etch the second dielectric layer to form a helmet recess, performing a trimming process to trim the first dielectric layer to widen the helmet recess, and depositing a helmet feature in the widened helmet recess.

Abstract: A method includes patterning a trench and depositing a first insulating material along sidewalls and a bottom surface of the trench using a conformal deposition process. Depositing the first insulating material includes forming a first seam between a first portion of the first insulating material on a first sidewall of the trench and a second portion of the first insulating material on a second sidewall of the trench. The method further includes etching the first insulating material below a top of the trench and depositing a second insulating material over the first insulating material and in the trench using a conformal deposition process. Depositing the second insulating material comprises forming a second seam between a first portion of the second insulating material on the first sidewall of the trench and a second portion of the second insulating material on a second sidewall of the trench.

Abstract: Semiconductor structures and methods of forming the same are provided. A method according to the present disclosure includes forming a stack of epitaxial layers over a substrate, forming a first fin-like structure and a second fin-like structure from the stack, forming an isolation feature between the first fin-like structure and the second fin-like structure, forming a cladding layer over the first fin-like structure and the second fin-like structure, conformally depositing a first dielectric layer over the cladding layer, depositing a second dielectric layer over the first dielectric layer, planarizing the first dielectric layer and the second dielectric layer until the cladding layer are exposed, performing an etch process to etch the second dielectric layer to form a helmet recess, performing a trimming process to trim the first dielectric layer to widen the helmet recess, and depositing a helmet feature in the widened helmet recess.

Abstract: The present disclosure provides methods of forming semiconductor devices. A method according to the present disclosure includes receiving a workpiece that includes a stack of semiconductor layers, depositing a first pad oxide layer on a germanium-containing top layer of the stack, depositing a second pad oxide layer on the first pad oxide layer, depositing a pad nitride layer on the second pad oxide layer, and patterning the stack using the first pad oxide layer, the second pad oxide layer, and the pad nitride layer as a hard mask layer. The depositing of the first pad oxide layer includes a first oxygen plasma power and the depositing of the second pad oxide layer includes a second oxygen plasma power greater than the first oxygen plasma power.

Abstract: Structures and methods of forming semiconductor devices are presented in which a void-free core-shell hard mask is formed over a gate electrode. The void-free core-shell hard mask may be formed in some embodiments by forming a first liner layer over the gate electrode, forming a void-free material over the first liner layer, recessing the void-free material, and forming a second liner over the recessed void-free material.

Abstract: A semiconductor device includes a first channel region, a second channel region, and a first insulating fin, the first insulating fin being interposed between the first channel region and the second channel region. The first insulating fin includes a lower portion and an upper portion. The lower portion includes a fill material. The upper portion includes a first dielectric layer on the lower portion, the first dielectric layer being a first dielectric material, a first capping layer on the first dielectric layer, the first capping layer being a second dielectric material, the second dielectric material being different than the first dielectric material, and a second dielectric layer on the first capping layer, the second dielectric layer being the first dielectric material.

Abstract: The present disclosure provides methods of forming semiconductor devices. A method according to the present disclosure includes receiving a workpiece that includes a stack of semiconductor layers, depositing a first pad oxide layer on a germanium-containing top layer of the stack, depositing a second pad oxide layer on the first pad oxide layer, depositing a pad nitride layer on the second pad oxide layer, and patterning the stack using the first pad oxide layer, the second pad oxide layer, and the pad nitride layer as a hard mask layer. The depositing of the first pad oxide layer includes a first oxygen plasma power and the depositing of the second pad oxide layer includes a second oxygen plasma power greater than the first oxygen plasma power.

Abstract: A method includes depositing a first mask over a target layer; forming a first mandrel and a second mandrel over the first mask; forming first spacers on the first mandrel and second spacers on the second mandrel; and selectively removing the second spacers while masking the first spacers. Masking the first spacers comprising covering the first spacers with a second mask and a capping layer over the second mask, and the capping layer comprises carbon. The method further includes patterning the first mask and transferring a pattern of the first mask to the target layer. Patterning the first mask comprises masking the first mask with the second mandrel, the first mandrel, and the first spacers.

Abstract: In an embodiment, a method includes: forming a photoresist over a target layer; performing a plasma-enhanced deposition process, the plasma-enhanced deposition process etching sidewalls of the photoresist while depositing a spacer layer on the sidewalls of the photoresist; patterning the spacer layer to form spacers on the sidewalls of the photoresist; and etching the target layer using the spacers and the photoresist as a combined etching mask.

Abstract: The present disclosure provides methods of forming semiconductor devices. A method according to the present disclosure includes receiving a workpiece that includes a stack of semiconductor layers, depositing a first pad oxide layer on a germanium-containing top layer of the stack, depositing a second pad oxide layer on the first pad oxide layer, depositing a pad nitride layer on the second pad oxide layer, and patterning the stack using the first pad oxide layer, the second pad oxide layer, and the pad nitride layer as a hard mask layer. The depositing of the first pad oxide layer includes a first oxygen plasma power and the depositing of the second pad oxide layer includes a second oxygen plasma power greater than the first oxygen plasma power.

Abstract: A method includes patterning a trench and depositing a first insulating material along sidewalls and a bottom surface of the trench using a conformal deposition process. Depositing the first insulating material includes forming a first seam between a first portion of the first insulating material on a first sidewall of the trench and a second portion of the first insulating material on a second sidewall of the trench. The method further includes etching the first insulating material below a top of the trench and depositing a second insulating material over the first insulating material and in the trench using a conformal deposition process. Depositing the second insulating material comprises forming a second seam between a first portion of the second insulating material on the first sidewall of the trench and a second portion of the second insulating material on a second sidewall of the trench.

Abstract: A four-layer photoresist and method of forming the same are disclosed. In an embodiment, a method includes forming a semiconductor fin; depositing a target layer on the semiconductor fin; depositing a BARC layer on the target layer; depositing a first mask layer over the BARC layer, the first mask layer being deposited using a plasma process with an RF power of less than 50 W; depositing a second mask layer over the first mask layer using a plasma process with an RF power of less than 500 W; depositing a photoresist layer over the second mask layer; patterning the photoresist layer, the second mask layer, the first mask layer, and the BARC layer to form a first mask; and selectively removing the target layer from a first portion of the semiconductor fin using the first mask, the target layer remaining on a second portion of the semiconductor fin.

Abstract: A system and methods of forming a dielectric material within a trench are described herein. In an embodiment of the method, the method includes introducing a first precursor into a trench of a dielectric layer, such that portions of the first precursor react with the dielectric layer and attach on sidewalls of the trench. The method further includes partially etching portions of the first precursor on the sidewalls of the trench to expose upper portions of the sidewalls of the trench. The method further includes introducing a second precursor into the trench, such that portions of the second precursor react with the remaining portions of the first precursor to form the dielectric material at the bottom of the trench.

Abstract: A four-layer photoresist and method of forming the same are disclosed. In an embodiment, a method includes forming a semiconductor fin; depositing a target layer on the semiconductor fin; depositing a BARC layer on the target layer; depositing a first mask layer over the BARC layer, the first mask layer being deposited using a plasma process with an RF power of less than 50 W; depositing a second mask layer over the first mask layer using a plasma process with an RF power of less than 500 W; depositing a photoresist layer over the second mask layer; patterning the photoresist layer, the second mask layer, the first mask layer, and the BARC layer to form a first mask; and selectively removing the target layer from a first portion of the semiconductor fin using the first mask, the target layer remaining on a second portion of the semiconductor fin.

Abstract: A four-layer photoresist and method of forming the same are disclosed. In an embodiment, a method includes forming a semiconductor fin; depositing a target layer on the semiconductor fin; depositing a BARC layer on the target layer; depositing a first mask layer over the BARC layer, the first mask layer being deposited using a plasma process with an RF power of less than 50 W; depositing a second mask layer over the first mask layer using a plasma process with an RF power of less than 500 W; depositing a photoresist layer over the second mask layer; patterning the photoresist layer, the second mask layer, the first mask layer, and the BARC layer to form a first mask; and selectively removing the target layer from a first portion of the semiconductor fin using the first mask, the target layer remaining on a second portion of the semiconductor fin.

Abstract: A four-layer photoresist and method of forming the same are disclosed. In an embodiment, a method includes forming a semiconductor fin; depositing a target layer on the semiconductor fin; depositing a BARC layer on the target layer; depositing a first mask layer over the BARC layer, the first mask layer being deposited using a plasma process with an RF power of less than 50 W; depositing a second mask layer over the first mask layer using a plasma process with an RF power of less than 500 W; depositing a photoresist layer over the second mask layer; patterning the photoresist layer, the second mask layer, the first mask layer, and the BARC layer to form a first mask; and selectively removing the target layer from a first portion of the semiconductor fin using the first mask, the target layer remaining on a second portion of the semiconductor fin.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a fin structure protruding from a semiconductor substrate. The fin structure includes a first portion and an overlying second portion. The first portion is formed of a material that is the same as that of the semiconductor substrate and different from that of the second portion. The semiconductor device structure also includes a liner structure and an isolation feature. The liner structure includes a carbon-doped silicon oxide film covering the semiconductor substrate and the first portion of the first fin structure and a nitrogen-containing film over the carbon-doped silicon oxide film. The isolation feature is over the nitrogen-containing film and surrounded by the liner structure.