Abstract: A wireless charging system for a vehicle includes a wireless power receiver receiving electric power wirelessly. A heat transfer device transferring heat generated from the wireless power receiver. A rechargeable battery is charged with the electric power received from the wireless power receiver and heated by receiving the heat that is transferred by the heat transfer device.

Abstract: A liquid crystal display includes a substrate, a plurality of signal lines, a gate driver, and a sealant. The substrate includes a display area and a peripheral area outside the display area. The signal lines are integrated with the substrate and include a clock signal line. The gate driver includes a stage located between the clock signal line and the display area. The stage is integrated with the substrate and is configured to apply a gate voltage to the display area. The sealant is distributed over part of the peripheral area. A seal region where the sealant is distributed includes a seal line, and the clock signal line is located within the seal line. The clock signal line is located further away from the stage than the other signal lines.

Abstract: A thin film transistor array panel includes: a data line which extends in a column direction and transfers a data voltage; a first pixel electrode and a second pixel electrode connected to the data line and adjacent in a row direction; a first thin film transistor connected to the first pixel electrode and the data line, and including a first source electrode and a first drain electrode; and a second thin film transistor connected to the second pixel electrode and the data line, and including a second source electrode and a second drain electrode. The first pixel electrode is at the right of the data line, the second pixel electrode is at the left of the data line, and relative positions of the first source electrode and the first drain electrode are the same as relative positions of the second source electrode and the second drain electrode.

Abstract: A method of fabricating a customized orthodontic appliance includes a setup model forming step of preparing a setup model corresponding to teeth after ideal orthodontic treatment for a patient, an arch wire forming step of preparing an arch wire corresponding to a dental arch of the setup model while being disposed to closely approach tooth surfaces of teeth of the setup model, and an orthodontic bracket forming step of forming a bracket body corresponding to each of the teeth with reference to the arch wire. Through this, the customized orthodontic appliance capable of minimizing the distance between the tooth surface and the arch wire to accurately perform the ideal orthodontic treatment is fabricated. Also, convenience and accuracy of procedure is improved, and irritating sensation in the oral cavity is minimized.

Abstract: A thin film transistor is provided as follows. A first gate electrode and a second gate electrode are stacked on each other. A semiconductor layer is interposed between the first and second gate electrodes. A source electrode and a drain electrode are interposed between the semiconductor layer and the second gate electrode. A connection electrode connects electrically the first gate electrode and the second gate electrode. A first insulating film is interposed between the first gate electrode and the semiconductor layer. A second insulating film includes a first part interposed between the semiconductor layer and the second gate electrode and a second part interposed between the second gate electrode and the drain electrode. A third insulating film includes a first part interposed between the connection electrode and the second gate electrode.

Abstract: A thin film transistor is provided as follows. A first gate electrode and a second gate electrode are stacked on each other. A semiconductor layer is interposed between the first and second gate electrodes. A source electrode and a drain electrode are interposed between the semiconductor layer and the second gate electrode. A connection electrode connects electrically the first gate electrode and the second gate electrode. A first insulating film is interposed between the first gate electrode and the semiconductor layer. A second insulating film includes a first part interposed between the semiconductor layer and the second gate electrode and a second part interposed between the second gate electrode and the drain electrode. A third insulating film includes a first part interposed between the connection electrode and the second gate electrode.

Abstract: Disclosed are a positive electrode for a lithium ion battery and a lithium ion battery comprising the same. The positive electrode for a lithium ion battery includes a composite conductive layer comprising a binder and a conductive and is formed on a positive electrode active material layer, such that output and safety is improved at the same time. Further, battery life time is improved by inhibiting reaction on the interface between the electrode active material and a separator.

Abstract: A thin film transistor is provided as follows. A first gate electrode and a second gate electrode are stacked on each other. A semiconductor layer is interposed between the first and second gate electrodes. A source electrode and a drain electrode are interposed between the semiconductor layer and the second gate electrode. A connection electrode connects electrically the first gate electrode and the second gate electrode. A first insulating film is interposed between the first gate electrode and the semiconductor layer. A second insulating film includes a first part interposed between the semiconductor layer and the second gate electrode and a second part interposed between the second gate electrode and the drain electrode. A third insulating film includes a first part interposed between the connection electrode and the second gate electrode.

Abstract: A liquid crystal display includes: a first insulation substrate; a first gate conductor disposed on the first insulation substrate and in a same layer as a gate line and a second gate conductor disposed on the first insulation substrate and in the same layer as the gate line; a gate insulating layer disposed on the first gate conductor and the second gate conductor; a data conductor disposed on the gate insulating layer and in a same layer as a data line; a thin film transistor disposed on the first insulation substrate; a first spacer disposed on the first insulation substrate; and a second spacer disposed on the first insulation substrate, where heights or widths of the first and second spacers are different from each other and having different heights or widths, and the second spacer overlaps the first gate conductor and the second gate conductor.

Abstract: A liquid crystal display includes a substrate, a plurality of signal lines, a gate driver, and a sealant. The substrate includes a display area and a peripheral area outside the display area. The signal lines are integrated with the substrate and include a clock signal line. The gate driver includes a stage located between the clock signal line and the display area. The stage is integrated with the substrate and is configured to apply a gate voltage to the display area. The sealant is distributed over part of the peripheral area. A seal region where the sealant is distributed includes a seal line, and the clock signal line is located within the seal line. The clock signal line is located further away from the stage than the other signal lines.

Abstract: An image forming apparatus includes a phase controller for controlling input power applied to a heating body through phase control. The image forming apparatus includes a fuser having the heating body, a switching unit supplying the input power to the heating body, and a phase controller determining an input phase of the input power based on a temperature of the fuser, in which the phase controller further controls the switching unit to vary a phase of the input power supplied to the heating body within a phase range set based on the input phase, for each control cycle of the input power.

Abstract: A thin film transistor array panel includes: a data line which extends in a column direction and transfers a data voltage; a first pixel electrode and a second pixel electrode connected to the data line and adjacent in a row direction; a first thin film transistor connected to the first pixel electrode and the data line, and including a first source electrode and a first drain electrode; and a second thin film transistor connected to the second pixel electrode and the data line, and including a second source electrode and a second drain electrode. The first pixel electrode is at the right of the data line, the second pixel electrode is at the left of the data line, and relative positions of the first source electrode and the first drain electrode are the same as relative positions of the second source electrode and the second drain electrode.

Abstract: A liquid crystal display includes a substrate, a plurality of signal lines, a gate driver, and a sealant. The substrate includes a display area and a peripheral area outside the display area. The signal lines are integrated with the substrate and include a clock signal line. The gate driver includes a stage located between the clock signal line and the display area. The stage is integrated with the substrate and is configured to apply a gate voltage to the display area. The sealant is distributed over part of the peripheral area. A seal region where the sealant is distributed includes a seal line, and the clock signal line is located within the seal line. The clock signal line is located further away from the stage than the other signal lines.

Abstract: A display apparatus includes a plurality of first gate lines extended in a first direction and disposed on a substrate on which a plurality of pixels is disposed, a plurality of second gate line extended in a second direction to cross the first gate lines, a plurality of data lines disposed substantially parallel to the first gate lines, and a first insulating layer disposed between the first gate lines and the second gate lines and provided with a plurality of via holes to expose a portion of a corresponding first gate line of the first gate lines. Each of the first gate lines makes contact with a corresponding second gate line of the second gate lines through a corresponding via hole of the via holes.

Abstract: The present disclosure relates to an apparatus and method supportive of distributed turbo coding based on relay network utilizing a noisy network coding scheme. For this, included is a relay node operating as a component encoder to relay a signal from a source node to a next node in a distributed turbo coding scheme. The relay node quantizes the signal transmitted from the source node and then interleaves the quantized signal using a predetermined pattern to distinguish the signal transmitted from the source node from a signal to be output from an opposing node, so that the signal transmitted from the source node is relayed to the next node based on a noisy network coding scheme.

Abstract: A thin film transistor array panel includes: a data line which extends in a column direction and transfers a data voltage; a first pixel electrode and a second pixel electrode connected to the data line and adjacent in a row direction; a first thin film transistor connected to the first pixel electrode and the data line, and including a first source electrode and a first drain electrode; and a second thin film transistor connected to the second pixel electrode and the data line, and including a second source electrode and a second drain electrode. The first pixel electrode is at the right of the data line, the second pixel electrode is at the left of the data line, and relative positions of the first source electrode and the first drain electrode are the same as relative positions of the second source electrode and the second drain electrode.

Abstract: A multiple multicast network system and method for ensuring reliability in such a network are provided. A multiple multicast method in a multiple multicast network system may include grouping terminals having data to be transmitted to each other in a group. The method transmits, by each of the terminals in the group, data of each of the terminals to the other terminals in the group. In response to receiving the data, the method provides, to the terminals in the group, as feedback, missing packet information, and generates, by a terminal among the terminals in the group, a secondary network-coded packet by performing network coding based on a successfully received packet and data of each of the terminal, and transmits the secondary network-coded packet to the other terminals in the group based on the missing packet information.

Abstract: A wireless multi-hop network includes a source node, at least one relay node, and a destination node. Each relay node is configured to perform partial decoding on a received signal including at least one previous-hop transmission signal according to a predefined function to calculate a function signal for the at least one previous-hop transmission signal, and encode the function signal and transmit the encoded function signal to a next hop. A destination node includes a receiver configured to obtain a received signal comprising a combination of a plurality of transmission signals for transmission by a source node and to be relayed by at least one relay node, and a decoder configured to configure a decoder graph corresponding to channel coding by the source node and relay nodes and to joint-decode the received signal according to the decoder graph to detect information blocks from the received signal.

Abstract: A display substrate includes a data line, a gate line and a fan-out line. The data line is disposed in a display area of a base substrate and transfers a data signal to a switching element electrically connected to a pixel electrode. The gate line is disposed in the display area and transfers a gate signal to the switching element. The fan-out line is disposed in a peripheral area of the base substrate surrounding the display area, electrically connected to at least one of the data line and the gate line, and includes a plurality of conductive layers making contact with each other through a contact hole.