Abstract: A display device includes a first electrode, a pixel define layer disposed on the first electrode, the pixel define layer including an opening, an organic emission layer disposed on the pixel define layer, the organic emission layer in electrical communication with the first electrode through the opening, a second electrode disposed on the organic emission layer, a light recycle layer disposed on the second electrode, and a color filter layer disposed on the light recycle layer, the color filter layer including a quantum dot, wherein a width of the organic emission layer is longer than a width of the color filter layer.

Abstract: Provided are an organic light-emitting diode (“OLED”) including a bottom electrode, a top electrode disposed opposite to the bottom electrode, and an organic layer that is interposed between the bottom electrode and the top electrode and includes a hole-transporting host and an electron-transporting host forming an exciplex and a phosphorescent dopant having a triplet energy which is lower than the triplet energy of the hole-transporting host, the triplet energy of the electron-transporting host, and the triplet energy of the exciplex, and a lighting device and a display apparatus including the OLED. Instead of a phosphorescent dopant, the fluorescent dopant having a singlet energy which is lower than the singlet energy of the exciplex may be also used.

Abstract: A display device includes an organic emission layer in which a first pixel area, a second pixel area and a third pixel area are defined, a color filter layer disposed on the organic emission layer and including first to third color filters overlapping the first to third pixel areas, respectively, where the first to third color filters emit first light to third light, respectively, a first optical filter layer disposed on the color filter layer and which transmits at least one of the first light and the second light and reflects or absorbs the third light, and a light-focusing layer disposed between the color filter layer and the organic emission layer and including first to third light-focusing parts overlapping the first to third pixel areas, respectively, where at least one of the first to third color filters includes quantum dots.

Abstract: A three-dimensional (3D) semiconductor device includes a stack structure including first and second stacks stacked on a substrate. Each of the first and second stacks includes a first electrode and a second electrode on the first electrode. A sidewall of the second electrode of the first stack is horizontally spaced apart from a sidewall of the second electrode of the second stack by a first distance. A sidewall of the first electrode is horizontally spaced apart from the sidewall of the second electrode by a second distance in each of the first and second stacks. The second distance is smaller than a half of the first distance.

Abstract: A display device includes a first electrode, a pixel define layer disposed on the first electrode, the pixel define layer including an opening, an organic emission layer disposed on the pixel define layer, the organic emission layer in electrical communication with the first electrode through the opening, a second electrode disposed on the organic emission layer, a light recycle layer disposed on the second electrode, and a color filter layer disposed on the light recycle layer, the color filter layer including a quantum dot, wherein a width of the organic emission layer is longer than a width of the color filter layer.

Abstract: A display device including a light source including a first electrode having a light reflectance for a first light of greater than or equal to about 60%; an organic light emitting layer disposed on the first electrode and emitting the first light; and a second electrode disposed on the organic light emitting layer and having a light transmittance in a visible wavelength region of greater than or equal to about 70%, wherein the light source has a first absorption peak in a wavelength region of about 650 nanometers (nm) to about 750 nm or a second absorption peak in a wavelength region of about 550 nm to about 600 nm at a viewing angle of about 55 degrees to about 85 degrees, and a color filter layer disposed above the light source and including a quantum dot configured to convert the first light into a second light.

Abstract: A manufacturing method thereof, and the catalyst for removing the nitrogen oxide includes a powdery gamma alumina support on which at least one selected from a group of titanium (Ti), lanthanum (La), or zirconium (Zr) is supported, wherein the support may be further supported with iridium (Ir) and ruthenium (Ru).

Abstract: Proposed is a CFRP surface coating method and a hydraulic cylinder including a component coated by the method. The CFRP surface coating method can prevent damage to a CFRP surface due to thermal spray coating and increase the bonding strength between a CFRP surface and a metal coating layer formed by the thermal spray coating. To this end, the method includes: forming a mesh layer on a CFRP surface; fixing the mesh layer on the CFRP surface by impregnating a heat-resistant resin therein; and forming a metal coating layer by thermal spray coating on the fixed mesh layer in which the heat-resistant resin is impregnated.

Abstract: Disclosed herein is a method for preparing a multilayer of nanocrystals. The method comprises the steps of (i) coating nanocrystals surface-coordinated by a photosensitive compound, or a mixed solution of a photosensitive compound and nanocrystals surface-coordinated by a material miscible with the photosensitive compound, on a substrate, drying the coated substrate, and exposing the dried substrate to UV light to form a first monolayer of nanocrystals, and (ii) repeating the procedure of step (i) to form one or more monolayers of nanocrystals on the first monolayer of nanocrystals.

Abstract: A three-dimensional semiconductor memory device including a gate-stack structure on a base substrate, the gate-stack structure including gate electrodes stacked in a direction perpendicular to a surface of the base substrate and spaced apart from each other; a through region penetrating through the gate-stack structure and surrounded by the gate-stack structure; and first vertical channel structures and second vertical channel structures on both sides of the through region and penetrating through the gate-stack structure, wherein the through region is between the first vertical channel structures and the second vertical channel structures.

Abstract: Three-dimensional (3D) semiconductor memory devices and methods of manufacturing the same are provided. Three-dimensional (3D) semiconductor memory devices may include a substrate including a cell array region and a connection region, a lower stack structure including a plurality of lower electrodes vertically stacked on the substrate, the lower stack structure having a first stair step structure extending in a first direction on the connection region and a second stair step structure extending in a second direction substantially perpendicular to the first direction on the connection region, and a plurality of intermediate stack structures vertically stacked on the lower stack structure. Each of the intermediate stack structures includes a plurality of intermediate electrodes vertically stacked and has a third stair step structure extending in the second direction on the connection region.

Abstract: Vertical memory devices and methods of forming the same are provided. The devices may include a gate line structure including gate lines that are stacked in a first direction and extend in a second direction. The device may also include a first step pattern structure including extended gate lines extending from the gate lines and including first step layers and a second step pattern structure contacting the first step pattern structure, including the extended gate lines and including second step layers. An n-th extended gate line (n is an even number) may be disposed at an upper portion of each of the first step layers, and an (n-1)-th extended gate line may be disposed at an upper portion of each of the second step layers. Each of exposed portions of the (n-1)-th extended gate lines serves as a pad region, and the pad regions have different areas.

Abstract: A three-dimensional semiconductor device including: a peripheral circuit structure disposed between first and second substrates and including a plurality of peripheral interconnections; a gate-stack structure disposed on the second substrate and including a plurality of gate electrodes stacked and spaced apart from each other in a direction perpendicular to an upper surface of the second substrate, wherein the plurality of gate electrodes include a lower gate electrode, a plurality of intermediate gate electrodes disposed on the lower gate electrode, and an upper gate electrode disposed on the plurality of intermediate gate electrodes; a first through region passing through the second substrate and disposed below the gate-stack structure; a second through region passing through the second substrate and the gate-stack structure; and a first peripheral connection plug passing through the first through region and electrically connecting the lower gate electrode to a first peripheral interconnection of the periph

Abstract: A three-dimensional (3D) semiconductor device includes a stack structure including first and second stacks stacked on a substrate. Each of the first and second stacks includes a first electrode and a second electrode on the first electrode. A sidewall of the second electrode of the first stack is horizontally spaced apart from a sidewall of the second electrode of the second stack by a first distance. A sidewall of the first electrode is horizontally spaced apart from the sidewall of the second electrode by a second distance in each of the first and second stacks. The second distance is smaller than a half of the first distance.

Abstract: Vertical memory devices and methods of forming the same are provided. The devices may include a gate line structure including gate lines that are stacked in a first direction and extend in a second direction. The device may also include a first step pattern structure including extended gate lines extending from the gate lines and including first step layers and a second step pattern structure contacting the first step pattern structure, including the extended gate lines and including second step layers. An n-th extended gate line (n is an even number) may be disposed at an upper portion of each of the first step layers, and an (n-1)-th extended gate line may be disposed at an upper portion of each of the second step layers. Each of exposed portions of the (n-1)-th extended gate lines serves as a pad region, and the pad regions have different areas.

Abstract: A display device includes a first electrode, a pixel define layer disposed on the first electrode, the pixel define layer including an opening, an organic emission layer disposed on the pixel define layer, the organic emission layer in electrical communication with the first electrode through the opening, a second electrode disposed on the organic emission layer, a light recycle layer disposed on the second electrode, and a color filter layer disposed on the light recycle layer, the color filter layer including a quantum dot, wherein a width of the organic emission layer is longer than a width of the color filter layer.

Abstract: A three-dimensional semiconductor memory device includes a substrate including a cell array region and a connection region and an electrode structure including first and second electrodes alternatingly and vertically stacked on the substrate and having a stair-step structure on the connection region. Each of the first and second electrodes may include electrode portions provided on the cell array region to extend in a first direction and to be spaced apart from each other in a second direction perpendicular to the first direction, an electrode connecting portion provided on the connection region to extend in the second direction and to horizontally connect the electrode portions to each other, and protrusions provided on the connection region to extend from the electrode connecting portion in the first direction and to be spaced apart from each other in the second direction.

Abstract: A memory device includes a memory cell on a first region of a substrate. An active region is in a second region neighboring the first region of the substrate, and an extension direction of the active region has an acute angle with the <110> direction of the substrate. A transistor serving as a peripheral circuit is on the second region of the substrate. In the memory device, defects or failures due to a crystal defects or a dislocation of the substrate may decrease.

Abstract: A display device including a light source including a first electrode having a light reflectance for a first light of greater than or equal to about 60%; an organic light emitting layer disposed on the first electrode and emitting the first light; and a second electrode disposed on the organic light emitting layer and having a light transmittance in a visible wavelength region of greater than or equal to about 70%, wherein the light source has a first absorption peak in a wavelength region of about 650 nanometers (nm) to about 750 nm or a second absorption peak in a wavelength region of about 550 nm to about 600 nm at a viewing angle of about 55 degrees to about 85 degrees, and a color filter layer disposed above the light source and including a quantum dot configured to convert the first light into a second light.

Abstract: A three-dimensional semiconductor memory device includes a substrate including a cell array region and a connection region and an electrode structure including first and second electrodes alternatingly and vertically stacked on the substrate and having a stair-step structure on the connection region. Each of the first and second electrodes may include electrode portions provided on the cell array region to extend in a first direction and to be spaced apart from each other in a second direction perpendicular to the first direction, an electrode connecting portion provided on the connection region to extend in the second direction and to horizontally connect the electrode portions to each other, and protrusions provided on the connection region to extend from the electrode connecting portion in the first direction and to be spaced apart from each other in the second direction.