Patents by Inventor Sung-Hun Lee

Sung-Hun Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190237477
    Abstract: A three-dimensional semiconductor memory device including a gate-stack structure on a base substrate, the gate-stack structure including gate electrodes stacked in a direction perpendicular to a surface of the base substrate and spaced apart from each other; a through region penetrating through the gate-stack structure and surrounded by the gate-stack structure; and first vertical channel structures and second vertical channel structures on both sides of the through region and penetrating through the gate-stack structure, wherein the through region is between the first vertical channel structures and the second vertical channel structures.
    Type: Application
    Filed: October 17, 2018
    Publication date: August 1, 2019
    Inventors: Seok Cheon BAEK, Sung Hun LEE
  • Publication number: 20190237475
    Abstract: A three-dimensional semiconductor device including: a peripheral circuit structure disposed between first and second substrates and including a plurality of peripheral interconnections; a gate-stack structure disposed on the second substrate and including a plurality of gate electrodes stacked and spaced apart from each other in a direction perpendicular to an upper surface of the second substrate, wherein the plurality of gate electrodes include a lower gate electrode, a plurality of intermediate gate electrodes disposed on the lower gate electrode, and an upper gate electrode disposed on the plurality of intermediate gate electrodes; a first through region passing through the second substrate and disposed below the gate-stack structure; a second through region passing through the second substrate and the gate-stack structure; and a first peripheral connection plug passing through the first through region and electrically connecting the lower gate electrode to a first peripheral interconnection of the periph
    Type: Application
    Filed: September 20, 2018
    Publication date: August 1, 2019
    Inventors: EUN TAEK JUNG, Sung Hun LEE
  • Patent number: 10332939
    Abstract: An organic light emitting diode includes a first electrode and a second electrode overlapping each other, an emission layer disposed between the first electrode and the second electrode, and a hole transport layer disposed between the first electrode and the emission layer, the hole transport layer having a refractive index in a range of 1.0 to 1.6, in which the organic light emitting diode has a microcavity structure between the first electrode and the second electrode.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: June 25, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sung Hun Lee, Il Soo Park, Seul Ong Kim, Hyo Sup Shin
  • Publication number: 20190163008
    Abstract: A display device includes: a display panel; a bottom chassis in which the display panel is accommodated; a driving circuit substrate disposed on an outside surface of the bottom chassis; at least one flexible printed circuit board connecting the display panel to the driving circuit substrate; and a top chassis configured to cover an edge portion of a top surface and side surfaces of the display panel, wherein the top chassis has an opening formed in an area in contact with the flexible printed circuit board.
    Type: Application
    Filed: January 30, 2019
    Publication date: May 30, 2019
    Inventors: SU YOUNG YUN, SUNG HUN LEE, JOO HYUK PARK
  • Publication number: 20190164988
    Abstract: A memory device includes a memory cell on a first region of a substrate. An active region is in a second region neighboring the first region of the substrate, and an extension direction of the active region has an acute angle with the <110> direction of the substrate. A transistor serving as a peripheral circuit is on the second region of the substrate. In the memory device, defects or failures due to a crystal defects or a dislocation of the substrate may decrease.
    Type: Application
    Filed: January 29, 2019
    Publication date: May 30, 2019
    Inventors: SUNG-HUN LEE, JONG-HO PARK, JOON-HEE LEE, HEE-JUENG LEE
  • Publication number: 20190148295
    Abstract: A three-dimensional (3D) semiconductor device includes a stack structure including first and second stacks stacked on a substrate. Each of the first and second stacks includes a first electrode and a second electrode on the first electrode. A sidewall of the second electrode of the first stack is horizontally spaced apart from a sidewall of the second electrode of the second stack by a first distance. A sidewall of the first electrode is horizontally spaced apart from the sidewall of the second electrode by a second distance in each of the first and second stacks. The second distance is smaller than a half of the first distance.
    Type: Application
    Filed: January 15, 2019
    Publication date: May 16, 2019
    Inventors: Sung-Hun Lee, Seokjung Yun, Chang-Sup Lee, Seong Soon Cho, Jeehoon Han
  • Publication number: 20190097155
    Abstract: Provided are an organic light-emitting diode (“OLED”) including a bottom electrode, a top electrode disposed opposite to the bottom electrode, and an organic layer that is interposed between the bottom electrode and the top electrode and includes a hole-transporting host and an electron-transporting host forming an exciplex and a phosphorescent dopant having a triplet energy which is lower than the triplet energy of the hole-transporting host, the triplet energy of the electron-transporting host, and the triplet energy of the exciplex, and a lighting device and a display apparatus including the OLED. Instead of a phosphorescent dopant, the fluorescent dopant having a singlet energy which is lower than the singlet energy of the exciplex may be also used.
    Type: Application
    Filed: November 21, 2018
    Publication date: March 28, 2019
    Inventors: Jang Joo KIM, Young Seo PARK, Sung Hun LEE, Kwon Hyeon KIM
  • Patent number: 10228579
    Abstract: A display device includes: a display panel; a bottom chassis in which the display panel is accommodated; a driving circuit substrate disposed on an outside surface of the bottom chassis; at least one flexible printed circuit board connecting the display panel to the driving circuit substrate; and a top chassis configured to cover an edge portion of a top surface and side surfaces of the display panel, wherein the top chassis has an opening formed in an area in contact with the flexible printed circuit board.
    Type: Grant
    Filed: July 19, 2016
    Date of Patent: March 12, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Su Young Yun, Sung Hun Lee, Joo Hyuk Park
  • Patent number: 10211154
    Abstract: A three-dimensional (3D) semiconductor device includes a stack structure including first and second stacks stacked on a substrate. Each of the first and second stacks includes a first electrode and a second electrode on the first electrode. A sidewall of the second electrode of the first stack is horizontally spaced apart from a sidewall of the second electrode of the second stack by a first distance. A sidewall of the first electrode is horizontally spaced apart from the sidewall of the second electrode by a second distance in each of the first and second stacks. The second distance is smaller than a half of the first distance.
    Type: Grant
    Filed: November 14, 2016
    Date of Patent: February 19, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Hun Lee, Seokjung Yun, Chang-Sup Lee, Seong Soon Cho, Jeehoon Han
  • Patent number: 10204918
    Abstract: A memory device includes a memory cell on a first region of a substrate. An active region is in a second region neighboring the first region of the substrate, and an extension direction of the active region has an acute angle with the <110> direction of the substrate. A transistor serving as a peripheral circuit is on the second region of the substrate. In the memory device, defects or failures due to a crystal defects or a dislocation of the substrate may decrease.
    Type: Grant
    Filed: October 5, 2016
    Date of Patent: February 12, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Hun Lee, Jong-Ho Park, Joon-Hee Lee, Hee-Jueng Lee
  • Patent number: 10177329
    Abstract: Provided are an organic light-emitting diode (“OLED”) including a bottom electrode, a top electrode disposed opposite to the bottom electrode, and an organic layer that is interposed between the bottom electrode and the top electrode and includes a hole-transporting host and an electron-transporting host forming an exciplex and a phosphorescent dopant having a triplet energy which is lower than the triplet energy of the hole-transporting host, the triplet energy of the electron-transporting host, and the triplet energy of the exciplex, and a lighting device and a display apparatus including the OLED. Instead of a phosphorescent dopant, the fluorescent dopant having a singlet energy which is lower than the singlet energy of the exciplex may be also used.
    Type: Grant
    Filed: April 10, 2013
    Date of Patent: January 8, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD
    Inventors: Jang Joo Kim, Young Seo Park, Sung Hun Lee, Kwon Hyeon Kim
  • Patent number: 10159168
    Abstract: A display device includes a display panel including a top surface and a bottom surface facing the top surface in a normal direction, a mold member including a seat surface and an outer surface, the bottom surface of the display panel being positioned on the seat surface of the mold member, an adhesion member between the bottom surface and the seat surface to fix the bottom surface to the seat surface, a heating wire contacting the adhesion member, and an accommodation member coupled to the mold member.
    Type: Grant
    Filed: October 28, 2016
    Date of Patent: December 18, 2018
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Minsu Jung, Byungchan Kim, Hyunsu Park, Sung-hun Lee
  • Publication number: 20180336950
    Abstract: Three-dimensional (3D) semiconductor memory devices and methods of manufacturing the same are provided. Three-dimensional (3D) semiconductor memory devices may include a substrate including a cell array region and a connection region, a lower stack structure including a plurality of lower electrodes vertically stacked on the substrate, the lower stack structure having a first stair step structure extending in a first direction on the connection region and a second stair step structure extending in a second direction substantially perpendicular to the first direction on the connection region, and a plurality of intermediate stack structures vertically stacked on the lower stack structure. Each of the intermediate stack structures includes a plurality of intermediate electrodes vertically stacked and has a third stair step structure extending in the second direction on the connection region.
    Type: Application
    Filed: July 20, 2018
    Publication date: November 22, 2018
    Inventors: Da Woon JEONG, Sung-Hun LEE, Seokjung YUN, Hyunmog PARK, JoongShik SHIN, Young-Bae YOON
  • Publication number: 20180315772
    Abstract: A three-dimensional semiconductor memory device includes a substrate including a cell array region and a connection region and an electrode structure including first and second electrodes alternatingly and vertically stacked on the substrate and having a stair-step structure on the connection region. Each of the first and second electrodes may include electrode portions provided on the cell array region to extend in a first direction and to be spaced apart from each other in a second direction perpendicular to the first direction, an electrode connecting portion provided on the connection region to extend in the second direction and to horizontally connect the electrode portions to each other, and protrusions provided on the connection region to extend from the electrode connecting portion in the first direction and to be spaced apart from each other in the second direction.
    Type: Application
    Filed: June 26, 2018
    Publication date: November 1, 2018
    Inventors: Chang-Sup Lee, Sung-Hun Lee, Joonhee Lee, Seong Soon Cho
  • Patent number: 10049744
    Abstract: Three-dimensional (3D) semiconductor memory devices and methods of manufacturing the same are provided. Three-dimensional (3D) semiconductor memory devices may include a substrate including a cell array region and a connection region, a lower stack structure including a plurality of lower electrodes vertically stacked on the substrate, the lower stack structure having a first stair step structure extending in a first direction on the connection region and a second stair step structure extending in a second direction substantially perpendicular to the first direction on the connection region, and a plurality of intermediate stack structures vertically stacked on the lower stack structure. Each of the intermediate stack structures includes a plurality of intermediate electrodes vertically stacked and has a third stair step structure extending in the second direction on the connection region.
    Type: Grant
    Filed: December 19, 2016
    Date of Patent: August 14, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Da Woon Jeong, Sung-Hun Lee, Seokjung Yun, Hyunmog Park, JoongShik Shin, Young-Bae Yoon
  • Patent number: 10032791
    Abstract: A three-dimensional semiconductor memory device includes a substrate including a cell array region and a connection region and an electrode structure including first and second electrodes alternatingly and vertically stacked on the substrate and having a stair-step structure on the connection region. Each of the first and second electrodes may include electrode portions provided on the cell array region to extend in a first direction and to be spaced apart from each other in a second direction perpendicular to the first direction, an electrode connecting portion provided on the connection region to extend in the second direction and to horizontally connect the electrode portions to each other, and protrusions provided on the connection region to extend from the electrode connecting portion in the first direction and to be spaced apart from each other in the second direction.
    Type: Grant
    Filed: January 11, 2017
    Date of Patent: July 24, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-Sup Lee, Sung-Hun Lee, Joonhee Lee, Seong Soon Cho
  • Patent number: 9929239
    Abstract: The present disclosure relates to a semiconductor device including an oxygen gettering layer between a group III-V compound semiconductor layer and a dielectric layer, and a method of fabricating the semiconductor device. The semiconductor device may include a compound semiconductor layer; a dielectric layer disposed on the compound semiconductor layer; and an oxygen gettering layer interposed between the compound semiconductor layer and the dielectric layer. The oxygen gettering layer includes a material having a higher oxygen affinity than a material of the compound semiconductor layer.
    Type: Grant
    Filed: February 23, 2016
    Date of Patent: March 27, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-soo Lee, Myoung-jae Lee, Seong-ho Cho, Mohammad Rakib Uddin, David Seo, Moon-seung Yang, Sang-moon Lee, Sung-hun Lee, Ji-hyun Hur, Eui-chul Hwang
  • Publication number: 20170330919
    Abstract: An organic light emitting diode includes a first electrode and a second electrode overlapping each other, an emission layer disposed between the first electrode and the second electrode, and a hole transport layer disposed between the first electrode and the emission layer, the hole transport layer having a refractive index in a range of 1.0 to 1.6, in which the organic light emitting diode has a microcavity structure between the first electrode and the second electrode.
    Type: Application
    Filed: March 21, 2017
    Publication date: November 16, 2017
    Inventors: Sung Hun LEE, II Soo Park, Seul Ong Kim, Hyo Sup Shin
  • Publication number: 20170325364
    Abstract: A display device includes a display panel including a top surface and a bottom surface facing the top surface in a normal direction, a mold member including a seat surface and an outer surface, the bottom surface of the display panel being positioned on the seat surface of the mold member, an adhesion member between the bottom surface and the seat surface to fix the bottom surface to the seat surface, a heating wire contacting the adhesion member, and an accommodation member coupled to the mold member.
    Type: Application
    Filed: October 28, 2016
    Publication date: November 9, 2017
    Inventors: Minsu JUNG, Byungchan KIM, Hyunsu PARK, Sung-hun LEE
  • Patent number: 9728587
    Abstract: An organic light emitting diode device is disclosed. The organic light emitting diode device includes a color calibration layer which is applied to the white sub-pixel. The color calibration layer selectively absorbs light in a given wavelength region thereby increasing luminance due to the white sub-pixel while simultaneously preventing the deformation of white color coordination. The contrast ratio may also be improved by reducing the reflection of external light, thereby minimizing the need for a polarizer, and the thickness of the device may thus be decreased and processing costs may be reduced.
    Type: Grant
    Filed: December 1, 2010
    Date of Patent: August 8, 2017
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sung-Hun Lee, Jung-Bae Song, Gwan-Hyoung Lee