Patents by Inventor Sung-won Jeong

Sung-won Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210217738
    Abstract: A display device includes a substrate and a display element layer on the substrate. The display element layer includes: first and second electrodes extending along a first direction and spaced apart from each other in a second direction; and light emitting elements electrically connected to the first and second electrodes. The first electrode has a first convex portion convex toward the second electrode and a first concave portion concave in a direction away from the second electrode, and the second electrode has a second convex portion convex toward the first electrode and a second concave portion concave in a direction away from the first electrode. The light emitting elements includes a first and second light emitting elements, respectively close to the first concave portion and the second concave portion based on an imaginary extension line extending in the first direction between the first electrode and the second electrode.
    Type: Application
    Filed: November 10, 2020
    Publication date: July 15, 2021
    Inventors: Su Bin BAE, Seon Il KIM, Sung Won CHO, Yun Jong YEO, Yu Gwang JEONG
  • Publication number: 20210118791
    Abstract: A fan-out semiconductor package includes: an interconnection member including a first insulating layer, first and second pads respectively disposed on opposite sides of the first insulating layer and a first via connecting the first and second pads to each other; a semiconductor chip disposed on the interconnection member; and an encapsulant encapsulating at least portions of the semiconductor chip. A center line of the first via is out of alignment with at least one of a center line of the first pad and a center line of the second pad.
    Type: Application
    Filed: December 7, 2020
    Publication date: April 22, 2021
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sun Ho Kim, Ji Hoon Kim, Ha Young Ahn, Shang Hoon Seo, Seung Yeop Kook, Sung Won Jeong
  • Patent number: 10861784
    Abstract: A fan-out semiconductor package includes: an interconnection member including a first insulating layer, first and second pads respectively disposed on opposite sides of the first insulating layer and a first via connecting the first and second pads to each other; a semiconductor chip disposed on the interconnection member; and an encapsulant encapsulating at least portions of the semiconductor chip. A center line of the first via is out of alignment with at least one of a center line of the first pad and a center line of the second pad.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: December 8, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sun Ho Kim, Ji Hoon Kim, Ha Young Ahn, Shang Hoon Seo, Seung Yeop Kook, Sung Won Jeong
  • Publication number: 20200294904
    Abstract: A fan-out semiconductor package includes: an interconnection member including a first insulating layer, first and second pads respectively disposed on opposite sides of the first insulating layer and a first via connecting the first and second pads to each other; a semiconductor chip disposed on the interconnection member; and an encapsulant encapsulating at least portions of the semiconductor chip. A center line of the first via is out of alignment with at least one of a center line of the first pad and a center line of the second pad.
    Type: Application
    Filed: May 27, 2020
    Publication date: September 17, 2020
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sun Ho KIM, Ji Hoon KIM, Ha Young AHN, Shang Hoon SEO, Seung Yeop KOOK, Sung Won JEONG
  • Patent number: 10679933
    Abstract: A fan-out semiconductor package includes: an interconnection member including a first insulating layer, first and second pads respectively disposed on opposite sides of the first insulating layer and a first via connecting the first and second pads to each other; a semiconductor chip disposed on the interconnection member; and an encapsulant encapsulating at least portions of the semiconductor chip. A center line of the first via is out of alignment with at least one of a center line of the first pad and a center line of the second pad.
    Type: Grant
    Filed: October 10, 2019
    Date of Patent: June 9, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sun Ho Kim, Ji Hoon Kim, Ha Young Ahn, Shang Hoon Seo, Seung Yeop Kook, Sung Won Jeong
  • Publication number: 20200091054
    Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; a second connection member disposed on the first connection member and the active surface of the semiconductor chip; and a heat dissipation layer embedded in the encapsulant so that one surface thereof is exposed. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip.
    Type: Application
    Filed: November 14, 2019
    Publication date: March 19, 2020
    Applicant: SAMSUNG ELECTRONICS CO., LTD,
    Inventors: Da Hee Kim, Young Gwan KO, Sung Won JEONG
  • Publication number: 20200043842
    Abstract: A fan-out semiconductor package includes: an interconnection member including a first insulating layer, first and second pads respectively disposed on opposite sides of the first insulating layer and a first via connecting the first and second pads to each other; a semiconductor chip disposed on the interconnection member; and an encapsulant encapsulating at least portions of the semiconductor chip. A center line of the first via is out of alignment with at least one of a center line of the first pad and a center line of the second pad.
    Type: Application
    Filed: October 10, 2019
    Publication date: February 6, 2020
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sun Ho KIM, Ji Hoon Kim, Ha Young Ahn, Shang Hoon Seo, Seung Yeop Kook, Sung Won Jeong
  • Patent number: 10545880
    Abstract: A memory device includes an unmapped read control module and a page buffer. The unmapped read control module is configured to receive a read command from a host, determine whether the read command is an unmapped read command, and output a memset command when the read command is the unmapped read command. The page buffer is configured to generate unmapped data by performing a memset operation in response to the memset command. The memset operation does not include a read operation for a memory cell array.
    Type: Grant
    Filed: June 15, 2017
    Date of Patent: January 28, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-Hoi Heo, Sung-Won Jeong, Moon-Sang Kwon
  • Patent number: 10522451
    Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; a second connection member disposed on the first connection member and the active surface of the semiconductor chip; and a heat dissipation layer embedded in the encapsulant so that one surface thereof is exposed. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: December 31, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Da Hee Kim, Young Gwan Ko, Sung Won Jeong
  • Patent number: 10490237
    Abstract: A data storage device includes a first memory device having a buffer region including a general region and a host access region, a second memory device, and a controller. The first memory device is directly accessible by the host. The controller controls the first memory device or the second memory device to store data provided from the host. The controller stores the data in the host access region and generates metadata of the data, when the data provided from the host complies with a predetermined condition.
    Type: Grant
    Filed: June 21, 2018
    Date of Patent: November 26, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jong Hyun Yoon, Sung Won Jeong, Hyun Seok Cha
  • Patent number: 10461008
    Abstract: An electronic component package includes a wiring part including an insulating layer, a conductive pattern formed on the insulating layer, and a conductive via connected to the conductive pattern through the insulating layer, an electronic component disposed on the wiring part, a frame disposed on the wiring part and having a component disposition region defined by an inner wall of the frame surrounding the electronic component, and an encapsulant filling at least a portion of the component disposition region. A portion of the inner wall of the frame forms a protrusion protruding toward the electronic component.
    Type: Grant
    Filed: July 8, 2016
    Date of Patent: October 29, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung Won Jeong, Ji Hoon Kim, Sun Ho Kim, Shang Hoon Seo, Seung Yeop Kook, Christian Romero
  • Patent number: 10446481
    Abstract: A fan-out semiconductor package includes: an interconnection member including a first insulating layer, first and second pads respectively disposed on opposite sides of the first insulating layer and a first via connecting the first and second pads to each other; a semiconductor chip disposed on the interconnection member; and an encapsulant encapsulating at least portions of the semiconductor chip. A center line of the first via is out of alignment with at least one of a center line of the first pad and a center line of the second pad.
    Type: Grant
    Filed: July 18, 2018
    Date of Patent: October 15, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sun Ho Kim, Ji Hoon Kim, Ha Young Ahn, Shang Hoon Seo, Seung Yeop Kook, Sung Won Jeong
  • Patent number: 10445010
    Abstract: In a method of throttling temperature of a nonvolatile memory device including a memory cell array, a current temperature of the nonvolatile memory device may be detected periodically. The current temperature may be compared with a reference temperature. Whether an external input/output command, which is provided by a memory controller, exists may be determined when the current temperature is lower than the reference temperature. An input/output operation, which corresponds to the external input/output command, may be performed on the memory cell array when the external input/output command exists. A desired and/or alternatively predetermined internal input/output operation may be performed on the memory cell array regardless of a command from the memory controller when the external input/output command does not exist.
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: October 15, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Won Jeong, Hee-Woong Kang
  • Patent number: 10332855
    Abstract: A fan-out semiconductor package includes a first connection member having a through hole, a semiconductor chip in the through hole, having an active surface with a connection pad and an inactive surface on an opposing side. An encapsulant encapsulates at least a portion of the first connection member and the semiconductor chip. A second connection member is on the first connection member and the semiconductor chip. The first connection member and the second connection member each include a redistribution layer electrically connected to a connection pad of the semiconductor chip. The interface between the second connection member and the encapsulant is located on a different level from the level of the interface between the second connection member and a redistribution layer of the first connection member or the level of the interface between the second connection member and a connection pad of the semiconductor chip.
    Type: Grant
    Filed: March 7, 2017
    Date of Patent: June 25, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Doo Hwan Lee, Ju Hyeon Kim, Dae Kyu Ahn, Sung Won Jeong
  • Patent number: 10304807
    Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a first semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a first encapsulant encapsulating at least portions of the first interconnection member and the first semiconductor chip; a second interconnection member disposed on the first interconnection member and the first semiconductor chip; a second semiconductor chip disposed on the first encapsulant and having an active surface having connection pads disposed thereon; and a second encapsulant encapsulating at least portions of the second semiconductor chip.
    Type: Grant
    Filed: April 12, 2018
    Date of Patent: May 28, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Dae Hyun Park, Eun Jung Jo, Sung Won Jeong, Han Kim, Mi Ja Han
  • Publication number: 20190130947
    Abstract: A data storage device includes a first memory device having a buffer region including a general region and a host access region, a second memory device, and a controller. The first memory device is directly accessible by the host. The controller controls the first memory device or the second memory device to store data provided from the host. The controller stores the data in the host access region and generates metadata of the data, when the data provided from the host complies with a predetermined condition.
    Type: Application
    Filed: June 21, 2018
    Publication date: May 2, 2019
    Inventors: JONG HYUN YOON, SUNG WON JEONG, HYUN SEOK CHA
  • Patent number: 10211136
    Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; a second connection member disposed on the first connection member and the active surface of the semiconductor chip; and a heat dissipation layer embedded in the encapsulant so that one surface thereof is exposed. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: February 19, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Da Hee Kim, Young Gwan Ko, Sung Won Jeong
  • Patent number: 10157886
    Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a first semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a first encapsulant encapsulating at least portions of the first interconnection member and the first semiconductor chip; a second interconnection member disposed on the first interconnection member and the first semiconductor chip; a second semiconductor chip disposed on the first encapsulant and having an active surface having connection pads disposed thereon; and a second encapsulant encapsulating at least portions of the second semiconductor chip.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: December 18, 2018
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Dae Hyun Park, Eun Jung Jo, Sung Won Jeong, Han Kim, Mi Ja Han
  • Publication number: 20180342452
    Abstract: A fan-out semiconductor package includes: an interconnection member including a first insulating layer, first and second pads respectively disposed on opposite sides of the first insulating layer and a first via connecting the first and second pads to each other; a semiconductor chip disposed on the interconnection member; and an encapsulant encapsulating at least portions of the semiconductor chip. A center line of the first via is out of alignment with at least one of a center line of the first pad and a center line of the second pad.
    Type: Application
    Filed: July 18, 2018
    Publication date: November 29, 2018
    Inventors: Sun Ho KIM, Ji Hoon KIM, Ha Young AHN, Shang Hoon SEO, Seung Yeop KOOK, Sung Won JEONG
  • Publication number: 20180342449
    Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; a second connection member disposed on the first connection member and the active surface of the semiconductor chip; and a heat dissipation layer embedded in the encapsulant so that one surface thereof is exposed. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip.
    Type: Application
    Filed: July 13, 2018
    Publication date: November 29, 2018
    Inventors: Da Hee KIM, Young Gwan KO, Sung Won JEONG