Abstract: An electronic component package includes an electronic component, a redistribution layer electrically connected to the electronic component and having terminal connection pads, a passivation layer disposed on one side of the redistribution layer and having openings exposing at least portions of the terminal connection pads, and connection terminals disposed in the openings of the passivation layer and connected to the terminal connection pads. At least one of the openings of the passivation layer has a plurality of protrusion parts.

Abstract: An electronic component package includes a wiring part including an insulating layer, a conductive pattern formed on the insulating layer, and a conductive via connected to the conductive pattern through the insulating layer, an electronic component disposed on the wiring part, a frame disposed on the wiring part and having a through hole accommodating the electronic component, an adhesive layer bonding the wiring part and the frame to each other, and an encapsulant filling at least a portion of the through hole.

Abstract: An electronic component package includes a wiring part including an insulating layer, a conductive pattern formed on the insulating layer, and a conductive via connected to the conductive pattern through the insulating layer, an electronic component disposed on the wiring part, a frame disposed on the wiring part and having a through hole accommodating the electronic component, an adhesive layer bonding the wiring part and the frame to each other, and an encapsulant filling at least a portion of the through hole.

Abstract: A printed circuit board, an electronic module and a method of manufacturing the printed circuit board are provided. The printed circuit board includes a plurality of insulation layers, metal layers formed on the plurality of insulation layers, a via formed for interlayer electrical connection of the metal layers, a trench penetrating the insulation layers, and a heat-transfer structure formed in the trench.

Abstract: An electronic component package includes a wiring part including an insulating layer, a conductive pattern formed on the insulating layer, and a conductive via connected to the conductive pattern through the insulating layer, an electronic component disposed on the wiring part, a frame disposed on the wiring part and having a component disposition region defined by an inner wall of the frame surrounding the electronic component, and an encapsulant filling at least a portion of the component disposition region. A portion of the inner wall of the frame forms a protrusion protruding toward the electronic component.

Abstract: An electronic component package includes a wiring part including an insulating layer, a conductive pattern formed on the insulating layer, and a conductive via connected to the conductive pattern through the insulating layer, an electronic component disposed on the wiring part, a frame disposed on the wiring part and having a through hole accommodating the electronic component, an adhesive layer bonding the wiring part and the frame to each other, and an encapsulant filling at least a portion of the through hole.

Abstract: A fan-out semiconductor package and an electronic device including the same are provided. The fan-out semiconductor package includes a semiconductor chip; an interconnection member electrically connected to the semiconductor chip and having a connection terminal pad; and a passivation layer disposed at one side of the interconnection member and having an opening part opening a portion of the connection terminal pad. Distances from a center of the connection terminal pad to at least two points of an edge thereof are different from each other.

Abstract: An electronic component package includes an electronic component, a redistribution layer electrically connected to the electronic component and having terminal connection pads, a passivation layer disposed on one side of the redistribution layer and having openings exposing at least portions of the terminal connection pads, and connection terminals disposed in the openings of the passivation layer and connected to the terminal connection pads. At least one of the openings of the passivation layer has a plurality of protrusion parts.

Abstract: A fan-out semiconductor package includes: an interconnection member including a first insulating layer, first and second pads respectively disposed on opposite sides of the first insulating layer and a first via connecting the first and second pads to each other; a semiconductor chip disposed on the interconnection member; and an encapsulant encapsulating at least portions of the semiconductor chip. A center line of the first via is out of alignment with at least one of a center line of the first pad and a center line of the second pad.

Abstract: An electronic component package includes a frame containing a metal or ceramic based material and having a through-hole, an electronic component disposed in the through-hole, an insulating part at least covering upper portions of the frame and the electronic component, a bonding part at least partially disposed between the frame and the insulating part, and a redistribution part disposed at one side of the frame and the electronic component.

Abstract: A printed circuit board, an electronic module and a method of manufacturing the printed circuit board are provided. The printed circuit board includes a plurality of insulation layers, metal layers formed on the plurality of insulation layers, a via formed for interlayer electrical connection of the metal layers, a trench penetrating the insulation layers, and a heat-transfer structure formed in the trench.

Abstract: A method of operating a data processing system includes transmitting process information indicating that a first process is classified as a critical process or a non-critical process to a kernel area, wherein the process information is generated in an application area, and the application area and the kernel area define a host. When the first process is classified as a critical process based on the process information, a first fastpath write signal is provided, using the kernel area, to a memory system to perform a fastpath write operation of first data for performing the first process. When the first process is classified as a non-critical process, a first slowpath write signal is provided to the memory system to perform a slowpath write operation of the first data. The fastpath write operation has a higher write speed than the slowpath write operation.

Abstract: Provided is a storage device configured to store a file system including (1) a personality oriented file information (PFI) directory entry including a first directory entry having a file allocation table (FAT) structure, and a second directory entry having a structure different from that of the first directory entry, the second directory entry including additional information instructing an access device on at least one parameter associated with creation and storing of a storage file, and (2) an entry table including location information of the PFI directory entry.

Abstract: The present invention relates to a detach core substrate and a method of manufacturing a detach core substrate. In accordance with one embodiment of the present invention, there is proposed a detach core substrate that a conductive layer including a metal layer with an etching property different from copper is formed on a top surface and a bottom surface of an insulating layer formed thereon a surface roughness. At this time, the contact interface between the top surface and the bottom surface of the insulating layer is the detachment interface to be separated during the manufacture of the circuit board. In addition, a method of manufacturing the detach core substrate is proposed.

Abstract: There are provided a printed circuit board and a method of manufacturing the same. The printed circuit board according to an exemplary embodiment of the present disclosure includes: a first insulating layer; a second insulating layer formed below the first insulating layer; a via pad formed on an upper surface of the second insulating layer and formed so as to be buried in the second insulating layer; a double via formed on an upper surface of the via pad, formed so as to penetrate through the first insulating layer, and including an auxiliary via and a first via; and a second via formed on a lower surface of the via pad and formed so as to penetrate through the second insulating layer.

Abstract: A lead pin for a package substrate includes: a connection pin being inserted into a hole formed in an external substrate; a head part formed on one end of the connection pin; and a barrier part formed on one surface of the head part in order to block the path of a solder paste so that the solder paste is prevented from flowing so as to cover the upper portion of the head part when the head part is mounted on the package substrate.

Abstract: Disclosed herein is a printed circuit board, including: a substrate; a seed layer formed on the substrate; and a circuit pattern formed on the seed layer and formed so that a diameter of an upper portion thereof and a width of a lower portion thereof are equal to each other or a diameter of the lower portion is larger than that of the upper portion. Therefore, the printed circuit board according to a preferred embodiment of the present invention forms the circuit pattern having the lower portion having the diameter larger than that of the upper portion, such that the electrical signal loss may be decreased and separation of the circuit pattern may be prevented, thereby improving whole reliability of the board.

Abstract: There is provided a method for manufacturing a printed circuit board including: preparing a substrate having a conductive layer formed on at least a portion thereof; forming an insulating layer formed with an opening through which a portion of the conductive layer is exposed on the substrate; forming a plating seed layer on the insulating layer and the exposed conductive layer; forming an electroplating layer on the plating seed layer by overplating the plating seed layer; and etching the overplated portion in a lump to form a circuit layer in the opening.

Abstract: Disclosed herein is an interposer, including: an interposer substrate configured by stacking an insulating layer of one layer or more and interlayer connected through a via; a cavity penetrating through a center of the interposer substrate in a thickness direction; and a connection electrode having a post part which is disposed on at least one of an upper surface and a lower surface of the interposer substrate, thereby increasing electrical characteristics and reducing manufacturing cost and time.

Abstract: A lead pin for a package substrate includes: a connection pin being inserted into a hole formed in an external substrate; a head part formed on one end of the connection pin; and a barrier part formed on one surface of the head part in order to block the path of a solder paste so that the solder paste is prevented from flowing so as to cover the upper portion of the head part when the head part is mounted on the package substrate.