Abstract: The present invention relates to a new use of TRIM72 as a target for muscle enhancer and heart enhancer, more particularly to a composition for enhancing muscle or heart comprising an expression or action inhibitor of TRIM72 protein. The present invention further relates to a new TRIM mutant protein inducing muscle differentiation and hypertrophy and its gene. The inventors of the present invention have identified that TRIM72 overexpression inhibits myogenesis whereas TRIM72 knockdown enhances myogenesis, and first elucidated that TRIM72 is a negative regulator of skeletal muscle differentiation. Accordingly, the inhibition of TRIM72 acts exclusively on skeletal muscle and heart muscle, but does not affect IGF-I signaling pathway in other tissues.

Abstract: Provided are a light emitting device, a method of manufacturing the same, a light emitting device package, and a lighting system. The light emitting device includes: a first conductive semiconductor layer; a superlattice layer on the first conductive semiconductor layer; an active layer on the superlattice layer; and a second conductive semiconductor layer on the active layer. The superlattice layer comprises InxGa(1?x)N(0<x<1) doped with an n-type dopant and undoped InyGa(1?y)N(0<y<1).

Abstract: The present invention relates to a chip embedded printed circuit board and a manufacturing method thereof. The present invention provides the chip embedded printed circuit board including an insulating layer embedding a chip provided with posts at an upper part, vias formed through the insulating layer, upper patterns formed at the upper part of the insulating layer to be connected to the posts and the vias and lower patterns formed at a lower part of the insulating layer to be connected to the vias, and the manufacturing method thereof.

Abstract: Disclosed herein are a wafer level package for heat dissipation and a method of manufacturing the same. The wafer level package includes a heat dissipation plate including a cavity and a hole, a die including a pad disposed in the cavity of the heat dissipation plate in a face-up manner, a thermal conductive adhesive disposed between the die and an inner wall of the cavity and disposed in the hole, and a redistribution layer connected at one end to the pad and at the other end extended. The wafer level package protects the die from external environments and enables the die to be easily flush with the heat dissipation plate.

Abstract: A method of manufacturing a capacitor-embedded printed circuit board that includes fabricating a capacitor substrate having at least one inner electrode formed on one side of a dielectric layer; aligning a semi-cured insulation layer with one side of a core layer, and aligning the capacitor substrate with the semi-cured insulation layer such that the inner electrode faces the semi-cured insulation layer; and collectively stacking the core layer, the semi-cured insulation layer, and the capacitor substrate.

Abstract: A photoalignment material includes an alignment polymer, a photoalignment additive including a compound represented by the following Chemical Formula 1 and an organic solvent. In Chemical Formula 1, R1 represents a cyclic compound. A and B independently represent a single bond or —(CnH2n)—. “n” represents an integer in a range of 1 to 12. Each —CH2— of A and/or B may be replaced with R3 represents an alkyl group having 1 to 12 carbon atoms, and each —CH2— of A and/or B may be replaced with —O—. R4 represents In Chemical Formula 1, each hydrogen atom excluding hydrogen atoms of R4 may be replaced with chlorine (Cl) or fluorine (F).

Abstract: A method for manufacturing a wafer level package including: forming a redistribution line connected to a top surface of a die pad on a wafer with the die pad; additionally preparing a carrier film including a metal post with a concave central portion on one surface; bonding the metal post to a top surface of the redistribution line; molding a space between the metal posts with a molding resin; and removing the carrier film.

Abstract: Disclosed herein are a wafer level package for heat dissipation and a method of manufacturing the same. The wafer level package includes a heat dissipation plate including a cavity and a hole, a die including a pad disposed in the cavity of the heat dissipation plate in a face-up manner, a thermal conductive adhesive disposed between the die and an inner wall of the cavity and disposed in the hole, and a redistribution layer connected at one end to the pad and at the other end extended. The wafer level package protects the die from external environments and enables the die to be easily flush with the heat dissipation plate.

Abstract: The present invention provides a micromixer biochip, comprising: a substrate having a surface; a fluidic channel layer disposed above the surface of the substrate, including a mixing chamber and a single-opening fluidic channel, wherein one end of the single-opening fluidic channel is closed and the other end of the single-opening fluidic channel connects to the mixing chamber, and a top portion of the single-opening fluidic channel is made of a flexible material; and an air chamber layer disposed above the top portion of the fluidic channel layer, including an air pore, at least one chamber, and an air channel connecting the chamber and the air pore, wherein the number and position of the air chamber correspond to the number and position of the single-opening fluidic channel of the fluidic channel layer.

Abstract: A conductive substrate structure includes a substrate unit, a conductive pad unit, and a conductive layer unit. The substrate unit has a top surface, a bottom surface, two opposite lateral surfaces, and a front surface. The conductive pad unit has at least two first conductive pads separated from each other and disposed on the top surface, and at least two second conductive pads separated from each other and disposed on the bottom surface. The conductive layer unit has at least two first conductive layers formed on the front surface and respectively electrically connected to two front sides of the two first conductive pads, and at least two second conductive layers respectively formed on the two opposite lateral surfaces and respectively electrically connected to two opposite lateral sides of the two second conductive pads. The two first conductive layers are respectively electrically connected with the two second conductive layers.

Abstract: Provided are a light emitting device, a method of fabricating the light emitting device, a light emitting device package, and a lighting system. The light emitting device comprises a substrate, a first semiconductor layer containing indium (In) over the substrate, and a light emitting structure over the first semiconductor layer. A dislocation mode is disposed on a top surface of the first semiconductor layer.

Abstract: A method of manufacturing a capacitor-embedded printed circuit board, the method including providing a substrate on which a first metal layer, a dielectric layer and an adhesive resin layer are stacked on the order thereof; etching a part of the first metal layer to form a first electrode and a first circuit pattern; compressing a surface of the substrate, on which the first electrode is formed, onto a core board by interposing an insulation resin layer; forming a second electrode and a second circuit pattern on the adhesive resin layer; stacking an insulation board on the substrate such that the second electrode and the second circuit pattern are covered; and forming a third circuit pattern on the insulation board.

Abstract: A method of manufacturing a wafer level package including: separating chips by dicing a wafer; forming a removable resin layer in a space between the separated chips and at upper parts thereof; separating the chips by dicing the removable resin layer; mounting the chips separated in a state of being surrounded by the removable resin layer, on a carrier plate; forming a molding material on the carrier plate to cover the removable resin layer; separating the carrier plate from the chips; forming a dielectric layer having redistribution lines connected to the chips, on the chips exposed by separating the carrier plate; and forming a solder resist layer on the dielectric layer to expose portions of the redistribution lines.

Abstract: A white light-emitting diode package structure for simplifying package process includes a substrate unit, a light-emitting unit, a phosphor unit and a conductive unit. The light-emitting unit is disposed on the substrate, and the light-emitting unit has a positive conductive layer and a negative conductive layer. The phosphor unit has a phosphor layer formed on the light-emitting unit and at least two openings for respectively exposing one partial surface of the positive electrode layer and one partial surface of the negative electrode layer. The conductive unit has at least two conductive wires respectively passing through the two openings in order to electrically connect the positive electrode layer with the substrate unit and electrically connect the negative electrode layer with the substrate unit.

Abstract: An LED package structure with a deposited-type phosphor layer includes a substrate unit, a light-emitting unit and a package unit. The substrate unit includes at least one circuit substrate. The light-emitting unit includes a plurality of LED chips disposed on and electrically connected to the at least one circuit substrate. The package unit includes at least one package resin body formed by a mold structure. The at least one package resin body is formed on the at least one circuit substrate to cover the LED chips, and the at least one package resin body includes a continuous phosphor layer formed therein and deposited on outer surfaces of the LED chips by centrifugal force. Hence, the instant disclosure provides the continuous phosphor layer with the deposited phosphor powders for covering the outer surfaces of the LED chips, thus the light-emitting efficiency of the LED package structure can be increased actually.

Abstract: An LED package structure includes a conductive substrate unit, a first insulative unit, a second insulative unit, a light-emitting unit and a package unit. The conductive substrate unit includes at least two conductive bases and at least one gap is formed between the two conductive bases. The first insulative unit includes at least one first insulative layer filled in the gap to join the two conductive bases. The second insulative unit includes at least one second insulative layer disposed on the conductive substrate unit and a plurality of openings passing through the second insulative layer for exposing one part of the top surface of each conductive base. The light-emitting unit includes at least one light-emitting element passing one of the openings and electrically connected between the two conductive bases. The package unit includes a package resin body disposed on the second insulative unit to cover the light-emitting element.

Abstract: A conductive substrate structure includes a substrate unit, a conductive pad unit, and a conductive layer unit. The substrate unit has a top surface, a bottom surface, two opposite lateral surfaces, and a front surface. The conductive pad unit has at least two first conductive pads separated from each other and disposed on the top surface, and at least two second conductive pads separated from each other and disposed on the bottom surface. The conductive layer unit has at least two first conductive layers formed on the front surface and respectively electrically connected to two front sides of the two first conductive pads, and at least two second conductive layers respectively formed on the two opposite lateral surfaces and respectively electrically connected to two opposite lateral sides of the two second conductive pads. The two first conductive layers are respectively electrically connected with the two second conductive layers.

Abstract: An LED package structure includes a substrate unit, a conductive unit, a heat-dissipating unit, a light-emitting unit and a package unit. The substrate unit includes an insulating substrate. The conductive unit includes two top conductive pads disposed on top surface of the insulating substrate, two bottom conductive pads disposed on bottom surface of the insulating substrate, and a plurality of penetrating conductive posts passing the insulating substrate. The two top conducive pads respectively electrically connect the two bottom conductive pads through the penetrating conductive posts. The heat-dissipating unit includes a top heat-dissipating block and a bottom heat-dissipating block respectively disposed on top and bottom surfaces of the insulating substrate. The light-emitting unit includes a light-emitting element on the top heat-dissipating block and electrically connected between the two top conductive pads.

Abstract: A photoalignment method includes irradiating light in a first direction to a first alignment layer, and irradiating light in a second direction opposite the first direction, after disposing a first mask on the first alignment layer.

Abstract: A wafer level package includes a chip, a removable resin layer, a molding material, a dielectric layer, redistribution lines and a solder resist. The removable resin layer is formed to surround side surfaces and a lower surface of the chip. The molding material is formed on the lower surface of the removable resin layer. The dielectric layer is formed over the removable resin layer including the chip and having via holes to expose portions of the chip. The redistribution lines are formed on the dielectric layer including insides of the via holes to be connected to the chip. The solder resist layer is formed on the dielectric layer to expose portions of the redistribution lines.