Abstract: A tantalum capacitor includes a tantalum body including a tantalum element, a conductive polymer layer disposed on the tantalum element, and a tantalum wire penetrating through at least a portion of each of the tantalum element and the conductive polymer layer in a first direction, a molded unit surrounding the tantalum body and, an anode lead frame exposed to one surface of the molded unit and connected to the tantalum wire, a cathode lead frame spaced apart from the anode lead frame and exposed to the one surface of the molded unit, and a first coating layer disposed in at least a portion of a region between the molded unit and the anode lead frame and a region between the molded unit and the cathode lead frame.

Abstract: A chip antenna module includes a substrate, a plurality of chip antennas disposed on a first surface of the substrate, and an electronic element mounted on a second surface of the substrate, wherein each of the plurality of chip antennas includes a first ceramic substrate mounted on the first surface of the substrate, a second ceramic substrate opposing the first ceramic substrate, a first patch disposed on the first ceramic substrate, and a second patch disposed on the second ceramic substrate, and the first ceramic substrate and the second ceramic substrate are spaced apart from each other.

Abstract: An array antenna includes an antenna substrate including a first ceramic member, an insertion member and a second ceramic member sequentially stacked, antenna pattern portions arranged on the antenna substrate in an array form, and shielding vias disposed inside the antenna substrate and extending in a thickness direction of the antenna substrate. The shielding vias are disposed in thickness areas of the antenna substrate corresponding to the antenna pattern portions.

Abstract: A chip antenna includes a first ceramic substrate, a second ceramic substrate disposed to face the first ceramic substrate, a first patch disposed on the first ceramic substrate to operate as a feed patch, and a second patch disposed on the second ceramic substrate to operate as a radiation patch. One or both of the first ceramic substrate and the second ceramic substrate include a groove, and one or both of the first patch and the second patch is disposed in the groove of the respective first ceramic substrate and second ceramic substrate and protrudes from the groove.

Abstract: A chip antenna module array includes a first chip antenna module including: a first solder layer disposed below a first dielectric layer; a first feed via disposed in the first dielectric layer; a first patch antenna pattern disposed above the first dielectric layer and having a first resonant frequency; and a first coupling pattern spaced apart from the first patch antenna pattern, and not vertically overlapping the first patch antenna pattern. The chip antenna module array includes a second chip antenna module including: a second solder layer disposed below a second dielectric layer; a second feed via disposed in the second dielectric layer; a second patch antenna pattern disposed above the second dielectric layer and having a second resonant frequency; and a second coupling pattern disposed above and vertically overlapping the second patch antenna pattern. The first and second chip antenna modules are disposed spaced apart on a connection member.

Abstract: An antenna module includes a substrate having a first surface including a ground region and a feeder region; chip antennas mounted on the first surface of the substrate; and at least one patch antenna disposed inside of the substrate or at least partially disposed on a second surface of the substrate. The chip antennas include a body portion, a ground portion bonded to a first surface of the body portion, and a radiation portion bonded to a second surface of a body portion. The ground portion of each chip antenna is mounted on the ground region and the radiation portion of each chip antenna is mounted on the feeder region.

Abstract: A chip antenna includes a first substrate, a second substrate overlapping the first substrate, a first patch, provided on a first surface of the first substrate, operating as a feed patch, a second patch, provided on the second substrate, operating as a radiation patch, at least one feed via penetrating through the first substrate in a thickness direction and configured to provide a feed signal to the first patch, and a ground pad provided on the other surface of the first substrate. The first substrate comprises a ceramic sintered material. The ceramic sintered material comprises an Mg2SiO4 phase, an MgAl2O4 phase, and a CaTiO3 phase, and a content of the CaTiO3 phase in the ceramic sintered material ranges from 5.1 mol % to 15.1 mol %.

Abstract: A chip antenna module includes: a solder layer disposed on a lower surface of the first dielectric layer; a first patch antenna pattern disposed on upper surface of the first dielectric layer and having a through-hole; a second patch antenna pattern spaced apart from an upper surface of the first patch antenna pattern and having an area less than an area of the first patch antenna pattern; a first feed via extending through the first dielectric layer and electrically connected to the first patch antenna pattern; a second feed via extending through the first dielectric layer and the through-hole, and electrically connected to the second patch antenna pattern; and shielding vias extending through the first dielectric layer, electrically connected to the first patch antenna pattern, and at least partially surrounding the second feed via.

Abstract: A chip antenna module includes: a first dielectric layer; a first feed via extending through the first dielectric layer; a second feed via extending through the first dielectric layer; a first patch antenna pattern disposed on an upper surface of the first dielectric layer, electrically connected to the first feed via, and having a through-hole through which the second feed via passes; a second patch antenna pattern disposed above the first patch antenna pattern and electrically connected to the second feed via; and a second dielectric layer and a third dielectric layer, respectively located vertically between the first patch antenna pattern and the second patch antenna pattern, and having different dielectric constants that form a first dielectric constant boundary surface between the first and second patch antenna patterns.

Abstract: A chip antenna module includes: a solder layer disposed on a lower surface of the first dielectric layer; a first patch antenna pattern disposed on upper surface of the first dielectric layer and having a through-hole; a second patch antenna pattern spaced apart from an upper surface of the first patch antenna pattern and having an area less than an area of the first patch antenna pattern; a first feed via extending through the first dielectric layer and electrically connected to the first patch antenna pattern; a second feed via extending through the first dielectric layer and the through-hole, and electrically connected to the second patch antenna pattern; and shielding vias extending through the first dielectric layer, electrically connected to the first patch antenna pattern, and at least partially surrounding the second feed via.

Abstract: An array antenna includes an antenna substrate including a first ceramic member, an insertion member and a second ceramic member sequentially stacked, antenna pattern portions arranged on the antenna substrate in an array form, and shielding vias disposed inside the antenna substrate and extending in a thickness direction of the antenna substrate. The shielding vias are disposed in thickness areas of the antenna substrate corresponding to the antenna pattern portions.

Abstract: A chip antenna module array includes a first chip antenna module including: a first solder layer disposed below a first dielectric layer; a first feed via disposed in the first dielectric layer; a first patch antenna pattern disposed above the first dielectric layer and having a first resonant frequency; and a first coupling pattern spaced apart from the first patch antenna pattern, and not vertically overlapping the first patch antenna pattern. The chip antenna module array includes a second chip antenna module including: a second solder layer disposed below a second dielectric layer; a second feed via disposed in the second dielectric layer; a second patch antenna pattern disposed above the second dielectric layer and having a second resonant frequency; and a second coupling pattern disposed above and vertically overlapping the second patch antenna pattern. The first and second chip antenna modules are disposed spaced apart on a connection member.

Abstract: An antenna module includes a connection member including at least one wiring layer and at least one insulating layer; an integrated circuit (IC) disposed on a first surface of the connection member and electrically connected to the at least one wiring layer; and a plurality of antenna cells each disposed on a second surface of the connection member. Each of the plurality of antenna cells includes an antenna member configured to transmit or receive a radio frequency (RF) signal, a feed via having one end electrically connected to the antenna member and the other end electrically connected to a corresponding wire of the at least one wiring layer, a dielectric layer surrounding side surfaces of the feed via and having a height greater than that of the at least one insulating layer, and a plating member surrounding side surfaces of the dielectric layer.

Abstract: A chip antenna module array includes a first chip antenna module including: a first solder layer disposed below a first dielectric layer; a first feed via disposed in the first dielectric layer; a first patch antenna pattern disposed above the first dielectric layer and having a first resonant frequency; and a first coupling pattern spaced apart from the first patch antenna pattern, and not vertically overlapping the first patch antenna pattern. The chip antenna module array includes a second chip antenna module including: a second solder layer disposed below a second dielectric layer; a second feed via disposed in the second dielectric layer; a second patch antenna pattern disposed above the second dielectric layer and having a second resonant frequency; and a second coupling pattern disposed above and vertically overlapping the second patch antenna pattern. The first and second chip antenna modules are disposed spaced apart on a connection member.

Abstract: An array antenna includes an antenna substrate including a first ceramic member, an insertion member and a second ceramic member sequentially stacked, antenna pattern portions arranged on the antenna substrate in an array form, and shielding vias disposed inside the antenna substrate and extending in a thickness direction of the antenna substrate. The shielding vias are disposed in thickness areas of the antenna substrate corresponding to the antenna pattern portions.

Abstract: A chip antenna is provided. The chip antenna includes a first dielectric layer; a second dielectric layer disposed on an upper surface of the first dielectric layer; a patch antenna pattern disposed in the second dielectric layer; first and second feed vias disposed to penetrate through at least one of the first and second dielectric layers, respectively and electrically connected to a corresponding feed point among different first and second feed points of the patch antenna pattern; and first and second filters disposed between the first and second dielectric layers, respectively and electrically connected to a corresponding feed via among the first and second feed vias.

Abstract: A chip antenna includes a first ceramic substrate, a second ceramic substrate disposed to face the first ceramic substrate, a first patch disposed on one surface of the first ceramic substrate to operate as a feeding patch, a second patch disposed on the second ceramic substrate to operate as a radiation patch, at least one feed via penetrating through the first ceramic substrate in a thickness direction to provide a feed signal to the first patch, and a bonding pad disposed on a second surface of the first ceramic substrate opposite the first surface. A thickness of the first ceramic substrate is greater than a thickness of the second ceramic substrate.

Abstract: A chip antenna includes a first ceramic substrate, a second ceramic substrate, a first patch antenna, a second patch antenna, and a feed via. The second ceramic substrate is disposed to oppose the first ceramic substrate. The first patch antenna includes a seed layer, disposed on a surface of the first ceramic substrate, and a plating layer disposed on the seed layer. The second patch antenna disposed on the second ceramic substrate. The feed via includes a seed layer, formed along an internal wall of a via hole penetrating through the first ceramic substrate in a thickness direction, and a conductive material surrounded by the seed layer in the via hole. The seed layer of the first patch antenna and the seed layer of the feed via are connected to each other.

Abstract: A chip antenna includes a first ceramic substrate, a second ceramic substrate disposed to oppose the first ceramic substrate, a first patch, disposed on the first ceramic substrate, configured to operate as a feed patch, a second patch, disposed on the second ceramic substrate, configured to operate as a radiation patch, an insertion member disposed between the first ceramic substrate and the second ceramic substrate, and a shielding layer disposed on a side surface of the insertion member.

Abstract: A chip antenna comprises a first substrate, a second substrate overlapping the first substrate, a first patch, provided on a first surface of the first substrate a second patch, provided on the second substrate, at least one feed via penetrating through the first substrate in a thickness direction and configured to provide a feed signal to the first patch, and a bonding pad provided on a second surface of the first substrate. The first substrate comprises a dielectric substance and a magnetic substance.