Patents by Inventor Susant

Susant has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240150179
    Abstract: The present disclosure provides a process for producing graphene from graphite. The process includes mechanically agitating a first dispersion comprising graphite to form an exfoliated graphene dispersion. The exfoliated graphene dispersion is separated into a supernatant layer and a sediment layer. The supernatant layer comprises exfoliated graphene and the sediment layer comprises microstructured graphite. The process further comprises subjecting the supernatant layer to sonication to obtain a graphene dispersion. The graphene is obtained from the graphene dispersion by freeze drying.
    Type: Application
    Filed: October 10, 2023
    Publication date: May 9, 2024
    Inventors: Susant Pattnaik, Aneeya Kumar Samantara, Satyajit Ratha
  • Publication number: 20240154111
    Abstract: The present disclosure provides a cathode (102) of a lithium-ion battery (LIB) (100) including a cathode active particulate. The cathode active particulate includes a plurality of particles of a cathode active material. Each of the plurality of particles is substantially enveloped by graphene. The cathode active particulate is substantially spherical and has an electrical conductivity in a range of 100 S/cm (siemens per centimeter) to 500 S/cm. A method of forming the cathode (102) is also provided.
    Type: Application
    Filed: October 10, 2023
    Publication date: May 9, 2024
    Inventor: Susant Pattnaik
  • Patent number: 11942759
    Abstract: The present technology can be used to control the current injection profile in the longitudinal direction of a high-power diode laser in order to optimize current densities as a function of position in the cavity to promote higher reliable output power and increase the electrical to optical conversion efficiency of the device beyond the level which can be achieved without application of this technique. This approach can be utilized, e.g., in the fabrication of semiconductor laser chips to improve the output power and wall plug efficiency for applications requiring improved performance operation.
    Type: Grant
    Filed: January 31, 2023
    Date of Patent: March 26, 2024
    Assignee: LAWRENCE LIVERMORE NATIONAL SECURITY, LLC
    Inventors: Paul O. Leisher, Robert J. Deri, Susant K. Patra
  • Patent number: 11856877
    Abstract: A lithographically fabricated electrode comprises a continuous metal film; and a discontinuous metal film. The discontinuous metal film has a first edge proximal to the continuous metal film, and a second edge distal the continuous metal film.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: December 26, 2023
    Assignee: The University of Canterbury
    Inventors: Simon Anthony Brown, Edoardo Galli, Susant Kumar Acharya
  • Patent number: 11811193
    Abstract: A pyrolytic graphite (PG) substrate and laser diode package includes a substrate body having a PG crystalline structure with a basal plane oriented at a pre-determined orientation angle as measured from a longitudinal axis of a heat generating material, such as a laser diode, mounted on a surface of the PG substrate, so that a coefficient of thermal expansion (CTE) of the PG substrate is substantially matched with a CTE of the material.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: November 7, 2023
    Assignee: Lawrence Livermore National Security, LLC
    Inventors: Susant Patra, Robert J. Deri, John W. Elmer
  • Patent number: 11801381
    Abstract: The present disclosure relates to a modular system for deep brain stimulation (DBS) and electrocorticography (ECoG). The system may have an implantable neuromodulator for generating electrical stimulation signals adapted to be applied to a desired region of a brain via an attached electrode array. An aggregator module may be used for collecting and aggregating electrical signals and transmitting the electrical signals to the neuromodulator. A control module may be used which is in communication with the aggregator module for controlling generation of the electrical signals and transmitting the electrical signals to the aggregator.
    Type: Grant
    Filed: December 9, 2016
    Date of Patent: October 31, 2023
    Assignee: Lawrence Livermore National Security, LLC
    Inventors: Satinderpall S. Pannu, Kedar G. Shah, Supin Chen, Marissa Crosetti, Timir B. Datta-Chaudhuri, Sarah H. Felix, Anna N. Ivanovskaya, Jason Jones, Kye Young Lee, Susant Patra, Vanessa Tolosa, Angela C. Tooker
  • Patent number: 11768340
    Abstract: The present disclosure relates to an interconnect system for interfacing an electronic subsystem to a qubit package, wherein the qubit package has a plurality of independent qubits. The system makes use of an optical fiber cable having a plurality of optical fibers, which is interfaced to the electronic subsystem. A 3D optical structure is used which has a plurality of internal waveguides, and which is configured to interface the optical fiber cable to the qubit package. The 3D optical structure further has at least one subsystem for using the plurality of waveguides to receive signals of a first type from at least one of the qubits package or the optical fiber cable, to convert the signals from the first type to a second type, and to transmit the signals in the second type to the other one of the fiber optic cable or the qubit package.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: September 26, 2023
    Assignee: Lawrence Livermore National Security, LLC
    Inventors: Susant K. Patra, Jonathan L. Dubois
  • Patent number: 11742605
    Abstract: The present disclosure relates to a high density electrical interconnect apparatus for interfacing with remotely located electrical components. The apparatus may have a housing, a substrate element supported within the housing, and a plurality of independent substrate interface connect subsystems arranged in a planar grid on the substrate element. The apparatus further has a plurality of independent electrical interface connector subassemblies, each configured to be coupled to an associated subplurality of the substrate interface connect subsystems, to form a plurality of electrical communication channels with the remotely located electrical components.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: August 29, 2023
    Assignee: Lawrence Livermore National Security, LLC
    Inventor: Susant Patra
  • Publication number: 20230178960
    Abstract: The present technology can be used to control the current injection profile in the longitudinal direction of a high-power diode laser in order to optimize current densities as a function of position in the cavity to promote higher reliable output power and increase the electrical to optical conversion efficiency of the device beyond the level which can be achieved without application of this technique. This approach can be utilized, e.g., in the fabrication of semiconductor laser chips to improve the output power and wall plug efficiency for applications requiring improved performance operation.
    Type: Application
    Filed: January 31, 2023
    Publication date: June 8, 2023
    Applicant: LAWRENCE LIVERMORE NATIONAL SECURITY, LLC
    Inventors: Paul O. Leisher, Robert J. Deri, Susant K. Patra
  • Patent number: 11658460
    Abstract: The present technology can be used to control the current injection profile in the longitudinal direction of a high-power diode laser in order to optimize current densities as a function of position in the cavity to promote higher reliable output power and increase the electrical to optical conversion efficiency of the device beyond the level which can be achieved without application of this technique. This approach can be utilized, e.g., in the fabrication of semiconductor laser chips to improve the output power and wall plug efficiency for applications requiring improved performance operation.
    Type: Grant
    Filed: March 26, 2019
    Date of Patent: May 23, 2023
    Assignee: LAWRENCE LIVERMORE NATIONAL SECURITY, LLC
    Inventors: Paul O. Leisher, Robert J. Deri, Susant K. Patra
  • Publication number: 20230106189
    Abstract: Thermal management may in some cases improve the optical output of a semiconductor laser diode array. For example, providing gaps such as air gaps, at suitable locations may influence the temperature distribution of laser diodes in a laser diode array and curtail thermal lensing, which may in turn decrease beam divergence and increase delivered power.
    Type: Application
    Filed: October 1, 2021
    Publication date: April 6, 2023
    Inventors: Susant Patra, Robert J. Deri
  • Publication number: 20230074774
    Abstract: The present disclosure relates to an interconnect system for interfacing an electronic subsystem to a qubit package, wherein the qubit package has a plurality of independent qubits. The system makes use of an optical fiber cable having a plurality of optical fibers, which is interfaced to the electronic subsystem. A 3D optical structure is used which has a plurality of internal waveguides, and which is configured to interface the optical fiber cable to the qubit package. The 3D optical structure further has at least one subsystem for using the plurality of waveguides to receive signals of a first type from at least one of the qubits package or the optical fiber cable, to convert the signals from the first type to a second type, and to transmit the signals in the second type to the other one of the fiber optic cable or the qubit package.
    Type: Application
    Filed: September 3, 2021
    Publication date: March 9, 2023
    Inventors: Susant K. PATRA, Jonathan L. DUBOIS
  • Patent number: 11411370
    Abstract: A Cu—Si—Cu substrate having a silicon substrate, copper plating on opposite sides of the silicon substrate, and copper vias extending thru the silicon substrate to electrically and thermally connect the copper platings together. The thicknesses of the silicon substrate and the copper platings are selected so that a coefficient of thermal expansion (CTE) of the Cu—Si—Cu substrate is substantially the same as a CTE of a material to be mounted on the Cu—Si—Cu substrate.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: August 9, 2022
    Assignee: Lawrence Livermore National Security, LLC
    Inventors: Susant Patra, Robert J. Deri, John W. Elmer
  • Publication number: 20220221670
    Abstract: The present disclosure relates to a monolithic waveguide substrate for enabling routing of at least one optical signal. The monolithic waveguide substrate has a monolithic engineered substrate having a uniform material composition throughout, with a first index of refraction, and with a plurality of three-dimensional waveguides each being formed fully within an interior volume thereof by a corresponding plurality of three-dimensional waveguide channels. The three-dimensional waveguide channels are formed by wall portions each having a second index of refraction different from the first index of refraction.
    Type: Application
    Filed: January 28, 2022
    Publication date: July 14, 2022
    Inventors: Susant K. PATRA, Razi-Ul Muhammad HAQUE, Komal KAMPASI, Ian Seth LADNER
  • Patent number: 11357975
    Abstract: A cylindrical microelectrode array having an elongated cylindrical core, and a multilayer structure conformally folded around and affixed to the cylindrical core so as to extend between opposite ends of the core. The multilayer structure has integrated sections including an electrode section with electrodes exposed through electrically insulating layers, a connector section with conductive bond pads for interfacing with external electronics, and a cable section with conductive traces encapsulated in electrically insulating layers and which connect between the electrodes and their corresponding bond pads. The array may be fabricated using a planar multilayer structure having the electrode, connector, and cable sections, and conformally folding the multilayer structure around and affixing to the cylindrical core. The cable section in particular may be conformally coiled around and affixed to the cylindrical core so that the electrical conduits helically extend between the connector and electrode sections.
    Type: Grant
    Filed: June 9, 2016
    Date of Patent: June 14, 2022
    Assignee: Lawrence Livermore National Security, LLC
    Inventors: Kedar G. Shah, Supin Chen, Sarah H. Felix, Satinderpall S. Pannu, Susant Patra, Vanessa Tolosa, Angela C. Tooker, Jason Jones
  • Publication number: 20220181843
    Abstract: A pyrolytic graphite (PG) substrate and laser diode package includes a substrate body having a PG crystalline structure with a basal plane oriented at a pre-determined orientation angle as measured from a longitudinal axis of a heat generating material, such as a laser diode, mounted on a surface of the PG substrate, so that a coefficient of thermal expansion (CTE) of the PG substrate is substantially matched with a CTE of the material.
    Type: Application
    Filed: November 15, 2021
    Publication date: June 9, 2022
    Inventors: Susant Patra, Robert J. Deri, John W. Elmer
  • Patent number: 11309670
    Abstract: An electro-optical interface system is disclosed which incorporates a housing, an electrical circuit supported from the housing and configured to interface to a plurality of remote electrical components, an electronics subsystem and an optical subsystem. The electronics subsystem is housed within the housing and in communication with the electrical circuit. The optical subsystem is housed within the housing and in communication with the electronics subsystem. The optical subsystem receives electrical signals from the electronics subsystem which are representative of electrical signals received from the remote electrical components, and converts the received electrical signals into optical signals for transmission to a remote subsystem.
    Type: Grant
    Filed: October 3, 2019
    Date of Patent: April 19, 2022
    Assignee: Lawrence Livermore National Security, LLC
    Inventors: Susant Patra, Razi-Ul Muhammad Haque, Komal Kampasi
  • Patent number: 11262514
    Abstract: The present disclosure relates to a hybrid opto-electrical module apparatus. The apparatus may have a module substrate having a plurality of electrically conductive circuit traces for carrying electrical signals, and at least one waveguide element for carrying optical signals. A waveguide substrate is in optical communication with the waveguide element. A transducer is supported on the waveguide substrate and in electrical communication with the circuit traces. The waveguide substrate has at least one three dimensional (3D) waveguide formed within its interior volume for routing optical signals between the waveguide element and the transducer. A first optical wirebond interfaces the waveguide element to the 3D waveguide, and a second optical wirebond interfaces the 3D waveguide to the transducer.
    Type: Grant
    Filed: December 9, 2019
    Date of Patent: March 1, 2022
    Assignee: Lawrence Livermore National Security, LLC
    Inventors: Susant Patra, Razi-Ul Muhammad Haque, Komal Kampasi, Ian Seth Ladner
  • Patent number: 11177626
    Abstract: A pyrolytic graphite (PG) substrate and laser diode package includes a substrate body having a PG crystalline structure with a basal plane oriented at a pre-determined orientation angle as measured from a longitudinal axis of a heat generating material, such as a laser diode, mounted on a surface of the PG substrate, so that a coefficient of thermal expansion (CTE) of the PG substrate is substantially matched with a CTE of the material.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: November 16, 2021
    Assignee: Lawrence Liveremore National Security, LLC
    Inventors: Susant Patra, Robert J. Deri, John W. Elmer
  • Patent number: 11169341
    Abstract: The present disclosure relates to an electro-optical modulator system having a source laser which generates an input optical signal. The input optical signal is received by an electro-optical module. The electro-optical module is implantable into an anatomy and includes a plurality of pixels. Each pixel has associated therewith an electrode and an optical modulator subsystem. The electrode receives electrical signals from the anatomy. The optical modulator subsystem receives the input optical signal and modulates the input optical signal to generate modulated optical output signals in relation to the received electrical signals. A detector subsystem may be used to receive and collect the modulated optical output signals.
    Type: Grant
    Filed: October 3, 2019
    Date of Patent: November 9, 2021
    Assignee: Lawrence Livermore National Security, LLC
    Inventors: Susant Patra, Razi-Ul Muhammad Haque, Komal Kampasi