Patents by Inventor Susumu Yoshimoto

Susumu Yoshimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7687822
    Abstract: In order to provide light emitting devices which have simple constructions and thus can be fabricated easily, and can stably provide high light emission efficiencies for a long time period, a light emitting device includes an n-type nitride semiconductor layer at a first main surface side of a nitride semiconductor substrate, a p-type nitride semiconductor layer placed more distantly from the nitride semiconductor substrate than the n-type nitride semiconductor layer at the first main surface side and a light emitting layer placed between the n-type nitride semiconductor layer and the p-type nitride semiconductor layer at the first main surface side. The nitride semiconductor substrate has a resistivity of 0.5 ?·cm or less and the p-type nitride semiconductor layer side is down-mounted so that light is emitted from the second main surface of the nitride semiconductor substrate at the opposite side from the first main surface.
    Type: Grant
    Filed: March 27, 2007
    Date of Patent: March 30, 2010
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Youichi Nagai, Makoto Kiyama, Takao Nakamura, Takashi Sakurada, Katsushi Akita, Koji Uematsu, Ayako Ikeda, Koji Katayama, Susumu Yoshimoto
  • Publication number: 20100007435
    Abstract: To provide a duplexer which is small in size and excellent in separation characteristic of transmission/reception signals.
    Type: Application
    Filed: July 2, 2009
    Publication date: January 14, 2010
    Applicant: NIHON DEMPA KOGYO CO., LTD.
    Inventors: Toshihiko Kawamoto, Susumu Yoshimoto
  • Publication number: 20090318108
    Abstract: In order to reduce the parts required for matching of an SAW filter module, the SAW filter module 10 obtains matching for coupling SAW filters 10A to 10D with RF-IC 20 using impedance matching circuits 11A to 11D. The real part of output impedance Z saw of the SAW filter is closely matched with the real part of input impedance Zic of an RF-IC. The impedance matching circuit modifies the imaginary part of the output impedance Zm of the SAW filter module according to the imaginary part of the input impedance Zic of the RF-IC 20. The impedance matching circuit composed of one piece of inductance or capacitor, or a plurality of inductors or capacitors in parallel connection, ans formed as a print pattern on a module substrate, in which the real part R saw and the real part Ric are in a relation nearly of 0.8 Ric<R saw<1.2 Ric.
    Type: Application
    Filed: August 3, 2009
    Publication date: December 24, 2009
    Applicant: NIHON DEMPA KOGYO CO., LTD.
    Inventor: Susumu Yoshimoto
  • Patent number: 7501666
    Abstract: A substrate 103 is set in a film-forming apparatus, such as a metal organic vapor phase epitaxy system 101, and a GaN buffer film 105, an undoped GaN film 107, and a GaN film 109 containing a p-type dopant are successively grown on the substrate 103 to form an epitaxial substrate E1. The semiconductor film 109 also contains hydrogen, which was included in a source gas, in addition to the p-type dopant. Then the epitaxial substrate E1 is placed in a short pulsed laser beam emitter 111. A laser beam LB1 is applied to a part or the whole of a surface of the epitaxial substrate E1 to activate the p-type dopant by making use of a multiphoton absorption process. When the substrate is irradiated with the pulsed laser beam LB1 which can induce multiphoton absorption, a p-type GaN film 109a is formed. There is thus provided a method of optically activating the p-type dopant in the semiconductor film to form the p-type semiconductor region, without use of thermal annealing.
    Type: Grant
    Filed: August 2, 2005
    Date of Patent: March 10, 2009
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiichiro Tanabe, Susumu Yoshimoto
  • Publication number: 20090047751
    Abstract: There is provided a method of fabricating a semiconductor laser including a two-dimensional photonic crystal. The method comprises the steps of growing an InX1Ga1-X1N (0<X1<1) layer on a gallium nitride-based semiconductor region in a reactor; after taking out a substrate product including the InX1Ga1-X1N layer from the reactor, forming a plurality of openings for a two-dimensional diffraction grating of the two-dimensional photonic crystal in the InX1Ga1-X1N layer to form a patterned InX1Ga1-X1N layer; and growing an AlX2Ga1-X2N (0?X2?1) layer on a top surface of the patterned InX1Ga1-X1N layer to form voids associated with the openings.
    Type: Application
    Filed: July 10, 2008
    Publication date: February 19, 2009
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Susumu Yoshimoto, Hideki Matsubara
  • Publication number: 20080210959
    Abstract: In order to provide light emitting devices which have simple constructions and thus can be fabricated easily, and can stably provide high light emission efficiencies for a long time period, a light emitting device includes an n-type nitride semiconductor layer at a first main surface side of a nitride semiconductor substrate, a p-type nitride semiconductor layer placed more distantly from the nitride semiconductor substrate than the n-type nitride semiconductor layer at the first main surface side and a light emitting layer placed between the n-type nitride semiconductor layer and the p-type nitride semiconductor layer at the first main surface side. The nitride semiconductor substrate has a resistivity of 0.5 ?·cm or less and the p-type nitride semiconductor layer side is down-mounted so that light is emitted from the second main surface of the nitride semiconductor substrate at the opposite side from the first main surface.
    Type: Application
    Filed: March 27, 2007
    Publication date: September 4, 2008
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Youichi Nagai, Makoto Kiyama, Takao Nakamura, Takashi Sakurada, Katsushi Akita, Koji Uematsu, Ayako Ikeda, Koji Katayama, Susumu Yoshimoto
  • Publication number: 20070296060
    Abstract: A substrate 103 is set in a film-forming apparatus, such as a metal organic vapor phase epitaxy system 101, and a GaN buffer film 105, an undoped GaN film 107, and a GaN film 109 containing a p-type dopant are successively grown on the substrate 103 to form an epitaxial substrate E1. The semiconductor film 109 also contains hydrogen, which was included in a source gas, in addition to the p-type dopant. Then the epitaxial substrate E1 is placed in a short pulsed laser beam emitter 111. A laser beam LB1 is applied to a part or the whole of a surface of the epitaxial substrate E1 to activate the p-type dopant by making use of a multiphoton absorption process. When the substrate is irradiated with the pulsed laser beam LB1 which can induce multiphoton absorption, a p-type GaN film 109a is formed. There is thus provided a method of optically activating the p-type dopant in the semiconductor film to form the p-type semiconductor region, without use of thermal annealing.
    Type: Application
    Filed: August 2, 2005
    Publication date: December 27, 2007
    Inventors: Keiichiro Tanabe, Susumu Yoshimoto
  • Publication number: 20070280318
    Abstract: A semiconductor laser device (1) includes: a substrate (3) having a principal plane (3a); a photonic crystal layer (7) having an epitaxial layer (2a) of gallium nitride formed on substrate (3) in a direction in which principal plane (3a) extends and a low refractive index material (2b) having a refractive index lower than that of epitaxial layer (2a); an n-type clad layer (4) formed on substrate (3); a p-type clad layer (6) formed on substrate (3); an active layer (5) that is interposed between n-type clad layer (4) and p-type clad layer (6) and emits light when a carrier is injected thereinto; and a GaN layer (12) that covers a region directly on photonic crystal layer (7). Thus, the semiconductor laser device can be manufactured without fusion.
    Type: Application
    Filed: December 6, 2005
    Publication date: December 6, 2007
    Applicant: OSAKA WORKS OF SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Susumu Yoshimoto, Hideki Matsubara, Hirohisa Saitou, Takashi Misaki, Fumitake Nakanishi, Hiroki Mori
  • Patent number: 7202509
    Abstract: In order to provide light emitting devices which have simple constructions and thus can be fabricated easily, and can stably provide high light emission efficiencies for a long time period, a light emitting device includes an n-type nitride semiconductor layer at a first main surface side of a nitride semiconductor substrate, a p-type nitride semiconductor layer placed more distantly from the nitride semiconductor substrate than the n-type nitride semiconductor layer at the first main surface side and a light emitting layer placed between the n-type nitride semiconductor layer and the p-type nitride semiconductor layer at the first main surface side. The nitride semiconductor substrate has a resistivity of 0.5 ?·cm or less and the p-type nitride semiconductor layer side is down-mounted so that light is emitted from the second main surface of the nitride semiconductor substrate at the opposite side from the first main surface.
    Type: Grant
    Filed: August 23, 2004
    Date of Patent: April 10, 2007
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Youichi Nagai, Makoto Kiyama, Takao Nakamura, Takashi Sakurada, Katsushi Akita, Koji Uematsu, Ayako Ikeda, Koji Katayama, Susumu Yoshimoto
  • Patent number: 7190004
    Abstract: A light emitting device includes a nitride semiconductor substrate with a resistivity of 0.5 ?·cm or less, an n-type nitride semiconductor layer and a p-type nitride semiconductor layer placed more distantly from the nitride semiconductor substrate than the n-type nitride semiconductor layer at a first main surface side of the nitride semiconductor substrate, and a light emitting layer placed between the n-type nitride semiconductor layer and the p-type nitride semiconductor layer, wherein one of the nitride semiconductor substrate and the p-type nitride semiconductor layer is mounted at the top side which emits light and the other is placed at the down side, and a single electrode is placed at the top side. Therefore, there is provided a light emitting device which has a simple configuration thereby making it easy to fabricate, can provide a high light emission efficiency for a long time period, and can be easily miniaturized.
    Type: Grant
    Filed: December 2, 2004
    Date of Patent: March 13, 2007
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Youichi Nagai, Makoto Kiyama, Takao Nakamura, Takashi Sakurada, Katsushi Akita, Koji Uematsu, Ayako Ikeda, Koji Katayama, Susumu Yoshimoto
  • Publication number: 20070040633
    Abstract: In order to reduce the parts required for matching of an SAW filter module, the SAW filter module 10 obtains matching for coupling SAW filters 10A to 10D with RF-IC 20 using impedance matching circuits 11A to 11D. The real part of output impedance Z saw of the SAW filter is closely matched with the real part of input impedance Zic of an RF-IC. The impedance matching circuit modifies the imaginary part of the output impedance Zm of the SAW filter module according to the imaginary part of the input impedance Zic of the RF-IC 20. The impedance matching circuit composed of one piece of inductance or capacitor, or a plurality of inductors or capacitors in parallel connection, ans formed as a print pattern on a module substrate, in which the real part R saw and the real part Ric are in a relation nearly of 0.8 Ric<R saw<1.2 Ric.
    Type: Application
    Filed: August 15, 2006
    Publication date: February 22, 2007
    Inventor: Susumu Yoshimoto
  • Publication number: 20060102081
    Abstract: Wafer guide for MOCVD equipment that reduces influence from III-nitride deposits. A wafer support (15) includes one or more first sections (15a), and a second section (15b) surrounding the first sections (15a). Each first section (15a) includes a surface for supporting wafers (19) on which nitride semiconductor is deposited. In MOCVD tools (11) and (13), a wafer guide (17) is provided on the wafer-support (15) second section (15b). The wafer guide (17) is furnished with a protector (17a) for covering the second section (15b), and one or more openings (17b) for receiving the wafers (19) on the first sections (15a). The protector (17a) has lateral surfaces (17c) defining the openings (17b) and guiding the wafers (19), and receives a wafer (19) in each opening (17b). A wafer (19) is loaded onto the support surface of each wafer-support (15) first section (15a) exposed in that opening (17b).
    Type: Application
    Filed: November 16, 2005
    Publication date: May 18, 2006
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Masaki Ueno, Susumu Yoshimoto, Satoshi Matsuba
  • Publication number: 20050121688
    Abstract: A light emitting device includes a nitride semiconductor substrate with a resistivity of 0.5 ?·cm or less, an n-type nitride semiconductor layer and a p-type nitride semiconductor layer placed more distantly from the nitride semiconductor substrate than the n-type nitride semiconductor layer at a first main surface side of the nitride semiconductor substrate, and a light emitting layer placed between the n-type nitride semiconductor layer and the p-type nitride semiconductor layer, wherein one of the nitride semiconductor substrate and the p-type nitride semiconductor layer is mounted at the top side which emits light and the other is placed at the down side, and a single electrode is placed at the top side. Therefore, there is provided a light emitting device which has a simple configuration thereby making it easy to fabricate, can provide a high light emission efficiency for a long time period, and can be easily miniaturized.
    Type: Application
    Filed: December 2, 2004
    Publication date: June 9, 2005
    Inventors: Youichi Nagai, Makoto Kiyama, Takao Nakamura, Takashi Sakurada, Katsushi Akita, Koji Uematsu, Ayako Ikeda, Koji Katayama, Susumu Yoshimoto
  • Patent number: 6373167
    Abstract: The present invention disclosed a SAW filter in which unnecessary space on a chip can be reduced in comparison with the prior art, and in which a smaller chip can be realized. Because oblique step shaped reflection surfaces are provided in order to reflect the SAW, a smaller SAW filter than that used in the prior art can be realized.
    Type: Grant
    Filed: November 7, 2000
    Date of Patent: April 16, 2002
    Assignee: NEC Corporation
    Inventors: Susumu Yoshimoto, Yasushi Yamamoto
  • Patent number: 6177752
    Abstract: A surface acoustic wave device and method of connecting surface acoustic wave filters are provided in which the relative out-of-band attenuation is increased to prevent the propagation of electrical feedthrough from the input of a first stage to the output of the second stage of a device. In a multistage connection configuration of transversely coupled mode resonator-type surface acoustic wave (SAW) filters, electrically balanced signals are applied to the two inputs of the first-stage filter, the portion between stages that joins the first-stage filter and the second-stage filter is an electrically unbalanced connection, and one of the connections between the two outputs of the first stage and the two inputs of the second stage is connected to ground potential. Subsequently, the two outputs of the second stage again become electrically balanced signal output.
    Type: Grant
    Filed: December 23, 1999
    Date of Patent: January 23, 2001
    Assignee: NEC Corporation
    Inventor: Susumu Yoshimoto
  • Patent number: 6049260
    Abstract: A surface acoustic wave filter includes IDTs on an input side and on an output side, the Inter Digital Transducers (IDTs) are formed by depositing a thin film made of aluminum and the like on a piezoelectric substrate made of crystal, and disposed on the substrate with a spacing interposed therebetween. The width of each electrode digit of each IDT is 1/4 of the wavelength of the surface acoustic wave during resonance. A reflection coefficient .epsilon. per electrode digit and the total number N of pairs of the electrode digits constituting the IDTs on the input side and on the output side are set to satisfy N.epsilon..gtoreq.0.55. Also, the aperture width W.lambda. of a surface acoustic wave transmission path, the center frequency of the filter f in units of Hertz , and the thickness of the electrode digits H in units of meters, are set to satisfy fH.ltoreq.-17.5W+210.
    Type: Grant
    Filed: January 15, 1999
    Date of Patent: April 11, 2000
    Assignee: NEC Corporation
    Inventors: Susumu Yoshimoto, Yasushi Yamamoto
  • Patent number: 6040651
    Abstract: A surface acoustic wave device includes a piezoelectric substrate, an input first interdigital electrode, and an output second interdigital electrode. The input first interdigital electrode is formed on the piezoelectric substrate. The output second interdigital electrode is formed on the piezoelectric substrate to be adjacent to the first interdigital electrode. A ratio of an overlap width to an aperture width of the first interdigital electrode and a ratio of an overlap width to an aperture width of the second interdigital electrode are set to different values, so that a transverse secondary mode is suppressed with one of the first and second interdigital electrodes while a transverse quaternary mode is suppressed with the other of the first and second interdigital electrodes.
    Type: Grant
    Filed: July 23, 1999
    Date of Patent: March 21, 2000
    Assignee: NEC Corporation
    Inventors: Susumu Yoshimoto, Yasushi Yamamoto
  • Patent number: 6005326
    Abstract: A surface acoustic wave device includes a piezoelectric substrate, an input first interdigital electrode, and an output second interdigital electrode. The input first interdigital electrode is formed on the piezoelectric substrate. The output second interdigital electrode is formed on the piezoelectric substrate to be adjacent to the first interdigital electrode. A ratio of an overlap width to an aperture width of the first interdigital electrode and a ratio of an overlap width to an aperture width of the second interdigital electrode are set to different values, so that a transverse secondary mode is suppressed with one of the first and second interdigital electrodes while a transverse quaternary mode is suppressed with the other of the first and second interdigital electrodes.
    Type: Grant
    Filed: October 9, 1997
    Date of Patent: December 21, 1999
    Assignee: NEC Corporation
    Inventors: Susumu Yoshimoto, Yasushi Yamamoto
  • Patent number: 5949307
    Abstract: A surface acoustic wave device includes first and second longitudinal mode resonators. The first longitudinal mode resonator has two resonance modes, i.e., a longitudinal mode distributed in the same direction as a propagating direction of a surface acoustic wave (SAW) and a transverse mode distributed in a direction perpendicular to the propagating direction of the SAW. The second longitudinal mode resonator is arranged adjacent to the first resonator in a direction perpendicular to the propagating direction of the SAW, and has two resonance modes, i.e., a longitudinal mode and a transverse mode. The resonance modes of the second longitudinal mode resonator are acoustically coupled to the resonance modes of the first longitudinal mode resonator. The first longitudinal mode resonator has an output InterDigital Transducer (IDT) having an interdigital electrode to excite a SAW. The second longitudinal mode resonator has an input IDT having an interdigital electrode to receive the SAW from the output IDT.
    Type: Grant
    Filed: May 21, 1998
    Date of Patent: September 7, 1999
    Assignee: NEC Corporation
    Inventors: Susumu Yoshimoto, Yasushi Yamamoto
  • Patent number: 5856720
    Abstract: In a resonator type surface acoustic wave filter, a fundamental mode of a mode to distribute in a direction perpendicular to propagating direction of a surface acoustic wave (hereinafter referred to as transverse mode) becomes a primary response, whereas a transverse secondary mode becomes spurious. In case of the surface acoustic wave device formed on a piezoelectric substrate having smaller electromechanical coupling factor of a quartz substrate or so forth, it is impossible to obtain sufficient restriction of the second mode spurious. This problem is solved by canceling electrical potential of transverse secondary mode and whereby restricting excitation with a resonator type surface acoustic device formed on a quartz substrate, in which a configuration of an interdigital electrode is selected to establish a ratio of an overlap width of an electrode finger versus an aperture width in a range greater than or equal to 0.75 to smaller than or equal to 0.85.
    Type: Grant
    Filed: March 7, 1997
    Date of Patent: January 5, 1999
    Assignee: NEC Corporation
    Inventors: Susumu Yoshimoto, Yasushi Yamamoto