Patents by Inventor Sylvie Wuidart

Sylvie Wuidart has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190245584
    Abstract: A near-field communication device operates to transmit data by near-field communications techniques to another device. The near-field communication device includes a memory that stores a message to be transmitted in an ASCII format. The message is retrieved from the memory and transmitted using the near-field communications techniques in an ASCII format.
    Type: Application
    Filed: January 29, 2019
    Publication date: August 8, 2019
    Applicants: STMicroelectronics (Rousset) SAS, STMicroelectronics (Grenoble 2) SAS
    Inventors: Sylvie WUIDART, Sophie MAURICE
  • Publication number: 20160226665
    Abstract: An object stores a signature associated therewith. An authentication method includes generating in the object at least one piece of personalized information of the object based on the stored signature and on at least one indication associated with the object, and communicating without contact by a device to the object during the authentication. The method also includes contactless communications to the device of the at least one piece of personalized information, determining by the device the signature based on at least the one piece of personalized information and on the at least one indication, and verifying the signature by the device.
    Type: Application
    Filed: November 2, 2015
    Publication date: August 4, 2016
    Inventor: Sylvie WUIDART
  • Patent number: 9224701
    Abstract: An integrated circuit, including: a semiconductor substrate of a first conductivity type; a plurality of regions of the first conductivity type vertically extending from the surface of the substrate, each of the regions being laterally delimited all along its periphery by a region of the second conductivity type; and a device for detecting a variation of the substrate resistance between each region of the first conductivity type and an area for biasing the substrate to a reference voltage.
    Type: Grant
    Filed: March 24, 2015
    Date of Patent: December 29, 2015
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Mathieu Lisart, Sylvie Wuidart, Alexandre Sarafianos
  • Publication number: 20150340426
    Abstract: An integrated circuit includes a substrate and a circuit component (such as a MOS device or resistance) disposed at least partially within an active region of the substrate limited by an insulating region. A capacitive structure including a first electrode (for connection to a first potential such as ground) and a second electrode (for connection to a second potential such as a supply voltage) is provided in connection with the insulating region. One of the first and second electrodes is situated at least in part within the insulating region. The capacitive structure is thus configured in order to allow a reduction in compressive stresses within the active region.
    Type: Application
    Filed: May 19, 2015
    Publication date: November 26, 2015
    Applicant: STMICROELECTRONICS (ROUSSET) SAS
    Inventors: Sylvie Wuidart, Christian Rivero, Guilhem Bouton, Pascal Fornara
  • Publication number: 20150194393
    Abstract: An integrated circuit, including: a semiconductor substrate of a first conductivity type; a plurality of regions of the first conductivity type vertically extending from the surface of the substrate, each of the regions being laterally delimited all along its periphery by a region of the second conductivity type; and a device for detecting a variation of the substrate resistance between each region of the first conductivity type and an area for biasing the substrate to a reference voltage.
    Type: Application
    Filed: March 24, 2015
    Publication date: July 9, 2015
    Inventors: Mathieu LISART, Sylvie WUIDART, Alexandre SARAFIANOS
  • Patent number: 9012911
    Abstract: An integrated circuit, including: a semiconductor substrate of a first conductivity type; a plurality of regions of the first conductivity type vertically extending from the surface of the substrate, each of the regions being laterally delimited all along its periphery by a region of the second conductivity type; and a device for detecting a variation of the substrate resistance between each region of the first conductivity type and an area for biasing the substrate to a reference voltage.
    Type: Grant
    Filed: November 20, 2013
    Date of Patent: April 21, 2015
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Sylvie Wuidart, Mathieu Lisart, Alexandre Sarafianos
  • Patent number: 8806109
    Abstract: A method for protecting at least first data of a non-volatile memory from which the extraction of this first data is triggered by the reading or the writing, by a processor from or into the memory, of second data independent from the first data, said first data being provided to a circuit which the processor cannot access.
    Type: Grant
    Filed: July 25, 2011
    Date of Patent: August 12, 2014
    Assignee: STMicroelectronics (Rousset) SAS
    Inventor: Sylvie Wuidart
  • Publication number: 20140138686
    Abstract: An integrated circuit, including: a semiconductor substrate of a first conductivity type; a plurality of regions of the first conductivity type vertically extending from the surface of the substrate, each of the regions being laterally delimited all along its periphery by a region of the second conductivity type; and a device for detecting a variation of the substrate resistance between each region of the first conductivity type and an area for biasing the substrate to a reference voltage.
    Type: Application
    Filed: November 20, 2013
    Publication date: May 22, 2014
    Applicant: ST Microelectronics (Rousset) SAS
    Inventors: Sylvie Wuidart, Mathieu Lisart, Alexandre Sarafianos
  • Patent number: 8564324
    Abstract: A method and a device for monitoring a digital signal, wherein a first P-channel MOS transistor is placed in degradation conditions of negative bias temperature instability type during periods when the signal to be monitored is in a first state; a first quantity representative of the saturation current of the first transistor is measured when the signal to be monitored switches to a second state; and a detection signal is switched when this first quantity exceeds a threshold.
    Type: Grant
    Filed: August 10, 2010
    Date of Patent: October 22, 2013
    Assignee: STMicroelectronics (Rousset) SAS
    Inventor: Sylvie Wuidart
  • Patent number: 8296576
    Abstract: A method for scrambling current consumption of an integrated circuit, at least during execution of a confidential operation by the integrated circuit that includes reading confidential data stored therein and/or the calculation of an encryption code is provided. The charge pump is activated to generate current consumption fluctuations on the electrical power supply line of the integrated circuit, at an intensity great enough to mask the current consumption variations associated with the execution of the confidential operation.
    Type: Grant
    Filed: March 12, 2003
    Date of Patent: October 23, 2012
    Assignee: STMicroelectronics SA
    Inventor: Sylvie Wuidart
  • Patent number: 8243856
    Abstract: A method and a circuit for detecting a binary state supported by an analog symbol, comprising sampling the symbol with a sampling signal based on a frequency having a period shorter than the duration of a symbol, selecting a number of significant samples smaller than the number of samples which would be obtained with a sampling of the symbol at said frequency, and deciding of the symbol state based on the selected samples.
    Type: Grant
    Filed: April 21, 2005
    Date of Patent: August 14, 2012
    Assignee: STMicroelectronics S.A.
    Inventors: Yveline Guilloux, Romain Palmade, Fabrice Romain, Sylvie Wuidart
  • Publication number: 20120030443
    Abstract: A method for protecting at least first data of a non-volatile memory from which the extraction of this first data is triggered by the reading or the writing, by a processor from or into the memory, of second data independent from the first data, said first data being provided to a circuit which the processor cannot access.
    Type: Application
    Filed: July 25, 2011
    Publication date: February 2, 2012
    Applicant: STMicroelectronics (Rousset) SAS
    Inventor: Sylvie Wuidart
  • Patent number: 8045381
    Abstract: A memory is secured against an error injection during the reading of a datum. The memory includes: means for reading a reference datum in the memory during a phase of reading a datum stored in the memory; means for comparing the reference datum read with an expected value; and means for generating an error signal if the datum read is different from the expected value. Application is provided particularly but not exclusively to the protection of memories integrated into smart cards.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: October 25, 2011
    Assignee: STMicroelectronics SA
    Inventor: Sylvie Wuidart
  • Patent number: 8010585
    Abstract: A method and a circuit for protecting the execution of a calculation by an electronic circuit, conditioning a result of the calculation to states of bits indicative of executions of steps of access in read mode and/or in write mode to storage elements.
    Type: Grant
    Filed: February 9, 2007
    Date of Patent: August 30, 2011
    Assignee: STMicroelectronics S.A.
    Inventor: Sylvie Wuidart
  • Publication number: 20110128030
    Abstract: A method and a device for monitoring a digital signal, wherein a first P-channel MOS transistor is placed in degradation conditions of negative bias temperature instability type during periods when the signal to be monitored is in a first state; a first quantity representative of the saturation current of the first transistor is measured when the signal to be monitored switches to a second state; and a detection signal is switched when this first quantity exceeds a threshold.
    Type: Application
    Filed: August 10, 2010
    Publication date: June 2, 2011
    Applicant: STMicroelectronics (Rousset) SAS
    Inventor: Sylvie Wuidart
  • Patent number: 7813216
    Abstract: A method for reading of the state of a non-volatile memory element, including conditioning the frequency of a first oscillatory to the state of this element, and comparing the frequency of the first oscillator with the predetermined frequency of a second oscillator, selected between two possible frequency values for the first oscillator, according to the state of the storage element.
    Type: Grant
    Filed: September 13, 2005
    Date of Patent: October 12, 2010
    Assignee: STMicroelectronics S.A.
    Inventor: Sylvie Wuidart
  • Publication number: 20100135087
    Abstract: A method for reading of the state of a non-volatile memory element including conditioning the frequency of a first oscillator to the state of this element, and comparing the frequency of the first oscillator with the predetermined frequency of a second oscillator, selected between two possible frequency values for the first oscillator, according to the state of the storage element.
    Type: Application
    Filed: February 3, 2010
    Publication date: June 3, 2010
    Applicant: STMicroelectronics S.A.
    Inventor: Sylvie Wuidart
  • Patent number: 7594101
    Abstract: A digital processing unit for executing program instructions stored in at least two memories and including at least one first register of temporary storage of the operator of a current instruction to be executed and at least a second register of temporary storage of at least one argument or operand of said current instruction, and a protection circuit for submitting, upstream of the register, the operator to a deciphering function if this operator originates from one of the memories or from an area of these memories, identified from the address provided by a program counter. The present invention also relates to a method for protecting a program for updating an electronic circuit and controlling its execution, including at least one step of ciphering or deciphering of program instruction operators.
    Type: Grant
    Filed: February 2, 2007
    Date of Patent: September 22, 2009
    Assignee: STMicroelectronics S.A.
    Inventor: Sylvie Wuidart
  • Publication number: 20090073759
    Abstract: A memory is secured against an error injection during the reading of a datum. The memory includes: means for reading a reference datum in the memory during a phase of reading a datum stored in the memory; means for comparing the reference datum read with an expected value; and means for generating an error signal if the datum read is different from the expected value. Application is provided particularly but not exclusively to the protection of memories integrated into smart cards.
    Type: Application
    Filed: March 31, 2006
    Publication date: March 19, 2009
    Inventor: Sylvie Wuidart
  • Patent number: 7453717
    Abstract: A memory cell with at least two detectable states among which is an unprogrammed state, comprising, in series between two terminals of application of a read voltage, at least one first branch comprising: a pre-read stage comprising, in parallel, two switchable resistors having different values with a first predetermined difference; and a programming stage formed of a polysilicon programming resistor, a terminal of the programming resistor being accessible by a programming circuit capable of causing an irreversible decrease in its value.
    Type: Grant
    Filed: February 9, 2006
    Date of Patent: November 18, 2008
    Assignee: STMicroelectronics S.A.
    Inventors: Sylvie Wuidart, Luc Wuidart