Patents by Inventor Szu-Hsien Lee
Szu-Hsien Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240128231Abstract: Semiconductor devices and methods of manufacturing the semiconductor devices are presented. In embodiments the methods of manufacturing include depositing a first bonding layer on a first substrate, wherein the first substrate comprises a semiconductor substrate and a metallization layer. The first bonding layer and the semiconductor substrate are patterned to form first openings. A second substrate is bonded to the first substrate. After the bonding the second substrate, the second substrate is patterned to form second openings, at least one of the second openings exposing at least one of the first openings. After the patterning the second substrate, a third substrate is bonded to the second substrate, and after the bonding the third substrate, the third substrate is patterned to form third openings, at least one of the third openings exposing at least one of the second openings.Type: ApplicationFiled: January 4, 2023Publication date: April 18, 2024Inventors: Fu Wei Liu, Pei-Wei Lee, Yun-Chung Wu, Bo-Yu Chiu, Szu-Hsien Lee, Mirng-Ji Lii
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Publication number: 20240120207Abstract: A semiconductor package includes a die having a plurality of devices over a first substrate, where the first substrate includes a dopant at a first concentration and the first substrate has a first width along a horizontal direction. The semiconductor package further includes a second substrate fused with the first substrate, where the second substrate includes the dopant at a second concentration greater than the first concentration.Type: ApplicationFiled: February 15, 2023Publication date: April 11, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Lung-Kai Mao, Wen-Hsiung Lu, Pei-Wei Lee, Szu-Hsien Lee, Chieh-Ning Feng
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Publication number: 20240120295Abstract: A semiconductor chip and a manufacturing method thereof are provided. The semiconductor chip includes: an array of pillar structures, disposed on a front surface of the semiconductor chip, and respectively including a ground pillar and multiple working pillars laterally spaced apart from and substantially parallel with a line portion of the ground pillar; and dummy pillar structures, disposed on the front surface of the semiconductor chip and laterally surrounding the pillar structures. Active devices formed inside the semiconductor chip are electrically connected to the working pillar. The ground pillars of the pillar structures and the dummy pillar structures are electrically connected to form a current pathway on the front surface of the semiconductor chip.Type: ApplicationFiled: January 30, 2023Publication date: April 11, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Szu-Hsien Lee, Yun-Chung Wu, Pei-Wei Lee, Fu Wei Liu, Jhao-Yi Wang
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Publication number: 20240086014Abstract: An electronic device may have a display with touch sensors. One or more shielding layers may be interposed between the display and the touch sensors. The shielding layers may include shielding structures such as a conductive mesh structure and/or a transparent conductive film. The shielding structures may be actively driven or passively biased. In the active driving scheme, one or more inverting circuits may receive a noise signal from a cathode layer in the display and/or from the shielding structures, invert the received noise signal, and drive the inverted noise signal back onto the shielding structures to prevent any noise from the display from negatively impacting the performance of the touch sensors. In the passive biasing scheme, the shielding structures may be biased to a power supply voltage.Type: ApplicationFiled: November 20, 2023Publication date: March 14, 2024Inventors: Rungrot Kitsomboonloha, Donggeon Han, Jason N Gomez, Kyung Wook Kim, Nikolaus Hammler, Pei-En Chang, Saman Saeedi, Shih Chang Chang, Shinya Ono, Suk Won Hong, Szu-Hsien Lee, Victor H Yin, Young-Jik Jo, Yu-Heng Cheng, Joyan G Sanctis, Hongwoo Lee
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Patent number: 11922887Abstract: A display may include an array of pixels. Each pixel in the array includes an organic light-emitting diode coupled to associated thin-film transistors. The diode may be coupled to drive transistor circuitry, a data loading transistor, and emission transistors. The drive transistor circuitry may include at least two transistor portions connected in series. The data loading transistor has a drain region connected to a data line and a source region connected directly to the drive transistor circuitry. The data line may be connected to and overlap the drain region of the data loading transistor. The data line and the source region of the data loading transistor are non-overlapping to reduce row-to-row crosstalk.Type: GrantFiled: July 6, 2021Date of Patent: March 5, 2024Assignee: Apple Inc.Inventors: Shinya Ono, Chin-Wei Lin, Chuan-Jung Lin, Gihoon Choo, Hassan Edrees, Hei Kam, Jung Yen Huang, Pei-En Chang, Rungrot Kitsomboonloha, Szu-Hsien Lee, Zino Lee
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Patent number: 11916314Abstract: A mobile device includes a housing, a first radiation element, a second radiation element, a third radiation element, a first switch element, and a second switch element. The first radiation element has a first feeding point. The second radiation element has a second feeding point. The first radiation element, the second radiation element, and the third radiation element are distributed over the housing. The first switch element is closed or open, so as to selectively couple the first radiation element to the third radiation element. The second switch element is closed or open, so as to selectively couple the second radiation element to the third radiation element. An antenna structure is formed by the first radiation element, the second radiation element, and the third radiation element.Type: GrantFiled: May 12, 2022Date of Patent: February 27, 2024Assignee: HTC CorporationInventors: Cheng-Hung Lin, Szu-Po Wang, Chia-Te Chien, Chun-Chieh Wang, Kang-Ling Li, Chun-Hsien Lee, Yu-Chieh Chiu
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Publication number: 20240034619Abstract: A method includes forming an interconnect structure over a semiconductor substrate. The interconnect structure includes a plurality of dielectric layers, and the interconnect structure and the semiconductor substrate are in a wafer. A plurality of metal pads are formed over the interconnect structure. A plurality of through-holes are formed to penetrate through the wafer. The plurality of through-holes include top portions penetrating through the interconnect structure, and middle portions underlying and joining to the top portions. The middle portions are wider than respective ones of the top portions. A metal layer is formed to electrically connect to the plurality of metal pads. The metal layer extends into the top portions of the plurality of through-holes.Type: ApplicationFiled: January 9, 2023Publication date: February 1, 2024Inventors: Pei-Wei Lee, Fu Wei Liu, Szu-Hsien Lee, Yun-Chung Wu, Chin-Yu Ku, Ming-Da Cheng, Ming -Ji Lii
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Patent number: 11861110Abstract: An electronic device may have a display with touch sensors. One or more shielding layers may be interposed between the display and the touch sensors. The shielding layers may include shielding structures such as a conductive mesh structure and/or a transparent conductive film. The shielding structures may be actively driven or passively biased. In the active driving scheme, one or more inverting circuits may receive a noise signal from a cathode layer in the display and/or from the shielding structures, invert the received noise signal, and drive the inverted noise signal back onto the shielding structures to prevent any noise from the display from negatively impacting the performance of the touch sensors. In the passive biasing scheme, the shielding structures may be biased to a power supply voltage.Type: GrantFiled: September 29, 2022Date of Patent: January 2, 2024Assignee: Apple Inc.Inventors: Rungrot Kitsomboonloha, Donggeon Han, Jason N Gomez, Kyung Wook Kim, Nikolaus Hammler, Pei-En Chang, Saman Saeedi, Shih Chang Chang, Shinya Ono, Suk Won Hong, Szu-Hsien Lee, Victor H Yin, Young-Jik Jo, Yu-Heng Cheng, Joyan G Sanctis, Hongwoo Lee
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Publication number: 20230084423Abstract: Embodiments presented herein relate to reducing visual artifacts on an electronic display caused by an intra-frame pause. To do so, the intra-frame pause may be divided into smaller intra-frame pause segments. The intra-frame pause segments may be applied to the display during different image frames and/or at different locations on the electronic display. For example, each intra-frame pause segment may be applied to a different location on the electronic display. In some embodiments, multiple intra-frame pause segments may be applied during a single image frame. In some embodiments, the intra-frame pause segments may be applied to various image frames and at various location on the electronic display according to a pattern. To reduce band flickering that may be caused by the different locations of the intra-frame pause segments, an emission duty of one or more rows of pixels of the display may be adjusted.Type: ApplicationFiled: June 29, 2022Publication date: March 16, 2023Inventors: Myungjoon Choi, Jie Won Ryu, Hyunwoo Nho, Xiaokai Li, Kaikai Guo, Szu-Hsien Lee, Rungrot Kitsomboonloha, Pei-En Chang, Amit Nayyar, Vehbi Calayir
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Patent number: 11605330Abstract: Embodiments presented herein relate to reducing visual artifacts on an electronic display caused by an intra-frame pause. To do so, the intra-frame pause may be divided into smaller intra-frame pause segments. The intra-frame pause segments may be applied to the display during different image frames and/or at different locations on the electronic display. For example, each intra-frame pause segment may be applied to a different location on the electronic display. In some embodiments, multiple intra-frame pause segments may be applied during a single image frame. In some embodiments, the intra-frame pause segments may be applied to various image frames and at various location on the electronic display according to a pattern. To reduce band flickering that may be caused by the different locations of the intra-frame pause segments, an emission duty of one or more rows of pixels of the display may be adjusted.Type: GrantFiled: June 29, 2022Date of Patent: March 14, 2023Assignee: Apple Inc.Inventors: Myungjoon Choi, Jie Won Ryu, Hyunwoo Nho, Xiaokai Li, Kaikai Guo, Szu-Hsien Lee, Rungrot Kitsomboonloha, Pei-En Chang, Amit Nayyar, Vehbi Calayir
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Patent number: 11580905Abstract: A display may include an array of pixels that receive control signals from a chain of gate drivers. Each gate driver may include a logic sub-circuit and an output buffer sub-circuit. The output buffer sub-circuit may include depletion mode semiconducting oxide transistors with high mobility. The logic sub-circuit may include semiconducting oxide transistors, some of which can be depletion mode transistors and some of which can be enhancement mode transistors with lower mobility. The logic sub-circuit may include at least a carry circuit, a voltage setting circuit, an inverting circuit, a discharge circuit.Type: GrantFiled: May 19, 2022Date of Patent: February 14, 2023Assignee: Apple Inc.Inventors: Rungrot Kitsomboonloha, Chin-Wei Lin, Shinya Ono, Gihoon Choo, Hao-Lin Chiu, Kyung Wook Kim, Pei-En Chang, Szu-Hsien Lee, Zino Lee
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Publication number: 20230014107Abstract: A display may include an array of pixels that receive control signals from a chain of gate drivers. Each gate driver may include a logic sub-circuit and an output buffer sub-circuit. The output buffer sub-circuit may include depletion mode semiconducting oxide transistors with high mobility. The logic sub-circuit may include semiconducting oxide transistors, some of which can be depletion mode transistors and some of which can be enhancement mode transistors with lower mobility. The logic sub-circuit may include at least a carry circuit, a voltage setting circuit, an inverting circuit, a discharge circuit.Type: ApplicationFiled: May 19, 2022Publication date: January 19, 2023Inventors: Rungrot Kitsomboonloha, Chin-Wei Lin, Shinya Ono, Gihoon Choo, Hao-Lin Chiu, Kyung Wook Kim, Pei-En Chang, Szu-Hsien Lee, Zino Lee
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Patent number: 11462608Abstract: An electronic device may include a display with pixels formed using light-emitting diodes, thin-film silicon transistors, thin-film semiconducting-oxide transistors, and capacitors. The silicon transistors, semiconducting-transistors, and capacitors may have control terminals that are coupled to gate or routing lines that extend across the face of the display and that are formed in a low resistance source-drain metal routing layer. Forming routing/gate lines using the low resistance source-drain metal routing layer dramatically reduces the resistance of the gate lines, which enables better timing margins for large display panels operating at higher refresh rates.Type: GrantFiled: January 7, 2021Date of Patent: October 4, 2022Assignee: Apple Inc.Inventors: Shinya Ono, Chin-Wei Lin, Akira Matsudaira, Jiun-Jye Chang, Jung Yen Huang, Pei-En Chang, Rungrot Kitsomboonloha, Szu-Hsien Lee
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Publication number: 20210305353Abstract: An electronic device may include a display with pixels formed using light-emitting diodes, thin-film silicon transistors, thin-film semiconducting-oxide transistors, and capacitors. The silicon transistors, semiconducting-transistors, and capacitors may have control terminals that are coupled to gate or routing lines that extend across the face of the display and that are formed in a low resistance source-drain metal routing layer. Forming routing/gate lines using the low resistance source-drain metal routing layer dramatically reduces the resistance of the gate lines, which enables better timing margins for large display panels operating at higher refresh rates.Type: ApplicationFiled: January 7, 2021Publication date: September 30, 2021Inventors: Shinya Ono, Chin-Wei Lin, Akira Matsudaira, Jiun-Jye Chang, Jung Yen Huang, Pei-En Chang, Rungrot Kitsomboonloha, Szu-Hsien Lee
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Patent number: 10824279Abstract: A system is disclosed. The system can comprise drive circuitry included in a first component of the system, the drive circuitry configured to drive a first touch electrode on a touch sensor panel. The system can also comprise a driving line configured to couple an output of the drive circuitry to the first touch electrode. The system can also comprise a feedback line configured to couple the output of the drive circuitry to an input of the drive circuitry, wherein a first end of the feedback line is coupled to the input of the drive circuitry at the first component, and a second end of the feedback line is configured to be coupled to the output of the drive circuitry at a second component, different from the first component, of the system.Type: GrantFiled: September 29, 2015Date of Patent: November 3, 2020Assignee: Apple Inc.Inventors: Chaohao Wang, Yingxuan Li, Hung Sheng Lin, Paolo Sacchetto, Szu-Hsien Lee, Weijun Yao, Howard Tang
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Patent number: 10769982Abstract: The disclosure is related to head-to-head (H2H) gate on arrays (GOA) for pixel-based displays that may have reduced dimensions. In the described embodiments, the H2H design with alternate logic may be used to drive groups of pixels (e.g., a pixel row or column) with a primary and a secondary driver, located in opposite ends of the bezel of the electronic device. In the alternate-logic design, a shared shift-register may be used to enable two rows or columns. Embodiments in which more than two rows or columns are controlled by a single shift register are also described.Type: GrantFiled: December 27, 2018Date of Patent: September 8, 2020Assignee: Apple Inc.Inventors: Rungrot Kitsomboonloha, Szu-Hsien Lee
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Publication number: 20200258454Abstract: This application relates to methods and apparatus to refresh a display device at various frequencies. Specifically, multiple areas of the display device may be refreshed concurrently at different frequencies. In this way, when static content is being displayed in certain areas of the display device, those certain areas can be refreshed at a lower rate than areas displaying dynamic content such as video or animation. By refreshing at lower rates, the energy consumed by the display device and subsystems associated with the display device can be reduced. Additionally, processes for reducing flicker when refreshing the display device at different refresh rates are disclosed herein.Type: ApplicationFiled: May 1, 2020Publication date: August 13, 2020Inventors: Chaohao WANG, Szu-Hsien LEE, Paolo SACCHETTO, Shih Chang CHANG, Chun-Yao HUANG, Paul S. DRZAIC
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Patent number: 10642116Abstract: A display may include one or more display pixels in an array of pixels. A display pixel may include a storage capacitor chat stores a pixel data signal. The storage capacitor may be formed from a pixel electrode structure, a capacitor electrode structure, and a common electrode structure that is interposed between the pixel electrode structure and capacitor electrode structures. Each electrode structure may be formed from transparent conductive materials deposited on respective display layers. The pixel electrode structure and capacitor electrode structure may be electrically coupled by a conductive via structure that extends through the display layers without contacting the common electrode structure. The conductive via structure may contact underlying transistor structures such as a source-drain structure.Type: GrantFiled: April 18, 2014Date of Patent: May 5, 2020Assignee: APPLE INC.Inventors: Zhibing Ge, Lei Zhao, Ming-Chin Hung, Szu-Hsien Lee, Cheng Chen, Shih-Chang Chang
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Patent number: 10629131Abstract: This application relates to methods and apparatus for refreshing a display device at various frequencies. Specifically, multiple areas of the display device can be refreshed concurrently at different frequencies. In this way, when static content is being displayed in certain areas of the display device, those certain areas can be refreshed at a lower rate than areas displaying dynamic content such as video or animation. By refreshing at lower rates, the energy consumed by the display device and subsystems associated with the display device can be reduced. Additionally, processes for reducing flicker when refreshing the display device at different refresh rates are disclosed herein.Type: GrantFiled: August 30, 2017Date of Patent: April 21, 2020Assignee: Apple Inc.Inventors: Chaohao Wang, Szu-Hsien Lee, Paolo Sacchetto, Shih Chang Chang, Chun-Yao Huang, Paul S. Drzaic
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Publication number: 20200074912Abstract: The disclosure is related to head-to-head (H2H) gate on arrays (GOA) for pixel-based displays that may have reduced dimensions. In the described embodiments, the H2H design with alternate logic may be used to drive groups of pixels (e.g., a pixel row or column) with a primary and a secondary driver, located in opposite ends of the bezel of the electronic device. In the alternate-logic design, a shared shift-register may be used to enable two rows or columns. Embodiments in which more than two rows or columns are controlled by a single shift register are also described.Type: ApplicationFiled: December 27, 2018Publication date: March 5, 2020Inventors: Rungrot Kitsomboonloha, Szu-Hsien Lee