Abstract: Host devices present both the host certificate and the pertinent certificate revocation lists to the memory device for authentication so that the memory device need not obtain the list on its own. Processing of the certificate revocation list and searching for the certificate identification may be performed concurrently by the memory device. The certificate revocation lists for authenticating host devices to memory devices may be stored in an unsecured area of the memory device for convenience of users.

Abstract: Methods for embedding digital watermarks in compressed video include perceptual adapting a digital watermark in predicted and non-predicted data based on block activity derived from the compressed video stream, embedding in predicted objects in a video stream having separately compressed video objects, and bit rate control of watermarked video.

Abstract: A memory system includes a first block in which data is stored with a low density and a second block in which data is stored with a high density. When data is received it is written to the first block, and in parallel some of the data is written to the second block, so that the second block is partially programmed. The second block is later fully programmed by copying additional data from the first block.

Abstract: A portion of a nonvolatile memory array that is likely to contain, partially programmed data may be identified from a high sensitivity read, by applying stricter than usual ECC requirements, or using pointers to programmed sectors. The last programmed data may be treated as likely to be partially programmed data. Data in the identified portion may be copied to another location, or left where it is with an indicator to prohibit further programming to the same cells. To avoid compromising previously stored data during subsequent programming, previously stored data may be backed up. Backing up may be done selectively, for example, only for nonsequential data, or only when the previously stored data contains an earlier version of data being programmed. If a backup copy already exists, another backup copy is not created. Sequential commands are treated as a single command if received within a predetermined time period.

Abstract: Apparatus and methods for second harmonic generation with a waveguide. In one embodiment, a method includes the steps of providing a waveguide, wherein the waveguide has a substrate, and a polydomain epitaxial thin film on the substrate, wherein the polydomain epitaxial thin film defines a plane and has a first surface and a second, opposite surface defining a body portion of the polydomain epitaxial thin film therebetween with a film thickness, l, and wherein the polydomain epitaxial thin film has a coherence length, lc, and exposing the waveguide to an incident photon beam with a wavelength and a focal point such that the incident photon beam is incident to the plane of the polydomain epitaxial thin film with an angle ? that is formed between the incident beam and the plane of the polydomain epitaxial thin film and satisfies the condition of 0<?<90, wherein the polydomain epitaxial thin film is formed with the following condition satisfied: l<lc.

Abstract: A method of making a circuitized substrate (e.g., PCB) including at least one and possibly several internal optical pathways as part thereof such that the resulting substrate will be capable of transmitting and/or receiving both electrical and optical signals. The method involves forming at least one opening between a side of the optical core and an adjacent upstanding member such that the opening is defined by at least one angular sidewall. Light passing through the optical core material (or into the core from above) is reflected off this angular sidewall. The medium (e.g., air) within the opening thus also serves as a reflecting medium due to its own reflective index in comparison to that of the adjacent optical core material. The method utilizes many processes used in conventional PCB manufacturing, thereby keeping costs to a minimum.

Abstract: The present invention discloses an electronic package to contain and protect an integrated circuit (IC) chip. The electronic package further includes a leadframe, a flexible circuit or PCB type of substrate. The leadframe, flexible circuit or PCB type substrate further includes solder contacts, which are aligned with via holes in the molding layers on the top and bottom sides of the package. These via holes are for placing solder paste or solder balls from above and below for electrical access to the IC chip. These solder balls provide access for electrical testing after the package is mounted on a motherboard. They also provide the connection points for stacking multiple packages vertically.

Abstract: The present invention presents a non-volatile memory and method for its operation that ensures reliable mechanism for write and erase abort detection in the event of lost of power during non-volatile memory programming and erasing with minimized system performance penalty. During a multi-sector write process, an indication of a successful write in one sector is written into the overhead of the following sector at the same time as the following sector's data content is written. The last sector written will additionally have an indication of its own successful write written into its overhead. For erase, an erase abort flag in the first sector of the block can be marked after a successful erase operation.

Abstract: Genipin derivatives and pharmaceutical compositions thereof that inhibit the activity of uncoupling protein-2 (UCP2) and are useful in treating deficient first-phase insulin secretion, non-insulin dependent diabetes mellitus, and ischemia in a mammal are disclosed.

Abstract: A system and method for detecting a phase and a frequency and an arrival-time difference between two signals (118 and 120) that minimizes delay and jitter, and has stable operation even when the two signals (118 and 120) are essentially identical. The system includes two single-ended charge-pump (188), phase-frequency detection (PFD) circuits (280). The first PFD is stable when a reference signal, supplied to a polarity determining flip-flop, leads the signal to be synchronized. A second, complementary, PFD circuit is stable, but has an inverted polarity output, when the signal to be synchronized, supplied to a polarity determining flip-flop, leads the reference signal. A polarity-selection logic-circuit (284) ensures that the first activated PFD controls the polarity a single-ended charge pump (188) for a time-period determined by the delay between the activation of the polarity determining and non-polarity determining flip-flops of the selected PFD.

Abstract: A memory system includes a first block in which data is stored with a low density and a second block in which data is stored with a high density. When data is received it is written to the first block, and in parallel some of the data is written to the second block, so that the second block is partially programmed. The second block is later fully programmed by copying additional data from the first block.

Abstract: A method of improving conductive paste connections in a circuitized substrate in which at least one and preferably a series of high voltage pulses are applied across the paste and at least one and preferably a series of high current pulses are applied, both series of pulses applied separately. The result is an increase in the number of conductive paths through the paste connections from those present prior to the pulse applications and a corresponding resistance reduction in said connections.

Abstract: A belt and roller system comprising a roller having a permanent magnet sandwiched in between a pair of temporarily magnetic disks with the magnetism of the disks induced by the permanent magnet. Each temporarily magnetic disk may be steel. Each pole of the permanent magnet is disposed adjacent to a pole of one of the temporarily magnetic disks resulting in a magnetic attraction to a disk at each pole of the permanent magnet. The opposing magnetic poles of the disks form a magnetic flux circuit by which a temporarily magnetic belt, such as a steel belt is guidable to prevent or reduce deviation which it may have from its roller path. Additional permanent magnetic rollers or other rollers known in the art may be combined with the magnetic roller of the present invention to form a gear train about which the belt rotates.

Abstract: Methods and systems for providing data security scanning in a network. A network device ascertains, based on a network's security policy, security technologies that are should or must be applied to the network traffic. The network device applies the not yet applied security technologies, based on a determination that the not yet applied security technologies are available to the network device. Next, the network device tags the network traffic with a security marker indicating the not yet applied security technologies as applied to reflect the security technologies applied to the network traffic.

Abstract: This patent disclosure presents circuits, systems and methods to produce a stable signal from a reference signal source. These new inventions are far better than the current technologies to provide a stable signal with less phase noises. This new invention also provides a new approach to analyze the feedback control loop without using the traditional feedback control theory.

Abstract: A hybrid step motor has axially spaced first and second sets of rotor sections (or alternatively different sets of stator sections) characterized by different tooth widths. The rotor/stator tooth width ratio in one set is optimized for one-phase ON operation while the rotor/stator tooth width ratio for the other set is optimized for two-phase ON operation. More generally, the two sets are optimized together for near sinusoidal, torque profile and substantially equal microsteps.

Abstract: A capacitive substrate and method of making same in which first and second glass layers are used. A first conductor is formed on a first of the glass layers and a capacitive dielectric material is positioned over the conductor. The second conductor is then positioned on the capacitive dielectric and the second glass layer positioned over the second conductor. Conductive thru-holes are formed to couple to the first and second conductors, respectively, such that the conductors and capacitive dielectric material form a capacitor when the capacitive substrate is in operation.

Abstract: Data scrambling techniques implemented externally to a flash memory device are disclosed which can be used in concert with flash memory on-chip copy functionality operating internally to the flash device, thus supporting high performance copying operations. All the data stored in the flash may be scrambled, including headers and control structures. Robust file system operation may be achieved, including the capability to tolerate a power loss at any time, and yet be able to relocate data internally within the flash without having to de-scramble and then re-scramble the data. An exemplary hardware based solution has little or no impact on overall system performance, and may be implemented at very low incremental cost to increase overall system reliability. The data scrambling technique preferably uses a logical address, such as logical block address or logical page address, rather than a physical address, to determine a seed scrambling key.

Abstract: The quality of data stored in individual blocks of memory cells of a flash memory system is monitored by a scrub read of only a small portion of a block, performed after data are read from less than all of a block in response to a read command from a host or memory controller. The small portion is selected for the scrub read because of its greater vulnerability than other portions of the block to being disturbed as a result of the commanded partial block data read. This then determines, as the result of reading a small amount of data, whether at least some of the data in the block was disturbed by the command data read to a degree that makes it desirable to refresh the data of the block.

Abstract: The present invention relates to a novel dye compound, represented by the following formula (I): wherein R1, D1, D2, X, and Y are defined the same as the specification. The dye compound of the present invention is suitable for Dye-Sensitized Solar Cell (DSSC). In addition, the dye compound of the present invention has high molar absorption coefficient, so that the DSSC manufactured by the dye compound of the present invention can have good photoelectric characteristics.