Patents by Inventor T. Wang

T. Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Multicolor Photonic Crystal Laser Array
    Publication number: 20140219306
    Abstract: A multicolor photonic crystal laser array comprises pixels of monolithically grown gain sections each with a different emission centre wavelength. As an example, two-dimensional surface-emitting photonic crystal lasers comprising broad gain-bandwidth III-nitride multiple quantum well axial heterostructures were fabricated using a novel top-down nanowire fabrication method. Single-mode lasing was obtained in the blue-violet spectral region with 60 nm of tuning (or 16% of the nominal centre wavelength) that was determined purely by the photonic crystal geometry. This approach can be extended to cover the entire visible spectrum.
    Type: Application
    Filed: February 3, 2014
    Publication date: August 7, 2014
    Applicant: Sandia Corporation
    Inventors: Jeremy B. Wright, Igal Brener, Ganapathi S. Subramania, George T. Wang, Qiming Li
  • Memory module with memory stack and interface with enhanced capabilites
    Patent number: 8797779
    Abstract: A memory module, which includes at least one memory stack, comprises a plurality of DRAM integrated circuits and an interface circuit. The interface circuit interfaces the memory stack to a host system so as to operate the memory stack as a single DRAM integrated circuit. In other embodiments, a memory module includes at least one memory stack and a buffer integrated circuit. The buffer integrated circuit, coupled to a host system, interfaces the memory stack to the host system so to operate the memory stack as at least two DRAM integrated circuits. In yet other embodiments, the buffer circuit interfaces the memory stack to the host system for transforming one or more physical parameters between the DRAM integrated circuits and the host system.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: August 5, 2014
    Assignee: Google Inc.
    Inventors: Suresh Natarajan Rajan, Keith R. Schakel, Michael J. S. Smith, David T. Wang, Frederick Daniel Weber
  • Amber light-emitting diode comprising a group III-nitride nanowire active region
    Patent number: 8785905
    Abstract: A temperature stable (color and efficiency) III-nitride based amber (585 nm) light-emitting diode is based on a novel hybrid nanowire-planar structure. The arrays of GaN nanowires enable radial InGaN/GaN quantum well LED structures with high indium content and high material quality. The high efficiency and temperature stable direct yellow and red phosphor-free emitters enable high efficiency white LEDs based on the RGYB color-mixing approach.
    Type: Grant
    Filed: January 17, 2013
    Date of Patent: July 22, 2014
    Assignee: Sandia Corporation
    Inventors: George T. Wang, Qiming Li, Jonathan J. Wierer, Jr., Daniel Koleske
  • CONFIGURABLE MEMORY CIRCUIT SYSTEM AND METHOD
    Publication number: 20140192583
    Abstract: A memory circuit system and method are provided in the context of various embodiments. In one embodiment, an interface circuit remains in communication with a plurality of memory circuits and a system. The interface circuit is operable to interface the memory circuits and the system for performing various functionality (e.g. power management, simulation/emulation, etc.).
    Type: Application
    Filed: November 26, 2013
    Publication date: July 10, 2014
    Inventors: Suresh Natarajan Rajan, Keith R. Schakel, Michael John Sebastien Smith, David T. Wang, Frederick Daniel Weber
  • Memory refresh apparatus and method
    Patent number: 8773937
    Abstract: An apparatus includes multiple first memory circuits, in which the multiple first memory circuits are positioned on at least one dual in-line memory module (DIMM). The apparatus includes an interface circuit operable to interface the first memory circuits with a system; present the first memory circuits to the system as one or more simulated second memory circuits; transmit, in response to receiving a first refresh control signal sent from the system to the one or more simulated memory circuits, multiple second refresh control signals to the first memory circuits; and apply a respective delay to each second refresh control signal transmitted to a corresponding first memory circuit. Each simulated second memory circuit has a corresponding second memory capacity that is greater than a first memory capacity of at least one of the first memory circuits.
    Type: Grant
    Filed: December 9, 2011
    Date of Patent: July 8, 2014
    Assignee: Google Inc.
    Inventors: Keith R. Schakel, Suresh Natarajan Rajan, Michael John Sebastian Smith, David T. Wang, Frederick Daniel Weber
  • Memory system for synchronous data transmission
    Patent number: 8762675
    Abstract: One embodiment of the present invention sets forth an interface circuit configured to combine time staggered data bursts returned by multiple memory devices into a larger contiguous data burst. As a result, an accurate timing reference for data transmission that retains the use of data (DQ) and data strobe (DQS) signals in an infrastructure-compatible system while eliminating the cost of the idle cycles required for data bus turnarounds to switch from reading from one memory device to reading from another memory device, or from writing to one memory device to writing to another memory device may be obtained, thereby increasing memory system bandwidth relative to the prior art approaches.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: June 24, 2014
    Assignee: Google Inc.
    Inventors: David T. Wang, Suresh Natarajan Rajan
  • MONOCLONAL ANTIBODIES AGAINST INFLUENZA VIRUS GENERATED BY CYCLICAL ADMINISTRATION AND USES THEREOF
    Publication number: 20140170163
    Abstract: Provided herein are methods of producing neutralizing monoclonal antibodies, by cyclical immunization, that cross-react with strains of Influenza virus of the same subtype or different subtypes. Also provided herein are compositions comprising such antibodies and methods of using such antibodies to diagnose, prevent or treat Influenza virus disease.
    Type: Application
    Filed: January 23, 2014
    Publication date: June 19, 2014
    Applicant: MOUNT SINAI SCHOOL OF MEDICINE
    Inventors: Adolfo Garcia-Sastre, Peter Palese, Taia T. Wang
  • POWER MANAGEMENT IN SEMICONDUCTOR MEMORY SYSTEM
    Publication number: 20140160874
    Abstract: A method for operating a memory module device. The method can include transferring a chip select, command, and address information from a host memory controller. The host memory controller can be coupled to a memory interface device, which can be coupled to a memory module. The memory module can comprise a plurality of memory devices. The chip select, command and address information can be received at the memory interface using a command-and-address-latency (CAL) mode. Control logic can be used to initiate a power state transition from a first power state to a second power state of an input termination circuit in the memory interface device.
    Type: Application
    Filed: February 11, 2014
    Publication date: June 12, 2014
    Applicant: INPHI CORPORATION
    Inventor: David T. WANG
  • Method to grow group III-nitrides on copper using passivation layers
    Patent number: 8741748
    Abstract: Group III-nitride epilayers can be grown directly on copper substrates using intermediate passivation layers. For example, single crystalline c-plane GaN can be grown on Cu (110) substrates with MOCVD. The growth relies on a low temperature AlN passivation layer to isolate any alloying reaction between Ga and Cu.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: June 3, 2014
    Assignee: Sandia Corporation
    Inventors: Qiming Li, George T. Wang, Jeffrey T. Figiel
  • Simulating a memory standard
    Patent number: 8745321
    Abstract: An apparatus includes multiple first memory circuits, each first memory circuit being associated with a first memory standard, where the first memory standard defines a first set of control signals that each first memory circuit circuits is operable to accept. The apparatus also includes an interface circuit coupled to the first memory circuits, in which the interface circuit is operable to emulate at least one second memory circuit, each second memory circuit being associated with a second different memory standard.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: June 3, 2014
    Assignee: Google Inc.
    Inventors: Suresh Natarajan Rajan, Keith R. Schakel, Michael John Sebastian Smith, David T. Wang, Frederick Daniel Weber
  • Programming of DIMM termination resistance values
    Patent number: 8710862
    Abstract: Systems, methods, and apparatus, including computer program products, for providing termination resistance in a memory module are provided. An apparatus is provided that includes a plurality of memory circuits; an interface circuit operable to communicate with the plurality of memory circuits and to communicate with a memory controller; and a transmission line electrically coupling the interface circuit to a memory controller, wherein the interface circuit is operable to terminate the transmission line with a single termination resistance that is selected based on a plurality of resistance-setting commands received from the memory controller.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: April 29, 2014
    Assignee: Google Inc.
    Inventors: Philip Arnold Ferolito, Daniel L. Rosenband, David T. Wang, Michael John Smith
  • APOPTOSIS-INDUCING AGENTS FOR THE TREATMENT OF CANCER AND IMMUNE AND AUTOIMMUNE DISEASES
    Publication number: 20140113910
    Abstract: Disclosed are compounds which inhibit the activity of anti-apoptotic Bcl-2 proteins, compositions containing the compounds and methods of treating diseases during which is expressed anti-apoptotic Bcl-2 protein.
    Type: Application
    Filed: September 26, 2013
    Publication date: April 24, 2014
    Applicants: AbbVie Inc., The Walter and Eliza Hall Institute of Medical Research, Genentech, Inc.
    Inventors: Milan Bruncko, Hong Ding, George A. Doherty, Steven W. Elmore, Lisa A. Hasvold, Laura Hexamer, Aaron R. Kunzer, Xiaohong Song, Andrew J. Souers, Gerard M. Sullivan, Zhi-Fu Tao, Gary T. Wang, Le Wang, Xilu Wang, Michael D. Wendt, Robert A. Mantei, Todd M. Hansen
  • MICROFLUIDIC SYSTEM FOR HIGH-THROUGHPUT, DROPLET-BASED SINGLE MOLECULE ANALYSIS WITH LOW REAGENT CONSUMPTION
    Publication number: 20140106462
    Abstract: A microfluidic device for a confocal fluorescence detection system has an input channel defined by a body of the microfluidic device, a sample concentration section defined by the body of the microfluidic device and in fluid connection with the input channel, a mixing section defined by the body of the microfluidic device and in fluid connection with the concentration section, and a detection region that is at least partially transparent to illumination light of the confocal fluorescence detection system and at least partially transparent to fluorescent light when emitted from a sample under observation as the sample flows through the detection region.
    Type: Application
    Filed: December 20, 2013
    Publication date: April 17, 2014
    Applicant: The Johns Hopkins University
    Inventors: Jeff T. Wang, Kelvin J. Liu, Christopher M. Puleo, Tushar D. Rane
  • BCL-2-SELECTIVE APOPTOSIS-INDUCING AGENTS FOR THE TREATMENT OF CANCER AND IMMUNE DISEASES
    Publication number: 20140107119
    Abstract: Disclosed are compounds which inhibit the activity of anti-apoptotic Bcl-2 or Bcl-xL proteins, compositions containing the compounds and methods of treating diseases during which are expressed anti-apoptotic Bcl-2 protein.
    Type: Application
    Filed: November 15, 2013
    Publication date: April 17, 2014
    Applicant: AbbVie Inc.
    Inventors: Milan Bruncko, Hong Ding, George A. Doherty, Steven W. Elmore, Lisa Hasvold, Laura A. Hexamer, Aaron R. Kunzer, Robert A. Mantei, William J. McClellan, Chang H. Park, Cheol-Min Park, Andrew M. Petros, Xiaohong Song, Andrew J. Souers, Gerard M. Sullivan, Zhi-fu Tao, Gary T. Wang, Le Wang, Xilu Wang, Michael D. Wendt, Todd M. Hansen
  • REPLACEMENT OF A FAULTY MEMORY CELL WITH A SPARE CELL FOR A MEMORY CIRCUIT
    Publication number: 20140098589
    Abstract: A memory interface circuit device comprising a data structure configured to match and substitute an address in a run-time.
    Type: Application
    Filed: September 14, 2012
    Publication date: April 10, 2014
    Applicant: Inphi Corporation
    Inventor: David T. WANG
  • APOPTOSIS-INDUCING AGENTS FOR THE TREATMENT OF CANCER AND IMMUNE AND AUTOIMMUNE DISEASES
    Publication number: 20140094471
    Abstract: Disclosed are compounds which inhibit the activity of anti-apoptotic Bcl-2 proteins, compositions containing the compounds and methods of treating diseases during which is expressed anti-apoptotic Bcl-2 protein.
    Type: Application
    Filed: September 26, 2013
    Publication date: April 3, 2014
    Applicants: AbbVie Inc., The Walter and Eliza Hall Institute of Medical Research, Genentech, Inc.
    Inventors: Milan Bruncko, Hong Ding, George A. Doherty, Steven W. Elmore, Lisa A. Hasvold, Laura Hexamer, Aaron R. Kunzer, Xiaohong Song, Andrew J. Souers, Gerard M. Sullivan, Zhi-Fu Tao, Gary T. Wang, Le Wang, Xilu Wang, Michael D. Wendt, Robert A. Mantei, Todd M. Hansen
  • Power management in semiconductor memory system
    Patent number: 8687451
    Abstract: A method for operating a memory module device. The method can include transferring a chip select, command, and address information from a host memory controller. The host memory controller can be coupled to a memory interface device, which can be coupled to a memory module. The memory module can comprise a plurality of memory devices. The chip select, command and address information can be received at the memory interface using a command-and-address-latency (CAL) mode. Control logic can be used to initiate a power state transition from a first power state to a second power state of an input termination circuit in the memory interface device.
    Type: Grant
    Filed: July 25, 2012
    Date of Patent: April 1, 2014
    Assignee: Inphi Corporation
    Inventor: David T. Wang
  • APOPTOSIS-INDUCING AGENTS FOR THE TREATMENT OF CANCER AND IMMUNE AND AUTOIMMUNE DISEASES
    Publication number: 20140088106
    Abstract: Disclosed are compounds which inhibit the activity of anti-apoptotic Bcl-2 proteins, compositions containing the compounds and methods of treating diseases during which is expressed anti-apoptotic Bcl-2 protein.
    Type: Application
    Filed: October 14, 2013
    Publication date: March 27, 2014
    Applicant: AbbVie Inc.
    Inventors: Milan Bruncko, Yujia Dai, Hong Ding, George A. Doherty, Steven W. Elmore, Lisa Hasvold, Laura A. Hexamer, Aaron R. Kunzer, Robert A. Mantei, William J. McClellan, Chang H. Park, Cheol-Min Park, Andrew M. Petros, Xiaohong Song, Andrew J. Souers, Gerard M. Sullivan, Zhi-Fu Tao, Gary T. Wang, Le Wang, Xilu Wang, Michael D. Wendt, Todd M. Hansen
  • Monoclonal antibodies against influenza virus generated by cyclical administration and uses thereof
    Patent number: 8673314
    Abstract: Provided herein are methods of producing neutralizing monoclonal antibodies, by cyclical immunization, that cross-react with strains of Influenza virus of the same subtype or different subtypes. Also provided herein are compositions comprising such antibodies and methods of using such antibodies to diagnose, prevent or treat Influenza virus disease.
    Type: Grant
    Filed: May 26, 2010
    Date of Patent: March 18, 2014
    Assignee: Mount Sinai School of Medicine
    Inventors: Adolfo Garcia-Sastre, Peter Palese, Taia T. Wang
  • METHOD AND SYSTEM FOR COMMUNICATING BETWEEN A HOST DEVICE AND A USER DEVICE THROUGH AN INTERMEDIATE DEVICE USING A COMPOSITE GRAPHICS SIGNAL
    Publication number: 20140075485
    Abstract: A system and method includes a host device, an intermediate device and a user device. A network is in communication with the host device, the intermediate device and the user device. The host device communicates a first graphics command and a second graphics command to the intermediate device. The intermediate device composites the first graphics command and the second graphics command to form a composite graphics command and communicating the composite graphics command to the user device. The user device generates a screen display in response to the composite graphics command.
    Type: Application
    Filed: September 12, 2012
    Publication date: March 13, 2014
    Applicant: The DIRECTV Group, Inc.
    Inventors: Sean S. Lee, Scott D. Casavant, Phillip T. Wang